aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/bcm11351.dtsi
diff options
context:
space:
mode:
authorTim Kryger <tim.kryger@linaro.org>2013-12-05 11:20:38 -0800
committerChristian Daudt <bcm@fixthebug.org>2013-12-22 23:45:32 -0800
commit740309b6dc9faa6b3c8f7dcd1fac63eae1ee1709 (patch)
tree6fb95a5d197b3b9ed9247c728d7b5ae91a3db605 /arch/arm/boot/dts/bcm11351.dtsi
parentdfc4334b93a32baf7378de6c9deca2420c7f896b (diff)
downloadlinux-stericsson-740309b6dc9faa6b3c8f7dcd1fac63eae1ee1709.tar.gz
ARM: dts: Specify clocks for UARTs on bcm11351
The frequency property in "snps,dw-apb-uart" entries are no longer required if the rate of the external clock can be determined using the clk api (see e302cd9 serial: 8250_dw: add support for clk api). This patch replaces the frequency property in the UART nodes of bcm11351.dtsi with references to the relevant clocks following the common clock binding. Signed-off-by: Tim Kryger <tim.kryger@linaro.org> Reviewed-by: Markus Mayer <markus.mayer@linaro.org> Reviewed-by: Matt Porter <matt.porter@linaro.org> Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Diffstat (limited to 'arch/arm/boot/dts/bcm11351.dtsi')
-rw-r--r--arch/arm/boot/dts/bcm11351.dtsi8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/bcm11351.dtsi b/arch/arm/boot/dts/bcm11351.dtsi
index d848997990ee..7487c7ef3a3e 100644
--- a/arch/arm/boot/dts/bcm11351.dtsi
+++ b/arch/arm/boot/dts/bcm11351.dtsi
@@ -43,7 +43,7 @@
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e000000 0x1000>;
- clock-frequency = <13000000>;
+ clocks = <&uartb_clk>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -53,7 +53,7 @@
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e001000 0x1000>;
- clock-frequency = <13000000>;
+ clocks = <&uartb2_clk>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -63,7 +63,7 @@
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e002000 0x1000>;
- clock-frequency = <13000000>;
+ clocks = <&uartb3_clk>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@@ -73,7 +73,7 @@
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e003000 0x1000>;
- clock-frequency = <13000000>;
+ clocks = <&uartb4_clk>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;