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authorJisheng Zhang <jszhang@marvell.com>2016-04-01 17:12:49 +0800
committerDavid S. Miller <davem@davemloft.net>2016-04-01 14:36:47 -0400
commitc66e98c9532bf7b58fe78cc59fb37d3ff651756d (patch)
tree6ea188777f5312984e2321869e858929d0eb095d
parent4a0a12d27ca5e892579f3c61c18c8dcfebf425d4 (diff)
downloadlinux-stericsson-c66e98c9532bf7b58fe78cc59fb37d3ff651756d.tar.gz
net: mvneta: use cache_line_size() to get cacheline size
L1_CACHE_BYTES may not be the real cacheline size, use cache_line_size to determine the cacheline size in runtime. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Suggested-by: Marcin Wojtas <mw@semihalf.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/ethernet/marvell/mvneta.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/marvell/mvneta.c b/drivers/net/ethernet/marvell/mvneta.c
index 58808718d114..b1db000f1927 100644
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -299,7 +299,7 @@
#define MVNETA_RX_PKT_SIZE(mtu) \
ALIGN((mtu) + MVNETA_MH_SIZE + MVNETA_VLAN_TAG_LEN + \
ETH_HLEN + ETH_FCS_LEN, \
- L1_CACHE_BYTES)
+ cache_line_size())
#define IS_TSO_HEADER(txq, addr) \
((addr >= txq->tso_hdrs_phys) && \