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authorAlexandre Pereira da Silva <aletes.xgr@gmail.com>2012-06-14 10:10:32 -0300
committerLinus Walleij <linus.walleij@linaro.org>2012-07-02 13:55:36 +0200
commit5b063b87deba33ed1676db9d16c52ede662132d8 (patch)
tree3744c95d92db46c1e2640fae2db7827611914133 /include/linux/amba
parent2fb30d1147c599f5657e8c62c862f9a0f58d9d99 (diff)
downloadvexpress-lsk-5b063b87deba33ed1676db9d16c52ede662132d8.tar.gz
spi/pl022: cleanup pl022 header documentation
Remove the unused fields from struct ssp_config_chip that was removed before Add bus_id documentation to pl022_ssp_controller Signed-off-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Signed-off-by: Roland Stigge <stigge@antcom.de>
Diffstat (limited to 'include/linux/amba')
-rw-r--r--include/linux/amba/pl022.h9
1 files changed, 1 insertions, 8 deletions
diff --git a/include/linux/amba/pl022.h b/include/linux/amba/pl022.h
index 76dd1b199a1..fe1d7b283cb 100644
--- a/include/linux/amba/pl022.h
+++ b/include/linux/amba/pl022.h
@@ -231,6 +231,7 @@ enum ssp_chip_select {
struct dma_chan;
/**
* struct pl022_ssp_master - device.platform_data for SPI controller devices.
+ * @bus_id: identifier for this bus
* @num_chipselect: chipselects are used to distinguish individual
* SPI slaves, and are numbered from zero to num_chipselects - 1.
* each slave has a chipselect signal, but it's common that not
@@ -259,19 +260,13 @@ struct pl022_ssp_controller {
* struct ssp_config_chip - spi_board_info.controller_data for SPI
* slave devices, copied to spi_device.controller_data.
*
- * @lbm: used for test purpose to internally connect RX and TX
* @iface: Interface type(Motorola, TI, Microwire, Universal)
* @hierarchy: sets whether interface is master or slave
* @slave_tx_disable: SSPTXD is disconnected (in slave mode only)
* @clk_freq: Tune freq parameters of SSP(when in master mode)
- * @endian_rx: Endianess of Data in Rx FIFO
- * @endian_tx: Endianess of Data in Tx FIFO
- * @data_size: Width of data element(4 to 32 bits)
* @com_mode: communication mode: polling, Interrupt or DMA
* @rx_lev_trig: Rx FIFO watermark level (for IT & DMA mode)
* @tx_lev_trig: Tx FIFO watermark level (for IT & DMA mode)
- * @clk_phase: Motorola SPI interface Clock phase
- * @clk_pol: Motorola SPI interface Clock polarity
* @ctrl_len: Microwire interface: Control length
* @wait_state: Microwire interface: Wait state
* @duplex: Microwire interface: Full/Half duplex
@@ -279,8 +274,6 @@ struct pl022_ssp_controller {
* before sampling the incoming line
* @cs_control: function pointer to board-specific function to
* assert/deassert I/O port to control HW generation of devices chip-select.
- * @dma_xfer_type: Type of DMA xfer (Mem-to-periph or Periph-to-Periph)
- * @dma_config: DMA configuration for SSP controller and peripheral
*/
struct pl022_config_chip {
enum ssp_interface iface;