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authorJassi Brar <jassi.brar@samsung.com>2009-11-30 07:39:42 +0000
committerGrant Likely <grant.likely@secretlab.ca>2009-12-17 08:58:17 -0700
commit230d42d422e7b69fc9b270f41c69e63b54572e26 (patch)
treef2cec91b4795c78fa431134a73c5bf0e596a0482 /drivers/spi/Makefile
parent6aed4ee9b4610cd1e0315c90855b32e59ee81a15 (diff)
downloadvexpress-lsk-230d42d422e7b69fc9b270f41c69e63b54572e26.tar.gz
spi: Add s3c64xx SPI Controller driver
Each SPI controller has exactly one CS line and as such doesn't provide for multi-cs. We implement a workaround to support multi-cs by _not_ configuring the mux'ed CS pin for each SPI controller. The CS mechanism is assumed to be fully machine specific - the driver doesn't even assume some GPIO pin is used to control the CS. The driver selects between DMA and POLLING mode depending upon the xfer size - DMA mode for xfers bigger than FIFO size, POLLING mode otherwise. The driver has been designed to be capable of running SoCs since s3c64xx and till date, for that reason some of the register fields have been passed via, SoC specific, platform data. Signed-off-by: Jassi Brar <jassi.brar@samsung.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Diffstat (limited to 'drivers/spi/Makefile')
-rw-r--r--drivers/spi/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 33faa7fa0ab..f3d2810ba11 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o
obj-$(CONFIG_SPI_PPC4xx) += spi_ppc4xx.o
obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx_hw.o
+obj-$(CONFIG_SPI_S3C64XX) += spi_s3c64xx.o
obj-$(CONFIG_SPI_TXX9) += spi_txx9.o
obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o
obj-$(CONFIG_SPI_XILINX_OF) += xilinx_spi_of.o