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authorThomas Gleixner <tglx@linutronix.de>2013-04-17 10:33:13 +0200
committerThomas Gleixner <tglx@linutronix.de>2013-04-17 10:39:38 +0200
commitd190e8195b90bc1e65c494fe08e54e9e581bfd16 (patch)
treec605d086deeec31a94fb982779b54c15c2be876f /arch/xtensa
parent8198c1696a2cd15d436ade172bfd8085f5f818d3 (diff)
downloadvexpress-lsk-d190e8195b90bc1e65c494fe08e54e9e581bfd16.tar.gz
idle: Remove GENERIC_IDLE_LOOP config switch
All archs are converted over. Remove the config switch and the fallback code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/xtensa')
-rw-r--r--arch/xtensa/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig
index e0144ff4624..b09de49dbec 100644
--- a/arch/xtensa/Kconfig
+++ b/arch/xtensa/Kconfig
@@ -19,7 +19,6 @@ config XTENSA
select CLONE_BACKWARDS
select IRQ_DOMAIN
select HAVE_OPROFILE
- select GENERIC_IDLE_LOOP
help
Xtensa processors are 32-bit RISC machines designed by Tensilica
primarily for embedded systems. These processors are both