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authorWill Deacon <will.deacon@arm.com>2012-03-06 17:34:22 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-03-07 09:40:49 +0000
commit99c1745b9c76910e195889044f914b4898b7c9a5 (patch)
treef94661a5e2e6b663000c6f4fdf3a2311f2554f7d /arch/arm/kernel/perf_event_v7.c
parent5727347180ebc6b4a866fcbe00dcb39cc03acb37 (diff)
downloadvexpress-lsk-99c1745b9c76910e195889044f914b4898b7c9a5.tar.gz
ARM: 7355/1: perf: clear overflow flag when disabling counter on ARMv7 PMU
When disabling a counter on an ARMv7 PMU, we should also clear the overflow flag in case an overflow occurred whilst stopping the counter. This prevents a spurious overflow being picked up later and leading to either false accounting or a NULL dereference. Cc: <stable@vger.kernel.org> Reported-by: Ming Lei <tom.leiming@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/perf_event_v7.c')
-rw-r--r--arch/arm/kernel/perf_event_v7.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/kernel/perf_event_v7.c b/arch/arm/kernel/perf_event_v7.c
index 6f488610f8f..050cc8bf724 100644
--- a/arch/arm/kernel/perf_event_v7.c
+++ b/arch/arm/kernel/perf_event_v7.c
@@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx)
counter = ARMV7_IDX_TO_COUNTER(idx);
asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
+ isb();
+ /* Clear the overflow flag in case an interrupt is pending. */
+ asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
+ isb();
+
return idx;
}