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authorNicolas Pitre <nicolas.pitre@linaro.org>2013-03-19 23:59:04 -0400
committerJon Medhurst <tixy@linaro.org>2013-05-03 13:47:00 +0100
commit0943c1754d68ed11f10775b30d69ebe440813882 (patch)
tree2846eaa9ec2473df4a7fd956d06a3cb9c676d9a2
parent5215cc6c44ce1b882b1e63d7ff2e76234b943417 (diff)
downloadvexpress-lsk-0943c1754d68ed11f10775b30d69ebe440813882.tar.gz
gic: introduce gic_cpu_if_down()
This should be queued right before 'Revert "ARM: common: add GIC bybass disable on GIC CPU IF save function"'. Signed-off-by: Nicolas Pitre <nico@linaro.org>
-rw-r--r--drivers/irqchip/irq-gic.c6
-rw-r--r--include/linux/irqchip/arm-gic.h2
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index fc6aebf1e4b..3be382f18c2 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -452,6 +452,12 @@ static void __cpuinit gic_cpu_init(struct gic_chip_data *gic)
writel_relaxed(1, base + GIC_CPU_CTRL);
}
+void gic_cpu_if_down(void)
+{
+ void __iomem *cpu_base = gic_data_cpu_base(&gic_data[0]);
+ writel_relaxed(0, cpu_base + GIC_CPU_CTRL);
+}
+
#ifdef CONFIG_CPU_PM
/*
* Saves the GIC distributor registers during suspend or idle. Must be called
diff --git a/include/linux/irqchip/arm-gic.h b/include/linux/irqchip/arm-gic.h
index 3fd8e4290a1..2639f614a00 100644
--- a/include/linux/irqchip/arm-gic.h
+++ b/include/linux/irqchip/arm-gic.h
@@ -68,6 +68,8 @@ void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
void gic_secondary_init(unsigned int);
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
+void gic_cpu_if_down(void);
+
static inline void gic_init(unsigned int nr, int start,
void __iomem *dist , void __iomem *cpu)
{