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authorLinus Torvalds <torvalds@linux-foundation.org>2013-01-08 18:53:56 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2013-01-08 18:53:56 -0800
commit974b33586b4bbbdab33c666417f9ba9ef50b62c3 (patch)
tree0ee18a21c5d9fba897903e8505b606793cb8fb27
parentca5c8a4c2aba577b4cd2f4c3c72a768a80830294 (diff)
parent434fec16948cf5afa3cba31dcb00359bdbf24758 (diff)
downloadvexpress-lsk-974b33586b4bbbdab33c666417f9ba9ef50b62c3.tar.gz
Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson: "People are back from the holiday breaks, and it shows. Here are a bunch of fixes for a number of platforms: - A couple of small fixes for Nomadik - A larger set of changes for kirkwood/mvebu - uart driver selection, dt clocks, gpio-poweroff fixups, a few __init annotation fixes and some error handling improvement in their xor dma driver. - i.MX had a couple of minor fixes (and a critical one for flexcan2 clock setup) - MXS has a small board fix and a framebuffer bugfix - A set of fixes for Samsung Exynos, fixing default bootargs and some Exynos5440 clock issues - A set of OMAP changes including PM fixes and a few sparse warning fixups All in all a bit more positive code delta than we'd ideally want to see here, mostly from the OMAP PM changes, but nothing overly crazy." * tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits) ARM: clps711x: Fix bad merge of clockevents setup ARM: highbank: save and restore L2 cache and GIC on suspend ARM: highbank: add a power request clear ARM: highbank: fix secondary boot and hotplug ARM: highbank: fix typos with hignbank in power request functions ARM: dts: fix highbank cpu mpidr values ARM: dts: add device_type prop to cpu nodes on Calxeda platforms ARM: mx5: Fix MX53 flexcan2 clock ARM: OMAP2+: am33xx-hwmod: Fix wrongly terminated am33xx_usbss_mpu_irqs array pinctrl: mvebu: make pdma clock on dove mandatory ARM: Dove: Add pinctrl clock to DT dma: mv_xor: fix error handling for clocks dma: mv_xor: fix error handling of mv_xor_channel_add() arm: mvebu: Add missing ; for cpu node. arm: mvebu: Armada XP MV78230 has only three Ethernet interfaces arm: mvebu: Armada XP MV78230 has two cores, not one clk: mvebu: Remove inappropriate __init tagging ARM: Kirkwood: Use fixed-regulator instead of board gpio call ARM: Kirkwood: Fix missing sdio clock ARM: Kirkwood: Switch TWSI1 of 88f6282 to DT clock providers ...
-rw-r--r--Documentation/devicetree/bindings/clock/imx23-clock.txt5
-rw-r--r--Documentation/devicetree/bindings/clock/imx25-clock.txt4
-rw-r--r--Documentation/devicetree/bindings/clock/imx28-clock.txt5
-rw-r--r--Documentation/devicetree/bindings/clock/imx6q-clock.txt4
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-poweroff.txt20
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/boot/dts/armada-370-xp.dtsi6
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78230.dtsi9
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78260.dtsi8
-rw-r--r--arch/arm/boot/dts/armada-xp-mv78460.dtsi8
-rw-r--r--arch/arm/boot/dts/armada-xp.dtsi14
-rw-r--r--arch/arm/boot/dts/dove.dtsi1
-rw-r--r--arch/arm/boot/dts/ecx-2000.dts4
-rw-r--r--arch/arm/boot/dts/exynos4210-smdkv310.dts2
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi2
-rw-r--r--arch/arm/boot/dts/exynos5440-ssdk5440.dts2
-rw-r--r--arch/arm/boot/dts/highbank.dts20
-rw-r--r--arch/arm/boot/dts/imx23-olinuxino.dts8
-rw-r--r--arch/arm/boot/dts/imx31-bug.dts2
-rw-r--r--arch/arm/boot/dts/imx53.dtsi2
-rw-r--r--arch/arm/boot/dts/kirkwood-6282.dtsi1
-rw-r--r--arch/arm/boot/dts/kirkwood-topkick.dts17
-rw-r--r--arch/arm/boot/dts/kirkwood.dtsi1
-rw-r--r--arch/arm/configs/mvebu_defconfig4
-rw-r--r--arch/arm/mach-exynos/Kconfig2
-rw-r--r--arch/arm/mach-exynos/common.c7
-rw-r--r--arch/arm/mach-highbank/highbank.c2
-rw-r--r--arch/arm/mach-highbank/hotplug.c2
-rw-r--r--arch/arm/mach-highbank/platsmp.c12
-rw-r--r--arch/arm/mach-highbank/pm.c19
-rw-r--r--arch/arm/mach-highbank/sysregs.h23
-rw-r--r--arch/arm/mach-highbank/system.c4
-rw-r--r--arch/arm/mach-kirkwood/board-dt.c4
-rw-r--r--arch/arm/mach-kirkwood/board-usi_topkick.c4
-rw-r--r--arch/arm/mach-nomadik/board-nhk8815.c1
-rw-r--r--arch/arm/mach-nomadik/include/mach/irqs.h78
-rw-r--r--arch/arm/mach-omap1/board-ams-delta.c2
-rw-r--r--arch/arm/mach-omap1/usb.c8
-rw-r--r--arch/arm/mach-omap2/cclock3xxx_data.c2
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c6
-rw-r--r--arch/arm/mach-omap2/prm2xxx.c88
-rw-r--r--arch/arm/mach-omap2/prm2xxx_3xxx.c22
-rw-r--r--arch/arm/mach-omap2/prm3xxx.c28
-rw-r--r--arch/arm/mach-omap2/prm44xx.c6
-rw-r--r--arch/arm/mach-omap2/prm44xx.h4
-rw-r--r--arch/arm/plat-omap/counter_32k.c2
-rw-r--r--arch/arm/plat-omap/sram.c2
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h2
-rw-r--r--drivers/clk/mvebu/clk-gating-ctrl.c2
-rw-r--r--drivers/dma/mv_xor.c9
-rw-r--r--drivers/pinctrl/mvebu/pinctrl-dove.c7
-rw-r--r--drivers/power/reset/gpio-poweroff.c33
-rw-r--r--drivers/video/mxsfb.c3
53 files changed, 351 insertions, 183 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx23-clock.txt b/Documentation/devicetree/bindings/clock/imx23-clock.txt
index baadbb11fe9..5083c0b834b 100644
--- a/Documentation/devicetree/bindings/clock/imx23-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx23-clock.txt
@@ -60,11 +60,6 @@ clks: clkctrl@80040000 {
compatible = "fsl,imx23-clkctrl";
reg = <0x80040000 0x2000>;
#clock-cells = <1>;
- clock-output-names =
- ...
- "uart", /* 32 */
- ...
- "end_of_list";
};
auart0: serial@8006c000 {
diff --git a/Documentation/devicetree/bindings/clock/imx25-clock.txt b/Documentation/devicetree/bindings/clock/imx25-clock.txt
index c2a3525ecb4..db4f2f05c4d 100644
--- a/Documentation/devicetree/bindings/clock/imx25-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx25-clock.txt
@@ -146,10 +146,6 @@ clks: ccm@53f80000 {
compatible = "fsl,imx25-ccm";
reg = <0x53f80000 0x4000>;
interrupts = <31>;
- clock-output-names = ...
- "uart_ipg",
- "uart_serial",
- ...;
};
uart1: serial@43f90000 {
diff --git a/Documentation/devicetree/bindings/clock/imx28-clock.txt b/Documentation/devicetree/bindings/clock/imx28-clock.txt
index 52a49a4a50b..e6587af62ff 100644
--- a/Documentation/devicetree/bindings/clock/imx28-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx28-clock.txt
@@ -83,11 +83,6 @@ clks: clkctrl@80040000 {
compatible = "fsl,imx28-clkctrl";
reg = <0x80040000 0x2000>;
#clock-cells = <1>;
- clock-output-names =
- ...
- "uart", /* 45 */
- ...
- "end_of_list";
};
auart0: serial@8006a000 {
diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.txt b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
index d77b4e68dc4..f73fdf59556 100644
--- a/Documentation/devicetree/bindings/clock/imx6q-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx6q-clock.txt
@@ -211,10 +211,6 @@ clks: ccm@020c4000 {
reg = <0x020c4000 0x4000>;
interrupts = <0 87 0x04 0 88 0x04>;
#clock-cells = <1>;
- clock-output-names = ...
- "uart_ipg",
- "uart_serial",
- ...;
};
uart1: serial@02020000 {
diff --git a/Documentation/devicetree/bindings/gpio/gpio-poweroff.txt b/Documentation/devicetree/bindings/gpio/gpio-poweroff.txt
index 558cdf3c9ab..d4eab9227ea 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-poweroff.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-poweroff.txt
@@ -1,4 +1,19 @@
-GPIO line that should be set high/low to power off a device
+Driver a GPIO line that can be used to turn the power off.
+
+The driver supports both level triggered and edge triggered power off.
+At driver load time, the driver will request the given gpio line and
+install a pm_power_off handler. If the optional properties 'input' is
+not found, the GPIO line will be driven in the inactive
+state. Otherwise its configured as an input.
+
+When the pm_power_off is called, the gpio is configured as an output,
+and drive active, so triggering a level triggered power off
+condition. This will also cause an inactive->active edge condition, so
+triggering positive edge triggered power off. After a delay of 100ms,
+the GPIO is set to inactive, thus causing an active->inactive edge,
+triggering negative edge triggered power off. After another 100ms
+delay the GPIO is driver active again. If the power is still on and
+the CPU still running after a 3000ms delay, a WARN_ON(1) is emitted.
Required properties:
- compatible : should be "gpio-poweroff".
@@ -13,10 +28,9 @@ Optional properties:
property is not specified, the GPIO is initialized as an output in its
inactive state.
-
Examples:
gpio-poweroff {
compatible = "gpio-poweroff";
- gpios = <&gpio 4 0>; /* GPIO 4 Active Low */
+ gpios = <&gpio 4 0>;
};
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index f95ba14ae3d..ab864d9545d 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -371,7 +371,6 @@ config ARCH_CNS3XXX
config ARCH_CLPS711X
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
select ARCH_REQUIRE_GPIOLIB
- select ARCH_USES_GETTIMEOFFSET
select AUTO_ZRELADDR
select CLKDEV_LOOKUP
select COMMON_CLK
diff --git a/arch/arm/boot/dts/armada-370-xp.dtsi b/arch/arm/boot/dts/armada-370-xp.dtsi
index cf6c48a09ea..4c0abe85405 100644
--- a/arch/arm/boot/dts/armada-370-xp.dtsi
+++ b/arch/arm/boot/dts/armada-370-xp.dtsi
@@ -50,17 +50,19 @@
ranges;
serial@d0012000 {
- compatible = "ns16550";
+ compatible = "snps,dw-apb-uart";
reg = <0xd0012000 0x100>;
reg-shift = <2>;
interrupts = <41>;
+ reg-io-width = <4>;
status = "disabled";
};
serial@d0012100 {
- compatible = "ns16550";
+ compatible = "snps,dw-apb-uart";
reg = <0xd0012100 0x100>;
reg-shift = <2>;
interrupts = <42>;
+ reg-io-width = <4>;
status = "disabled";
};
diff --git a/arch/arm/boot/dts/armada-xp-mv78230.dtsi b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
index c45c7b4dc35..271855a6e22 100644
--- a/arch/arm/boot/dts/armada-xp-mv78230.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78230.dtsi
@@ -34,7 +34,14 @@
reg = <0>;
clocks = <&cpuclk 0>;
};
- }
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "marvell,sheeva-v7";
+ reg = <1>;
+ clocks = <&cpuclk 1>;
+ };
+ };
soc {
pinctrl {
diff --git a/arch/arm/boot/dts/armada-xp-mv78260.dtsi b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
index a2aee570737..1c1937dbce7 100644
--- a/arch/arm/boot/dts/armada-xp-mv78260.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78260.dtsi
@@ -85,5 +85,13 @@
#interrupts-cells = <2>;
interrupts = <24>;
};
+
+ ethernet@d0034000 {
+ compatible = "marvell,armada-370-neta";
+ reg = <0xd0034000 0x2500>;
+ interrupts = <14>;
+ clocks = <&gateclk 1>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/arm/boot/dts/armada-xp-mv78460.dtsi b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
index da03a129243..4905cf3a5ef 100644
--- a/arch/arm/boot/dts/armada-xp-mv78460.dtsi
+++ b/arch/arm/boot/dts/armada-xp-mv78460.dtsi
@@ -100,5 +100,13 @@
#interrupts-cells = <2>;
interrupts = <24>;
};
+
+ ethernet@d0034000 {
+ compatible = "marvell,armada-370-neta";
+ reg = <0xd0034000 0x2500>;
+ interrupts = <14>;
+ clocks = <&gateclk 1>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi
index 367aa3f9491..2e37ef101c9 100644
--- a/arch/arm/boot/dts/armada-xp.dtsi
+++ b/arch/arm/boot/dts/armada-xp.dtsi
@@ -42,17 +42,19 @@
soc {
serial@d0012200 {
- compatible = "ns16550";
+ compatible = "snps,dw-apb-uart";
reg = <0xd0012200 0x100>;
reg-shift = <2>;
interrupts = <43>;
+ reg-io-width = <4>;
status = "disabled";
};
serial@d0012300 {
- compatible = "ns16550";
+ compatible = "snps,dw-apb-uart";
reg = <0xd0012300 0x100>;
reg-shift = <2>;
interrupts = <44>;
+ reg-io-width = <4>;
status = "disabled";
};
@@ -93,14 +95,6 @@
status = "disabled";
};
- ethernet@d0034000 {
- compatible = "marvell,armada-370-neta";
- reg = <0xd0034000 0x2500>;
- interrupts = <14>;
- clocks = <&gateclk 1>;
- status = "disabled";
- };
-
xor@d0060900 {
compatible = "marvell,orion-xor";
reg = <0xd0060900 0x100
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi
index f3f7e9d8adc..42eac1ff3cc 100644
--- a/arch/arm/boot/dts/dove.dtsi
+++ b/arch/arm/boot/dts/dove.dtsi
@@ -117,6 +117,7 @@
pinctrl: pinctrl@d0200 {
compatible = "marvell,dove-pinctrl";
reg = <0xd0200 0x10>;
+ clocks = <&gate_clk 22>;
};
spi0: spi@10600 {
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
index 46477ac1de9..139b40cc3a2 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -32,6 +32,7 @@
cpu@0 {
compatible = "arm,cortex-a15";
+ device_type = "cpu";
reg = <0>;
clocks = <&a9pll>;
clock-names = "cpu";
@@ -39,6 +40,7 @@
cpu@1 {
compatible = "arm,cortex-a15";
+ device_type = "cpu";
reg = <1>;
clocks = <&a9pll>;
clock-names = "cpu";
@@ -46,6 +48,7 @@
cpu@2 {
compatible = "arm,cortex-a15";
+ device_type = "cpu";
reg = <2>;
clocks = <&a9pll>;
clock-names = "cpu";
@@ -53,6 +56,7 @@
cpu@3 {
compatible = "arm,cortex-a15";
+ device_type = "cpu";
reg = <3>;
clocks = <&a9pll>;
clock-names = "cpu";
diff --git a/arch/arm/boot/dts/exynos4210-smdkv310.dts b/arch/arm/boot/dts/exynos4210-smdkv310.dts
index 9b23a8255e3..f63490707f3 100644
--- a/arch/arm/boot/dts/exynos4210-smdkv310.dts
+++ b/arch/arm/boot/dts/exynos4210-smdkv310.dts
@@ -26,7 +26,7 @@
};
chosen {
- bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
+ bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
};
sdhci@12530000 {
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 2e3b6efaf1a..3acf594ea60 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -574,7 +574,7 @@
hdmi {
compatible = "samsung,exynos5-hdmi";
- reg = <0x14530000 0x100000>;
+ reg = <0x14530000 0x70000>;
interrupts = <0 95 0>;
};
diff --git a/arch/arm/boot/dts/exynos5440-ssdk5440.dts b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
index 921c83cf694..81e2c964a90 100644
--- a/arch/arm/boot/dts/exynos5440-ssdk5440.dts
+++ b/arch/arm/boot/dts/exynos5440-ssdk5440.dts
@@ -21,7 +21,7 @@
};
chosen {
- bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC2,115200 init=/linuxrc";
+ bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC0,115200 init=/linuxrc";
};
spi {
diff --git a/arch/arm/boot/dts/highbank.dts b/arch/arm/boot/dts/highbank.dts
index a9ae5d32e80..5927a8df562 100644
--- a/arch/arm/boot/dts/highbank.dts
+++ b/arch/arm/boot/dts/highbank.dts
@@ -30,33 +30,37 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@0 {
+ cpu@900 {
compatible = "arm,cortex-a9";
- reg = <0>;
+ device_type = "cpu";
+ reg = <0x900>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
clock-names = "cpu";
};
- cpu@1 {
+ cpu@901 {
compatible = "arm,cortex-a9";
- reg = <1>;
+ device_type = "cpu";
+ reg = <0x901>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
clock-names = "cpu";
};
- cpu@2 {
+ cpu@902 {
compatible = "arm,cortex-a9";
- reg = <2>;
+ device_type = "cpu";
+ reg = <0x902>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
clock-names = "cpu";
};
- cpu@3 {
+ cpu@903 {
compatible = "arm,cortex-a9";
- reg = <3>;
+ device_type = "cpu";
+ reg = <0x903>;
next-level-cache = <&L2>;
clocks = <&a9pll>;
clock-names = "cpu";
diff --git a/arch/arm/boot/dts/imx23-olinuxino.dts b/arch/arm/boot/dts/imx23-olinuxino.dts
index 7c43b8e70b9..e7484e4ea65 100644
--- a/arch/arm/boot/dts/imx23-olinuxino.dts
+++ b/arch/arm/boot/dts/imx23-olinuxino.dts
@@ -39,17 +39,17 @@
hog_pins_a: hog@0 {
reg = <0>;
fsl,pinmux-ids = <
- 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */
+ 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
fsl,pull-up = <0>;
};
- led_pin_gpio0_17: led_gpio0_17@0 {
+ led_pin_gpio2_1: led_gpio2_1@0 {
reg = <0>;
fsl,pinmux-ids = <
- 0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */
+ 0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */
>;
fsl,drive-strength = <0>;
fsl,voltage = <1>;
@@ -110,7 +110,7 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
- pinctrl-0 = <&led_pin_gpio0_17>;
+ pinctrl-0 = <&led_pin_gpio2_1>;
user {
label = "green";
diff --git a/arch/arm/boot/dts/imx31-bug.dts b/arch/arm/boot/dts/imx31-bug.dts
index 24731cb78e8..7f67402328d 100644
--- a/arch/arm/boot/dts/imx31-bug.dts
+++ b/arch/arm/boot/dts/imx31-bug.dts
@@ -14,7 +14,7 @@
/ {
model = "Buglabs i.MX31 Bug 1.x";
- compatible = "fsl,imx31-bug", "fsl,imx31";
+ compatible = "buglabs,imx31-bug", "fsl,imx31";
memory {
reg = <0x80000000 0x8000000>; /* 128M */
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 552aed4ff98..edc3f1eb669 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -492,7 +492,7 @@
compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
reg = <0x53fcc000 0x4000>;
interrupts = <83>;
- clocks = <&clks 158>, <&clks 157>;
+ clocks = <&clks 87>, <&clks 86>;
clock-names = "ipg", "per";
status = "disabled";
};
diff --git a/arch/arm/boot/dts/kirkwood-6282.dtsi b/arch/arm/boot/dts/kirkwood-6282.dtsi
index 9ae2004d567..4ccea2130a6 100644
--- a/arch/arm/boot/dts/kirkwood-6282.dtsi
+++ b/arch/arm/boot/dts/kirkwood-6282.dtsi
@@ -39,6 +39,7 @@
#size-cells = <0>;
interrupts = <32>;
clock-frequency = <100000>;
+ clocks = <&gate_clk 7>;
status = "disabled";
};
};
diff --git a/arch/arm/boot/dts/kirkwood-topkick.dts b/arch/arm/boot/dts/kirkwood-topkick.dts
index c0de5a7f660..cd15452a52a 100644
--- a/arch/arm/boot/dts/kirkwood-topkick.dts
+++ b/arch/arm/boot/dts/kirkwood-topkick.dts
@@ -82,4 +82,21 @@
gpios = <&gpio1 16 1>;
};
};
+ regulators {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sata0_power: regulator@1 {
+ compatible = "regulator-fixed";
+ reg = <1>;
+ regulator-name = "SATA0 Power";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio1 4 0>;
+ };
+ };
};
diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi
index 7735cee4a9c..110d6cbb795 100644
--- a/arch/arm/boot/dts/kirkwood.dtsi
+++ b/arch/arm/boot/dts/kirkwood.dtsi
@@ -144,6 +144,7 @@
compatible = "marvell,orion-ehci";
reg = <0x50000 0x1000>;
interrupts = <19>;
+ clocks = <&gate_clk 3>;
status = "okay";
};
diff --git a/arch/arm/configs/mvebu_defconfig b/arch/arm/configs/mvebu_defconfig
index a702fb345c0..b5bc96cb65a 100644
--- a/arch/arm/configs/mvebu_defconfig
+++ b/arch/arm/configs/mvebu_defconfig
@@ -33,9 +33,7 @@ CONFIG_MVNETA=y
CONFIG_MARVELL_PHY=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_OF_PLATFORM=y
-CONFIG_I2C=y
-CONFIG_I2C_MV64XXX=y
+CONFIG_SERIAL_8250_DW=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_SYSFS=y
# CONFIG_USB_SUPPORT is not set
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 91d5b6f1d5a..e103c290bc9 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -74,6 +74,8 @@ config SOC_EXYNOS5440
depends on ARCH_EXYNOS5
select ARM_ARCH_TIMER
select AUTO_ZRELADDR
+ select PINCTRL
+ select PINCTRL_EXYNOS5440
help
Enable EXYNOS5440 SoC support
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index d6d0dc65108..1a89824a5f7 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -424,11 +424,18 @@ static void __init exynos5_init_clocks(int xtal)
{
printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+ /* EXYNOS5440 can support only common clock framework */
+
+ if (soc_is_exynos5440())
+ return;
+
+#ifdef CONFIG_SOC_EXYNOS5250
s3c24xx_register_baseclocks(xtal);
s5p_register_clocks(xtal);
exynos5_register_clocks();
exynos5_setup_clocks();
+#endif
}
#define COMBINER_ENABLE_SET 0x0
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index dc248167d20..981dc1e1da5 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -135,7 +135,7 @@ static struct sys_timer highbank_timer = {
static void highbank_power_off(void)
{
- hignbank_set_pwr_shutdown();
+ highbank_set_pwr_shutdown();
while (1)
cpu_do_idle();
diff --git a/arch/arm/mach-highbank/hotplug.c b/arch/arm/mach-highbank/hotplug.c
index 7b60faccd55..f30c5284339 100644
--- a/arch/arm/mach-highbank/hotplug.c
+++ b/arch/arm/mach-highbank/hotplug.c
@@ -30,7 +30,7 @@ void __ref highbank_cpu_die(unsigned int cpu)
{
flush_cache_all();
- highbank_set_cpu_jump(cpu, secondary_startup);
+ highbank_set_cpu_jump(cpu, phys_to_virt(0));
highbank_set_core_pwr();
cpu_do_idle();
diff --git a/arch/arm/mach-highbank/platsmp.c b/arch/arm/mach-highbank/platsmp.c
index 1129957f6c1..4ecc864ac8b 100644
--- a/arch/arm/mach-highbank/platsmp.c
+++ b/arch/arm/mach-highbank/platsmp.c
@@ -32,6 +32,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu)
static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
+ highbank_set_cpu_jump(cpu, secondary_startup);
gic_raise_softirq(cpumask_of(cpu), 0);
return 0;
}
@@ -61,19 +62,8 @@ static void __init highbank_smp_init_cpus(void)
static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
{
- int i;
-
if (scu_base_addr)
scu_enable(scu_base_addr);
-
- /*
- * Write the address of secondary startup into the jump table
- * The cores are in wfi and wait until they receive a soft interrupt
- * and a non-zero value to jump to. Then the secondary CPU branches
- * to this address.
- */
- for (i = 1; i < max_cpus; i++)
- highbank_set_cpu_jump(i, secondary_startup);
}
struct smp_operations highbank_smp_ops __initdata = {
diff --git a/arch/arm/mach-highbank/pm.c b/arch/arm/mach-highbank/pm.c
index 74aa135966f..04eddb4f438 100644
--- a/arch/arm/mach-highbank/pm.c
+++ b/arch/arm/mach-highbank/pm.c
@@ -14,10 +14,12 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
+#include <linux/cpu_pm.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/suspend.h>
+#include <asm/cacheflush.h>
#include <asm/proc-fns.h>
#include <asm/suspend.h>
@@ -26,16 +28,31 @@
static int highbank_suspend_finish(unsigned long val)
{
+ outer_flush_all();
+ outer_disable();
+
+ highbank_set_pwr_suspend();
+
cpu_do_idle();
+
+ highbank_clear_pwr_request();
return 0;
}
static int highbank_pm_enter(suspend_state_t state)
{
- hignbank_set_pwr_suspend();
+ cpu_pm_enter();
+ cpu_cluster_pm_enter();
+
highbank_set_cpu_jump(0, cpu_resume);
cpu_suspend(0, highbank_suspend_finish);
+ cpu_cluster_pm_exit();
+ cpu_pm_exit();
+
+ highbank_smc1(0x102, 0x1);
+ if (scu_base_addr)
+ scu_enable(scu_base_addr);
return 0;
}
diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h
index e13e8ea7c6c..70af9d13fce 100644
--- a/arch/arm/mach-highbank/sysregs.h
+++ b/arch/arm/mach-highbank/sysregs.h
@@ -44,28 +44,43 @@ static inline void highbank_set_core_pwr(void)
writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
}
-static inline void hignbank_set_pwr_suspend(void)
+static inline void highbank_clear_core_pwr(void)
+{
+ int cpu = cpu_logical_map(smp_processor_id());
+ if (scu_base_addr)
+ scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
+ else
+ writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu));
+}
+
+static inline void highbank_set_pwr_suspend(void)
{
writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr();
}
-static inline void hignbank_set_pwr_shutdown(void)
+static inline void highbank_set_pwr_shutdown(void)
{
writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr();
}
-static inline void hignbank_set_pwr_soft_reset(void)
+static inline void highbank_set_pwr_soft_reset(void)
{
writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr();
}
-static inline void hignbank_set_pwr_hard_reset(void)
+static inline void highbank_set_pwr_hard_reset(void)
{
writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
highbank_set_core_pwr();
}
+static inline void highbank_clear_pwr_request(void)
+{
+ writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ);
+ highbank_clear_core_pwr();
+}
+
#endif
diff --git a/arch/arm/mach-highbank/system.c b/arch/arm/mach-highbank/system.c
index aed96ad9bd4..37d8384dcf1 100644
--- a/arch/arm/mach-highbank/system.c
+++ b/arch/arm/mach-highbank/system.c
@@ -22,9 +22,9 @@
void highbank_restart(char mode, const char *cmd)
{
if (mode == 'h')
- hignbank_set_pwr_hard_reset();
+ highbank_set_pwr_hard_reset();
else
- hignbank_set_pwr_soft_reset();
+ highbank_set_pwr_soft_reset();
while (1)
cpu_do_idle();
diff --git a/arch/arm/mach-kirkwood/board-dt.c b/arch/arm/mach-kirkwood/board-dt.c
index ff4150a2ad0..de4fd2bb1e2 100644
--- a/arch/arm/mach-kirkwood/board-dt.c
+++ b/arch/arm/mach-kirkwood/board-dt.c
@@ -67,6 +67,10 @@ static void __init kirkwood_legacy_clk_init(void)
orion_clkdev_add(NULL, "mv643xx_eth_port.1",
of_clk_get_from_provider(&clkspec));
+ clkspec.args[0] = CGC_BIT_SDIO;
+ orion_clkdev_add(NULL, "mvsdio",
+ of_clk_get_from_provider(&clkspec));
+
}
static void __init kirkwood_of_clk_init(void)
diff --git a/arch/arm/mach-kirkwood/board-usi_topkick.c b/arch/arm/mach-kirkwood/board-usi_topkick.c
index 15e69fcde9f..23d2dd1b1b1 100644
--- a/arch/arm/mach-kirkwood/board-usi_topkick.c
+++ b/arch/arm/mach-kirkwood/board-usi_topkick.c
@@ -64,8 +64,6 @@ static unsigned int topkick_mpp_config[] __initdata = {
0
};
-#define TOPKICK_SATA0_PWR_ENABLE 36
-
void __init usi_topkick_init(void)
{
/*
@@ -73,8 +71,6 @@ void __init usi_topkick_init(void)
*/
kirkwood_mpp_conf(topkick_mpp_config);
- /* SATA0 power enable */
- gpio_set_value(TOPKICK_SATA0_PWR_ENABLE, 1);
kirkwood_ge00_init(&topkick_ge00_data);
kirkwood_sdio_init(&topkick_mvsdio_data);
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c
index 98167a4319f..9f19069248d 100644
--- a/arch/arm/mach-nomadik/board-nhk8815.c
+++ b/arch/arm/mach-nomadik/board-nhk8815.c
@@ -27,7 +27,6 @@
#include <linux/pinctrl/machine.h>
#include <linux/platform_data/pinctrl-nomadik.h>
#include <linux/platform_data/clocksource-nomadik-mtu.h>
-#include <linux/platform_data/mtd-nomadik-nand.h>
#include <asm/hardware/vic.h>
#include <asm/sizes.h>
#include <asm/mach-types.h>
diff --git a/arch/arm/mach-nomadik/include/mach/irqs.h b/arch/arm/mach-nomadik/include/mach/irqs.h
index b549d057154..215f8cdb400 100644
--- a/arch/arm/mach-nomadik/include/mach/irqs.h
+++ b/arch/arm/mach-nomadik/include/mach/irqs.h
@@ -22,49 +22,49 @@
#include <mach/hardware.h>
-#define IRQ_VIC_START 1 /* first VIC interrupt is 1 */
+#define IRQ_VIC_START 32 /* first VIC interrupt is 1 */
/*
* Interrupt numbers generic for all Nomadik Chip cuts
*/
-#define IRQ_WATCHDOG 1
-#define IRQ_SOFTINT 2
-#define IRQ_CRYPTO 3
-#define IRQ_OWM 4
-#define IRQ_MTU0 5
-#define IRQ_MTU1 6
-#define IRQ_GPIO0 7
-#define IRQ_GPIO1 8
-#define IRQ_GPIO2 9
-#define IRQ_GPIO3 10
-#define IRQ_RTC_RTT 11
-#define IRQ_SSP 12
-#define IRQ_UART0 13
-#define IRQ_DMA1 14
-#define IRQ_CLCD_MDIF 15
-#define IRQ_DMA0 16
-#define IRQ_PWRFAIL 17
-#define IRQ_UART1 18
-#define IRQ_FIRDA 19
-#define IRQ_MSP0 20
-#define IRQ_I2C0 21
-#define IRQ_I2C1 22
-#define IRQ_SDMMC 23
-#define IRQ_USBOTG 24
-#define IRQ_SVA_IT0 25
-#define IRQ_SVA_IT1 26
-#define IRQ_SAA_IT0 27
-#define IRQ_SAA_IT1 28
-#define IRQ_UART2 29
-#define IRQ_MSP2 30
-#define IRQ_L2CC 49
-#define IRQ_HPI 50
-#define IRQ_SKE 51
-#define IRQ_KP 52
-#define IRQ_MEMST 55
-#define IRQ_SGA_IT 59
-#define IRQ_USBM 61
-#define IRQ_MSP1 63
+#define IRQ_WATCHDOG (IRQ_VIC_START+0)
+#define IRQ_SOFTINT (IRQ_VIC_START+1)
+#define IRQ_CRYPTO (IRQ_VIC_START+2)
+#define IRQ_OWM (IRQ_VIC_START+3)
+#define IRQ_MTU0 (IRQ_VIC_START+4)
+#define IRQ_MTU1 (IRQ_VIC_START+5)
+#define IRQ_GPIO0 (IRQ_VIC_START+6)
+#define IRQ_GPIO1 (IRQ_VIC_START+7)
+#define IRQ_GPIO2 (IRQ_VIC_START+8)
+#define IRQ_GPIO3 (IRQ_VIC_START+9)
+#define IRQ_RTC_RTT (IRQ_VIC_START+10)
+#define IRQ_SSP (IRQ_VIC_START+11)
+#define IRQ_UART0 (IRQ_VIC_START+12)
+#define IRQ_DMA1 (IRQ_VIC_START+13)
+#define IRQ_CLCD_MDIF (IRQ_VIC_START+14)
+#define IRQ_DMA0 (IRQ_VIC_START+15)
+#define IRQ_PWRFAIL (IRQ_VIC_START+16)
+#define IRQ_UART1 (IRQ_VIC_START+17)
+#define IRQ_FIRDA (IRQ_VIC_START+18)
+#define IRQ_MSP0 (IRQ_VIC_START+19)
+#define IRQ_I2C0 (IRQ_VIC_START+20)
+#define IRQ_I2C1 (IRQ_VIC_START+21)
+#define IRQ_SDMMC (IRQ_VIC_START+22)
+#define IRQ_USBOTG (IRQ_VIC_START+23)
+#define IRQ_SVA_IT0 (IRQ_VIC_START+24)
+#define IRQ_SVA_IT1 (IRQ_VIC_START+25)
+#define IRQ_SAA_IT0 (IRQ_VIC_START+26)
+#define IRQ_SAA_IT1 (IRQ_VIC_START+27)
+#define IRQ_UART2 (IRQ_VIC_START+28)
+#define IRQ_MSP2 (IRQ_VIC_START+29)
+#define IRQ_L2CC (IRQ_VIC_START+30)
+#define IRQ_HPI (IRQ_VIC_START+31)
+#define IRQ_SKE (IRQ_VIC_START+32)
+#define IRQ_KP (IRQ_VIC_START+33)
+#define IRQ_MEMST (IRQ_VIC_START+34)
+#define IRQ_SGA_IT (IRQ_VIC_START+35)
+#define IRQ_USBM (IRQ_VIC_START+36)
+#define IRQ_MSP1 (IRQ_VIC_START+37)
#define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64)
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index a8fce3ccc70..2e98a3ac7c5 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -160,7 +160,7 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = {
.ctrl_name = "internal",
};
-static struct omap_usb_config ams_delta_usb_config = {
+static struct omap_usb_config ams_delta_usb_config __initdata = {
.register_host = 1,
.hmc_mode = 16,
.pins[0] = 2,
diff --git a/arch/arm/mach-omap1/usb.c b/arch/arm/mach-omap1/usb.c
index 104fed366b8..1a1db5971cd 100644
--- a/arch/arm/mach-omap1/usb.c
+++ b/arch/arm/mach-omap1/usb.c
@@ -629,8 +629,14 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config)
static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
#endif
-void __init omap1_usb_init(struct omap_usb_config *pdata)
+void __init omap1_usb_init(struct omap_usb_config *_pdata)
{
+ struct omap_usb_config *pdata;
+
+ pdata = kmemdup(_pdata, sizeof(*pdata), GFP_KERNEL);
+ if (!pdata)
+ return;
+
pdata->usb0_init = omap1_usb0_init;
pdata->usb1_init = omap1_usb1_init;
pdata->usb2_init = omap1_usb2_init;
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index bdf39481fbd..6ef87580c33 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -1167,6 +1167,8 @@ static const struct clk_ops emu_src_ck_ops = {
.recalc_rate = &omap2_clksel_recalc,
.get_parent = &omap2_clksel_find_parent_index,
.set_parent = &omap2_clksel_set_parent,
+ .enable = &omap2_clkops_enable_clkdm,
+ .disable = &omap2_clkops_disable_clkdm,
};
static struct clk emu_src_ck;
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 081c71edddf..646c14d9fdb 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -2070,7 +2070,7 @@ static struct omap_hwmod_irq_info am33xx_usbss_mpu_irqs[] = {
{ .name = "usbss-irq", .irq = 17 + OMAP_INTC_START, },
{ .name = "musb0-irq", .irq = 18 + OMAP_INTC_START, },
{ .name = "musb1-irq", .irq = 19 + OMAP_INTC_START, },
- { .irq = -1 + OMAP_INTC_START, },
+ { .irq = -1, },
};
static struct omap_hwmod am33xx_usbss_hwmod = {
@@ -2515,7 +2515,7 @@ static struct omap_hwmod_ocp_if am33xx_l4_hs__cpgmac0 = {
.user = OCP_USER_MPU,
};
-struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
+static struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
{
.pa_start = 0x4A101000,
.pa_end = 0x4A101000 + SZ_256 - 1,
@@ -2523,7 +2523,7 @@ struct omap_hwmod_addr_space am33xx_mdio_addr_space[] = {
{ }
};
-struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
+static struct omap_hwmod_ocp_if am33xx_cpgmac0__mdio = {
.master = &am33xx_cpgmac0_hwmod,
.slave = &am33xx_mdio_hwmod,
.addr = am33xx_mdio_addr_space,
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index cc0e71430af..418de9c3b31 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -28,6 +28,14 @@
#include "prm-regbits-24xx.h"
/*
+ * OMAP24xx PM_PWSTCTRL_*.POWERSTATE and PM_PWSTST_*.LASTSTATEENTERED bits -
+ * these are reversed from the bits used on OMAP3+
+ */
+#define OMAP24XX_PWRDM_POWER_ON 0x0
+#define OMAP24XX_PWRDM_POWER_RET 0x1
+#define OMAP24XX_PWRDM_POWER_OFF 0x3
+
+/*
* omap2xxx_prm_reset_src_map - map from bits in the PRM_RSTST_WKUP
* hardware register (which are specific to the OMAP2xxx SoCs) to
* reset source ID bit shifts (which is an OMAP SoC-independent
@@ -68,6 +76,34 @@ static u32 omap2xxx_prm_read_reset_sources(void)
}
/**
+ * omap2xxx_pwrst_to_common_pwrst - convert OMAP2xxx pwrst to common pwrst
+ * @omap2xxx_pwrst: OMAP2xxx hardware power state to convert
+ *
+ * Return the common power state bits corresponding to the OMAP2xxx
+ * hardware power state bits @omap2xxx_pwrst, or -EINVAL upon error.
+ */
+static int omap2xxx_pwrst_to_common_pwrst(u8 omap2xxx_pwrst)
+{
+ u8 pwrst;
+
+ switch (omap2xxx_pwrst) {
+ case OMAP24XX_PWRDM_POWER_OFF:
+ pwrst = PWRDM_POWER_OFF;
+ break;
+ case OMAP24XX_PWRDM_POWER_RET:
+ pwrst = PWRDM_POWER_RET;
+ break;
+ case OMAP24XX_PWRDM_POWER_ON:
+ pwrst = PWRDM_POWER_ON;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return pwrst;
+}
+
+/**
* omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
*
* Set the DPLL reset bit, which should reboot the SoC. This is the
@@ -97,10 +133,56 @@ int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm)
return 0;
}
+static int omap2xxx_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
+{
+ u8 omap24xx_pwrst;
+
+ switch (pwrst) {
+ case PWRDM_POWER_OFF:
+ omap24xx_pwrst = OMAP24XX_PWRDM_POWER_OFF;
+ break;
+ case PWRDM_POWER_RET:
+ omap24xx_pwrst = OMAP24XX_PWRDM_POWER_RET;
+ break;
+ case PWRDM_POWER_ON:
+ omap24xx_pwrst = OMAP24XX_PWRDM_POWER_ON;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
+ (omap24xx_pwrst << OMAP_POWERSTATE_SHIFT),
+ pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
+ return 0;
+}
+
+static int omap2xxx_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
+{
+ u8 omap2xxx_pwrst;
+
+ omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTCTRL,
+ OMAP_POWERSTATE_MASK);
+
+ return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
+}
+
+static int omap2xxx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
+{
+ u8 omap2xxx_pwrst;
+
+ omap2xxx_pwrst = omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTST,
+ OMAP_POWERSTATEST_MASK);
+
+ return omap2xxx_pwrst_to_common_pwrst(omap2xxx_pwrst);
+}
+
struct pwrdm_ops omap2_pwrdm_operations = {
- .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst,
- .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst,
- .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst,
+ .pwrdm_set_next_pwrst = omap2xxx_pwrdm_set_next_pwrst,
+ .pwrdm_read_next_pwrst = omap2xxx_pwrdm_read_next_pwrst,
+ .pwrdm_read_pwrst = omap2xxx_pwrdm_read_pwrst,
.pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
.pwrdm_set_mem_onst = omap2_pwrdm_set_mem_onst,
.pwrdm_set_mem_retst = omap2_pwrdm_set_mem_retst,
diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c
index 30517f5af70..a3e121f94a8 100644
--- a/arch/arm/mach-omap2/prm2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c
@@ -103,28 +103,6 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift)
/* Powerdomain low-level functions */
/* Common functions across OMAP2 and OMAP3 */
-int omap2_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
-{
- omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
- (pwrst << OMAP_POWERSTATE_SHIFT),
- pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
- return 0;
-}
-
-int omap2_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
-{
- return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
- OMAP2_PM_PWSTCTRL,
- OMAP_POWERSTATE_MASK);
-}
-
-int omap2_pwrdm_read_pwrst(struct powerdomain *pwrdm)
-{
- return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
- OMAP2_PM_PWSTST,
- OMAP_POWERSTATEST_MASK);
-}
-
int omap2_pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank,
u8 pwrst)
{
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 39822aabcff..e648bd55b07 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -277,6 +277,28 @@ static u32 omap3xxx_prm_read_reset_sources(void)
/* Powerdomain low-level functions */
+static int omap3_pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
+{
+ omap2_prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
+ (pwrst << OMAP_POWERSTATE_SHIFT),
+ pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL);
+ return 0;
+}
+
+static int omap3_pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
+{
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTCTRL,
+ OMAP_POWERSTATE_MASK);
+}
+
+static int omap3_pwrdm_read_pwrst(struct powerdomain *pwrdm)
+{
+ return omap2_prm_read_mod_bits_shift(pwrdm->prcm_offs,
+ OMAP2_PM_PWSTST,
+ OMAP_POWERSTATEST_MASK);
+}
+
/* Applicable only for OMAP3. Not supported on OMAP2 */
static int omap3_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
{
@@ -355,9 +377,9 @@ static int omap3_pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
}
struct pwrdm_ops omap3_pwrdm_operations = {
- .pwrdm_set_next_pwrst = omap2_pwrdm_set_next_pwrst,
- .pwrdm_read_next_pwrst = omap2_pwrdm_read_next_pwrst,
- .pwrdm_read_pwrst = omap2_pwrdm_read_pwrst,
+ .pwrdm_set_next_pwrst = omap3_pwrdm_set_next_pwrst,
+ .pwrdm_read_next_pwrst = omap3_pwrdm_read_next_pwrst,
+ .pwrdm_read_pwrst = omap3_pwrdm_read_pwrst,
.pwrdm_read_prev_pwrst = omap3_pwrdm_read_prev_pwrst,
.pwrdm_set_logic_retst = omap2_pwrdm_set_logic_retst,
.pwrdm_read_logic_pwrst = omap3_pwrdm_read_logic_pwrst,
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 7498bc77fe8..c05a343d465 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -56,9 +56,9 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
* enumeration)
*/
static struct prm_reset_src_map omap44xx_prm_reset_src_map[] = {
- { OMAP4430_RST_GLOBAL_WARM_SW_SHIFT,
+ { OMAP4430_GLOBAL_WARM_SW_RST_SHIFT,
OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT },
- { OMAP4430_RST_GLOBAL_COLD_SW_SHIFT,
+ { OMAP4430_GLOBAL_COLD_RST_SHIFT,
OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT },
{ OMAP4430_MPU_SECURITY_VIOL_RST_SHIFT,
OMAP_SECU_VIOL_RST_SRC_ID_SHIFT },
@@ -333,7 +333,7 @@ static u32 omap44xx_prm_read_reset_sources(void)
u32 r = 0;
u32 v;
- v = omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
+ v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST,
OMAP4_RM_RSTST);
p = omap44xx_prm_reset_src_map;
diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h
index 22b0979206c..8ee1fbdec56 100644
--- a/arch/arm/mach-omap2/prm44xx.h
+++ b/arch/arm/mach-omap2/prm44xx.h
@@ -62,8 +62,8 @@
/* OMAP4 specific register offsets */
#define OMAP4_RM_RSTCTRL 0x0000
-#define OMAP4_RM_RSTTIME 0x0004
-#define OMAP4_RM_RSTST 0x0008
+#define OMAP4_RM_RSTST 0x0004
+#define OMAP4_RM_RSTTIME 0x0008
#define OMAP4_PM_PWSTCTRL 0x0000
#define OMAP4_PM_PWSTST 0x0004
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index f3771cdb983..5b0b86bb34b 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -22,6 +22,8 @@
#include <asm/mach/time.h>
#include <asm/sched_clock.h>
+#include <plat/counter-32k.h>
+
/* OMAP2_32KSYNCNT_CR_OFF: offset of 32ksync counter register */
#define OMAP2_32KSYNCNT_REV_OFF 0x0
#define OMAP2_32KSYNCNT_REV_SCHEME (0x3 << 30)
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 743fc2836f7..a5bc92d7e47 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -26,6 +26,8 @@
#include <asm/mach/map.h>
+#include <plat/sram.h>
+
#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
static void __iomem *omap_sram_base;
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index e0072ce8d6e..b69e11dc679 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -43,7 +43,7 @@ extern unsigned long samsung_cpu_id;
#define EXYNOS4_CPU_MASK 0xFFFE0000
#define EXYNOS5250_SOC_ID 0x43520000
-#define EXYNOS5440_SOC_ID 0x54400000
+#define EXYNOS5440_SOC_ID 0xE5440000
#define EXYNOS5_SOC_MASK 0xFFFFF000
#define IS_SAMSUNG_CPU(name, id, mask) \
diff --git a/drivers/clk/mvebu/clk-gating-ctrl.c b/drivers/clk/mvebu/clk-gating-ctrl.c
index c6d3c263b07..8fa5408b6c7 100644
--- a/drivers/clk/mvebu/clk-gating-ctrl.c
+++ b/drivers/clk/mvebu/clk-gating-ctrl.c
@@ -32,7 +32,7 @@ struct mvebu_soc_descr {
#define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw)
-static struct clk __init *mvebu_clk_gating_get_src(
+static struct clk *mvebu_clk_gating_get_src(
struct of_phandle_args *clkspec, void *data)
{
struct mvebu_gating_ctrl *ctrl = (struct mvebu_gating_ctrl *)data;
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index ac71f555dd7..e17fad03cb8 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -1361,13 +1361,16 @@ static int mv_xor_probe(struct platform_device *pdev)
err_channel_add:
for (i = 0; i < MV_XOR_MAX_CHANNELS; i++)
if (xordev->channels[i]) {
+ mv_xor_channel_remove(xordev->channels[i]);
if (pdev->dev.of_node)
irq_dispose_mapping(xordev->channels[i]->irq);
- mv_xor_channel_remove(xordev->channels[i]);
}
- clk_disable_unprepare(xordev->clk);
- clk_put(xordev->clk);
+ if (!IS_ERR(xordev->clk)) {
+ clk_disable_unprepare(xordev->clk);
+ clk_put(xordev->clk);
+ }
+
return ret;
}
diff --git a/drivers/pinctrl/mvebu/pinctrl-dove.c b/drivers/pinctrl/mvebu/pinctrl-dove.c
index 750dea78f53..69aba369728 100644
--- a/drivers/pinctrl/mvebu/pinctrl-dove.c
+++ b/drivers/pinctrl/mvebu/pinctrl-dove.c
@@ -595,8 +595,11 @@ static int dove_pinctrl_probe(struct platform_device *pdev)
* grab clk to make sure it is ticking.
*/
clk = devm_clk_get(&pdev->dev, NULL);
- if (!IS_ERR(clk))
- clk_prepare_enable(clk);
+ if (IS_ERR(clk)) {
+ dev_err(&pdev->dev, "Unable to get pdma clock");
+ return PTR_RET(clk);
+ }
+ clk_prepare_enable(clk);
return mvebu_pinctrl_probe(pdev);
}
diff --git a/drivers/power/reset/gpio-poweroff.c b/drivers/power/reset/gpio-poweroff.c
index 06074248ba7..e290d48ddd9 100644
--- a/drivers/power/reset/gpio-poweroff.c
+++ b/drivers/power/reset/gpio-poweroff.c
@@ -29,15 +29,16 @@ static int gpio_active_low;
static void gpio_poweroff_do_poweroff(void)
{
- BUG_ON(gpio_num == -1);
+ BUG_ON(!gpio_is_valid(gpio_num));
- /* drive it active */
+ /* drive it active, also inactive->active edge */
gpio_direction_output(gpio_num, !gpio_active_low);
mdelay(100);
- /* rising edge or drive inactive */
+ /* drive inactive, also active->inactive edge */
gpio_set_value(gpio_num, gpio_active_low);
mdelay(100);
- /* falling edge */
+
+ /* drive it active, also inactive->active edge */
gpio_set_value(gpio_num, !gpio_active_low);
/* give it some time */
@@ -60,15 +61,12 @@ static int gpio_poweroff_probe(struct platform_device *pdev)
}
gpio_num = of_get_gpio_flags(pdev->dev.of_node, 0, &flags);
- if (gpio_num < 0) {
- pr_err("%s: Could not get GPIO configuration: %d",
- __func__, gpio_num);
- return -ENODEV;
- }
+ if (!gpio_is_valid(gpio_num))
+ return gpio_num;
+
gpio_active_low = flags & OF_GPIO_ACTIVE_LOW;
- if (of_get_property(pdev->dev.of_node, "input", NULL))
- input = true;
+ input = of_property_read_bool(pdev->dev.of_node, "input");
ret = gpio_request(gpio_num, "poweroff-gpio");
if (ret) {
@@ -98,8 +96,7 @@ err:
static int gpio_poweroff_remove(struct platform_device *pdev)
{
- if (gpio_num != -1)
- gpio_free(gpio_num);
+ gpio_free(gpio_num);
if (pm_power_off == &gpio_poweroff_do_poweroff)
pm_power_off = NULL;
@@ -115,15 +112,15 @@ static struct platform_driver gpio_poweroff_driver = {
.probe = gpio_poweroff_probe,
.remove = gpio_poweroff_remove,
.driver = {
- .name = "poweroff-gpio",
- .owner = THIS_MODULE,
- .of_match_table = of_gpio_poweroff_match,
- },
+ .name = "poweroff-gpio",
+ .owner = THIS_MODULE,
+ .of_match_table = of_gpio_poweroff_match,
+ },
};
module_platform_driver(gpio_poweroff_driver);
MODULE_AUTHOR("Jamie Lentin <jm@lentin.co.uk>");
MODULE_DESCRIPTION("GPIO poweroff driver");
-MODULE_LICENSE("GPL");
+MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:poweroff-gpio");
diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c
index a45b37c2e88..755556ca5b2 100644
--- a/drivers/video/mxsfb.c
+++ b/drivers/video/mxsfb.c
@@ -369,7 +369,8 @@ static void mxsfb_disable_controller(struct fb_info *fb_info)
loop--;
}
- writel(VDCTRL4_SYNC_SIGNALS_ON, host->base + LCDC_VDCTRL4 + REG_CLR);
+ reg = readl(host->base + LCDC_VDCTRL4);
+ writel(reg & ~VDCTRL4_SYNC_SIGNALS_ON, host->base + LCDC_VDCTRL4);
clk_disable_unprepare(host->clk);