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authorShiraz Hashim <shiraz.hashim@st.com>2012-11-07 20:07:25 +0530
committerLinus Walleij <linus.walleij@linaro.org>2012-11-11 19:36:04 +0100
commit826d6ca8f955c7a902e775acef3bdbfc93695b04 (patch)
treeacfea21f3a3d52e0cfc706028394a4283fa6eb1b /drivers/pinctrl/spear/pinctrl-spear.h
parent6bb0700bfe124f3ee245da24b5bb35152d2e6bfc (diff)
downloadlinux-826d6ca8f955c7a902e775acef3bdbfc93695b04.tar.gz
pinctrl: SPEAr: Add SoC specific gpio configuration routines
Different SPEAr SoCs have different approach to configure pins as gpios. Some configure a group of gpios with single register bit and others have one bit per gpio pin. Only earlier one is implemented till now, this patch adds support for later one. Here we add callbacks to SoC specific code to configure gpios in gpio_request_enable(). That will do additional SoC specific configuration to enable gpio pins. We also implement this callback for SPEAr1340 in this patch. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/spear/pinctrl-spear.h')
-rw-r--r--drivers/pinctrl/spear/pinctrl-spear.h14
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/pinctrl/spear/pinctrl-spear.h b/drivers/pinctrl/spear/pinctrl-spear.h
index 94f142c10c1..b06332719b2 100644
--- a/drivers/pinctrl/spear/pinctrl-spear.h
+++ b/drivers/pinctrl/spear/pinctrl-spear.h
@@ -13,11 +13,13 @@
#define __PINMUX_SPEAR_H__
#include <linux/gpio.h>
+#include <linux/io.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/types.h>
struct platform_device;
struct device;
+struct spear_pmx;
/**
* struct spear_pmx_mode - SPEAr pmx mode
@@ -155,6 +157,8 @@ struct spear_pinctrl_machdata {
struct spear_pingroup **groups;
unsigned ngroups;
struct spear_gpio_pingroup *gpio_pingroups;
+ void (*gpio_request_endisable)(struct spear_pmx *pmx, int offset,
+ bool enable);
unsigned ngpio_pingroups;
bool modes_supported;
@@ -178,6 +182,16 @@ struct spear_pmx {
};
/* exported routines */
+static inline u32 pmx_readl(struct spear_pmx *pmx, u32 reg)
+{
+ return readl_relaxed(pmx->vbase + reg);
+}
+
+static inline void pmx_writel(struct spear_pmx *pmx, u32 val, u32 reg)
+{
+ writel_relaxed(val, pmx->vbase + reg);
+}
+
void __devinit pmx_init_addr(struct spear_pinctrl_machdata *machdata, u16 reg);
void __devinit
pmx_init_gpio_pingroup_addr(struct spear_gpio_pingroup *gpio_pingroup,