path: root/drivers/dma/dw_dmac.c
diff options
authorHeikki Krogerus <heikki.krogerus@linux.intel.com>2013-01-10 10:53:06 +0200
committerVinod Koul <vinod.koul@intel.com>2013-01-12 05:07:23 -0800
commita5dbff111cacecd2e79843a51cc86d21d3648af5 (patch)
tree8bc05b8c9dcf742f5e4977a92567c58cc82d3a10 /drivers/dma/dw_dmac.c
parent23d5f4ec9de43dbc73a42f1483d9339b907c3dff (diff)
dma: dw_dmac: clear suspend bit during termination
The DMA transfer could not be established if previously it was paused and terminated. In that case the channel's suspend bit remains set that prevents to transfer anything until channel is resumed. The patch adds the dwc_chan_resume() call instead of a plain flag assignment. That clears the DWC_CFGL_CH_SUSP bit as well during termination. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'drivers/dma/dw_dmac.c')
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index 154952abc2e..28d5f01c350 100644
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -1059,7 +1059,7 @@ static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,
dwc_chan_disable(dw, dwc);
- dwc->paused = false;
+ dwc_chan_resume(dwc);
/* active_list entries will end up before queued entries */
list_splice_init(&dwc->queue, &list);