path: root/drivers/clk/spear
diff options
authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-14 14:42:53 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-14 14:42:53 -0800
commit0beb58783f2168354e2b5297af45fc7db70adf12 (patch)
tree4debaf4f276990adf1892b7efe57edd344367464 /drivers/clk/spear
parent6a57d104c8cb5b6adad6784b4ce6e2f7f9961a3a (diff)
parenteabc5fa51c1fae4b66cf883e3a3c2b3ca794494c (diff)
Merge tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device-tree updates, take 2, from Olof Johansson: "This branch contains device-tree updates for the SPEAr platform. They had dependencies on earlier branches from this merge window, which is why they were broken out in a separate branch." * tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/ ARM: SPEAr320: DT: Add SPEAr 320 HMI board support ARM: SPEAr3xx: DT: add shirq node for interrupt multiplexor ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT ARM: SPEAr1310: Fix AUXDATA for compact flash controller ARM: SPEAr13xx: Remove fields not required for ssp controller ARM: SPEAr1310: Move 1310 specific misc register into machine specific files ARM: SPEAr: DT: Update device nodes ARM: SPEAr: DT: add uart state to fix warning ARM: SPEAr: DT: Modify DT bindings for STMMAC ARM: SPEAr: DT: Fix existing DT support ARM: SPEAr: DT: Update partition info for MTD devices ARM: SPEAr: DT: Update pinctrl list ARM: SPEAr13xx: DT: Add spics gpio controller nodes
Diffstat (limited to 'drivers/clk/spear')
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c
index 147e25f0040..ed9af427861 100644
--- a/drivers/clk/spear/spear1310_clock.c
+++ b/drivers/clk/spear/spear1310_clock.c
@@ -20,6 +20,7 @@
#include <mach/spear.h>
#include "clk.h"
+#define VA_SPEAR1310_RAS_BASE IOMEM(UL(0xFA400000))
/* PLL related registers and bit values */
#define SPEAR1310_PLL_CFG (VA_MISC_BASE + 0x210)
/* PLL_CFG bit values */