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authorIngo Molnar <mingo@kernel.org>2012-05-30 14:12:06 +0200
committerIngo Molnar <mingo@kernel.org>2012-05-30 14:12:06 +0200
commit403e1c5b7495d7b80fae9fc4d0a7a6f5abdc3307 (patch)
treec1f762dda525faf24aa10d6f81cf043da202c54f /arch
parentfa83523f45fbb403eba4ebc5704bf98aa4da0163 (diff)
parent80f033610fb968e75f5d470233d8d0260d7a72ed (diff)
downloadlinux-403e1c5b7495d7b80fae9fc4d0a7a6f5abdc3307.tar.gz
Merge branch 'x86/mce' into x86/urgent
Merge in these fixlets. Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/x86/include/asm/bitops.h2
-rw-r--r--arch/x86/kernel/cpu/mcheck/mce.c6
2 files changed, 5 insertions, 3 deletions
diff --git a/arch/x86/include/asm/bitops.h b/arch/x86/include/asm/bitops.h
index b97596e2b68..a6983b27722 100644
--- a/arch/x86/include/asm/bitops.h
+++ b/arch/x86/include/asm/bitops.h
@@ -15,6 +15,8 @@
#include <linux/compiler.h>
#include <asm/alternative.h>
+#define BIT_64(n) (U64_C(1) << (n))
+
/*
* These have to be done with inline assembly: that way the bit-setting
* is guaranteed to be atomic. All bit operations return 0 if the bit
diff --git a/arch/x86/kernel/cpu/mcheck/mce.c b/arch/x86/kernel/cpu/mcheck/mce.c
index 2afcbd253e1..aaa056f3169 100644
--- a/arch/x86/kernel/cpu/mcheck/mce.c
+++ b/arch/x86/kernel/cpu/mcheck/mce.c
@@ -1458,9 +1458,9 @@ static int __cpuinit __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
rdmsrl(msrs[i], val);
/* CntP bit set? */
- if (val & BIT(62)) {
- val &= ~BIT(62);
- wrmsrl(msrs[i], val);
+ if (val & BIT_64(62)) {
+ val &= ~BIT_64(62);
+ wrmsrl(msrs[i], val);
}
}