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authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-28 09:21:13 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-28 09:21:13 -0700
commit6e7d43f494463af3a5213a0a9fe5b9aa0f7856ab (patch)
tree73ac78f0a57e1fe47c1c3afc2d6ad9766af87865 /arch
parente4aa937ec75df0eea0bee03bffa3303ad36c986b (diff)
parentf6a12a7d0b1a70e969ae4f6d7c5201cdaf6edde0 (diff)
downloadlinux-6e7d43f494463af3a5213a0a9fe5b9aa0f7856ab.tar.gz
Merge branch 'next' of git://git.monstr.eu/linux-2.6-microblaze
Pull microblaze fixes from Michal Simek: "One patch fix futex support and my patches fix warnings which were reported by Geert's regression testing" * 'next' of git://git.monstr.eu/linux-2.6-microblaze: microblaze: Reversed logic in futex cmpxchg microblaze: Use proper casting for inb/inw/inl in io.h microblaze: Initialize temp variable to remove compilation warning
Diffstat (limited to 'arch')
-rw-r--r--arch/microblaze/include/asm/futex.h2
-rw-r--r--arch/microblaze/include/asm/io.h6
-rw-r--r--arch/microblaze/kernel/cpu/cache.c2
3 files changed, 5 insertions, 5 deletions
diff --git a/arch/microblaze/include/asm/futex.h b/arch/microblaze/include/asm/futex.h
index ff8cde159d9..01848f056f4 100644
--- a/arch/microblaze/include/asm/futex.h
+++ b/arch/microblaze/include/asm/futex.h
@@ -105,7 +105,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
__asm__ __volatile__ ("1: lwx %1, %3, r0; \
cmp %2, %1, %4; \
- beqi %2, 3f; \
+ bnei %2, 3f; \
2: swx %5, %3, r0; \
addic %2, r0, 0; \
bnei %2, 1b; \
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h
index 8cb8a8566ed..2565cb94f32 100644
--- a/arch/microblaze/include/asm/io.h
+++ b/arch/microblaze/include/asm/io.h
@@ -123,11 +123,11 @@ static inline void writel(unsigned int v, volatile void __iomem *addr)
* inb_p/inw_p/...
* The macros don't do byte-swapping.
*/
-#define inb(port) readb((u8 *)((port)))
+#define inb(port) readb((u8 *)((unsigned long)(port)))
#define outb(val, port) writeb((val), (u8 *)((unsigned long)(port)))
-#define inw(port) readw((u16 *)((port)))
+#define inw(port) readw((u16 *)((unsigned long)(port)))
#define outw(val, port) writew((val), (u16 *)((unsigned long)(port)))
-#define inl(port) readl((u32 *)((port)))
+#define inl(port) readl((u32 *)((unsigned long)(port)))
#define outl(val, port) writel((val), (u32 *)((unsigned long)(port)))
#define inb_p(port) inb((port))
diff --git a/arch/microblaze/kernel/cpu/cache.c b/arch/microblaze/kernel/cpu/cache.c
index 4254514b4c8..a6e44410672 100644
--- a/arch/microblaze/kernel/cpu/cache.c
+++ b/arch/microblaze/kernel/cpu/cache.c
@@ -140,7 +140,7 @@ do { \
/* It is used only first parameter for OP - for wic, wdc */
#define CACHE_RANGE_LOOP_1(start, end, line_length, op) \
do { \
- int volatile temp; \
+ int volatile temp = 0; \
int align = ~(line_length - 1); \
end = ((end & align) == end) ? end - line_length : end & align; \
WARN_ON(end - start < 0); \