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authorSam Ravnborg <sam@ravnborg.org>2012-05-20 17:27:53 +0200
committerDavid S. Miller <davem@davemloft.net>2012-05-20 13:33:36 -0700
commit1edc17832d8f49a0263d364c453ea35da0e4e2a6 (patch)
tree02c460fef4abb53a1b1ebe493b1e731ef36f6f26 /arch/sparc/kernel
parent9cd5f82246b724aae402959bffe0441b45a01a1c (diff)
downloadlinux-1edc17832d8f49a0263d364c453ea35da0e4e2a6.tar.gz
sparc32: use flushi when run-time patching in per_cpu_patch
Davis S. Miller wrote: " The way we do that now is overkill. We only needed to use the MMU cache ops when we had sun4c around because sun4c lacked support for the "flush" instruction. But all sun4m and later chips have it so we can use it unconditionally. So in the per_cpu_patch() code, get rid of the cache ops invocation, and instead execute a "flush %reg" after each of the instruction patch assignments, where %reg is set to the address of the instruction that was stored into. Perhaps take the flushi() definition from asm/cacheflush_64.h and place it into asm/cacheflush.h, then you can simply use that. " Implemented as per suggestion. Moved run-time patching before we call paging_init(), so helper methods in paging_init() may utilise run-time patching too. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/kernel')
-rw-r--r--arch/sparc/kernel/setup_32.c16
1 files changed, 6 insertions, 10 deletions
diff --git a/arch/sparc/kernel/setup_32.c b/arch/sparc/kernel/setup_32.c
index d65b5a1c220..c052313f4dc 100644
--- a/arch/sparc/kernel/setup_32.c
+++ b/arch/sparc/kernel/setup_32.c
@@ -227,16 +227,14 @@ static void __init per_cpu_patch(void)
prom_halt();
}
*(unsigned int *) (addr + 0) = insns[0];
+ flushi(addr + 0);
*(unsigned int *) (addr + 4) = insns[1];
+ flushi(addr + 4);
*(unsigned int *) (addr + 8) = insns[2];
+ flushi(addr + 8);
p++;
}
-#ifdef CONFIG_SMP
- local_ops->cache_all();
-#else
- sparc32_cachetlb_ops->cache_all();
-#endif
}
enum sparc_cpu sparc_cpu_model;
@@ -340,13 +338,11 @@ void __init setup_arch(char **cmdline_p)
init_mm.context = (unsigned long) NO_CONTEXT;
init_task.thread.kregs = &fake_swapper_regs;
- paging_init();
-
- /* Now that we have the cache ops hooked up, we can patch
- * instructions.
- */
+ /* Run-time patch instructions to match the cpu model */
per_cpu_patch();
+ paging_init();
+
smp_setup_cpu_possible_map();
}