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authorRalf Baechle <ralf@linux-mips.org>2010-02-24 17:41:00 +0100
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 12:53:43 +0100
commitb9b37787d24cca9fbd63f767663e9439fa69aa22 (patch)
tree36e0ed76f0ec0e7b3b28877f9d37a9523227dec8 /arch/mips/cobalt
parent2a5d66511a6adc0546a92d33734e3ebf7ab0d10c (diff)
downloadlinux-b9b37787d24cca9fbd63f767663e9439fa69aa22.tar.gz
MIPS: Cobalt: Fix theoretical port aliasing issue
Because the VIA SuperIO chip only decodes 24 bits of address space but port address space currently being configured as 32MB there is the theoretical possibility of aliases within the I/O port address range. The complicated solution is to reserve all address range that potencially could cause such aliases. But with the PCI spec limiting port allocations for devices to a maximum of 256 bytes 16MB of port address space already is way more than one would ever expect to be used so we just reduce the port space to 16MB. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> To: Yoichi Yuasa <yuasa@linux-mips.org> Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: linux-mips@linux-mips.org Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Patchwork: http://patchwork.linux-mips.org/patch/995/
Diffstat (limited to 'arch/mips/cobalt')
-rw-r--r--arch/mips/cobalt/pci.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/cobalt/pci.c b/arch/mips/cobalt/pci.c
index cfce7af1bca..85ec9cc31d6 100644
--- a/arch/mips/cobalt/pci.c
+++ b/arch/mips/cobalt/pci.c
@@ -25,7 +25,7 @@ static struct resource cobalt_mem_resource = {
static struct resource cobalt_io_resource = {
.start = 0x1000,
- .end = GT_DEF_PCI0_IO_SIZE - 1,
+ .end = 0xffffffUL,
.name = "PCI I/O",
.flags = IORESOURCE_IO,
};