path: root/arch/frv/mm
diff options
authorDavid Howells <dhowells@redhat.com>2007-11-28 16:22:05 -0800
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-11-29 09:24:54 -0800
commit3c835670ab5f72a4ea2d0db232b1acc07924f186 (patch)
tree32d632e21f6788427d6d7a0a3ae538e124c82c1d /arch/frv/mm
parent9e6c1e633355b69803094ecbac4cecc96e00965c (diff)
FRV: arrange things such that BRA can reach from the trap table
Arrange the sections in the FRV arch so that a BRA instruction with a 16-bit displacement can always reach from the trap table to entry.S, tlb-miss.S and break.S. The problem otherwise is that the linker can insert sufficient code between the slots in the trap table and the targets of the branch instructions in those slots that the displacement field in the instruction isn't sufficiently large. This is because the branch targets were in the .text section along with most of the other code in the kernel. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/frv/mm')
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/frv/mm/tlb-miss.S b/arch/frv/mm/tlb-miss.S
index 04da6746837..07643482cad 100644
--- a/arch/frv/mm/tlb-miss.S
+++ b/arch/frv/mm/tlb-miss.S
@@ -16,7 +16,7 @@
#include <asm/highmem.h>
#include <asm/spr-regs.h>
- .section .text
+ .section .text.tlbmiss
.balign 4
.globl __entry_insn_mmu_miss