aboutsummaryrefslogtreecommitdiff
path: root/arch/arm/kernel/entry-armv.S
diff options
context:
space:
mode:
authorRussell King <rmk+kernel@arm.linux.org.uk>2011-06-26 12:47:08 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-07-02 10:56:12 +0100
commit30891c90d81133179cc47eb77c30764a3b5dad5c (patch)
tree4af470a3f2d999ec8feefce84b6d502c28cdfbb4 /arch/arm/kernel/entry-armv.S
parent40f0b90a2f16f433f9afbfef4b7c312efb54e933 (diff)
downloadlinux-30891c90d81133179cc47eb77c30764a3b5dad5c.tar.gz
ARM: entry: no need to reload the SPSR value from struct pt_regs
The SVC IRQ, prefetch and data abort handlers preserve the SPSR value via r5 across the exception. Rather than re-loading it from pt_regs, use the preserved value instead. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/entry-armv.S')
-rw-r--r--arch/arm/kernel/entry-armv.S10
1 files changed, 1 insertions, 9 deletions
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S
index bbdd443b805..fa02a22a4c4 100644
--- a/arch/arm/kernel/entry-armv.S
+++ b/arch/arm/kernel/entry-armv.S
@@ -195,10 +195,6 @@ __dabt_svc:
@
disable_irq_notrace
- @
- @ restore SPSR and restart the instruction
- @
- ldr r5, [sp, #S_PSR]
#ifdef CONFIG_TRACE_IRQFLAGS
tst r5, #PSR_I_BIT
bleq trace_hardirqs_on
@@ -223,7 +219,7 @@ __irq_svc:
tst r0, #_TIF_NEED_RESCHED
blne svc_preempt
#endif
- ldr r5, [sp, #S_PSR]
+
#ifdef CONFIG_TRACE_IRQFLAGS
@ The parent context IRQs must have been enabled to get here in
@ the first place, so there's no point checking the PSR I bit.
@@ -308,10 +304,6 @@ __pabt_svc:
@
disable_irq_notrace
- @
- @ restore SPSR and restart the instruction
- @
- ldr r5, [sp, #S_PSR]
#ifdef CONFIG_TRACE_IRQFLAGS
tst r5, #PSR_I_BIT
bleq trace_hardirqs_on