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authorRussell King <rmk+kernel@arm.linux.org.uk>2013-06-29 11:44:43 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-06-29 11:44:43 +0100
commit3c0c01ab742ddfaf6b6f2d64b890e77cda4b7727 (patch)
treed0f196c53d209f44190fd8a6481823b7770866e6 /arch/arm/Kconfig.debug
parentcbd379b10019617457bda31eb243890f4377fa3e (diff)
parent809e660f438fc5a69bf57630a85bcd8112263f37 (diff)
downloadlinux-3c0c01ab742ddfaf6b6f2d64b890e77cda4b7727.tar.gz
Merge branch 'devel-stable' into for-next
Conflicts: arch/arm/Makefile arch/arm/include/asm/glue-proc.h
Diffstat (limited to 'arch/arm/Kconfig.debug')
-rw-r--r--arch/arm/Kconfig.debug10
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 1d41908d5cd..f2623b25ff9 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -476,6 +476,13 @@ choice
of the tiles using the RS1 memory map, including all new A-class
core tiles, FPGA-based SMMs and software models.
+ config DEBUG_VEXPRESS_UART0_CRX
+ bool "Use PL011 UART0 at 0xb0090000 (Cortex-R compliant tiles)"
+ depends on ARCH_VEXPRESS && !MMU
+ help
+ This option selects UART0 at 0xb0090000. This is appropriate for
+ Cortex-R series tiles and SMMs, such as Cortex-R5 and Cortex-R7
+
config DEBUG_VT8500_UART0
bool "Use UART0 on VIA/Wondermedia SoCs"
depends on ARCH_VT8500
@@ -645,7 +652,8 @@ config DEBUG_LL_INCLUDE
default "debug/tegra.S" if DEBUG_TEGRA_UART
default "debug/ux500.S" if DEBUG_UX500_UART
default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
- DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1
+ DEBUG_VEXPRESS_UART0_CA9 || DEBUG_VEXPRESS_UART0_RS1 || \
+ DEBUG_VEXPRESS_UART0_CRX
default "debug/vt8500.S" if DEBUG_VT8500_UART0
default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1
default "mach/debug-macro.S"