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authorJohn David Anglin <dave.anglin@bell.net>2013-02-02 23:41:24 +0000
committerHelge Deller <deller@gmx.de>2013-02-20 22:50:38 +0100
commit027f27c4eca00b4411fb1fe61c33060569ff73f6 (patch)
treee77e9bfb6a9a6ce40feb22937390c40987eea0bd
parentb54cb2332e387f29c65f19f3620e5c812c89a328 (diff)
downloadlinux-027f27c4eca00b4411fb1fe61c33060569ff73f6.tar.gz
parisc: disable preemption while flushing D- or I-caches through TMPALIAS region
It is necessary to disable preemption during cache flushes done through the TMPALIAS region to ensure that the TLB setup is not clobbered by another flush. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
-rw-r--r--arch/parisc/include/asm/cacheflush.h2
-rw-r--r--arch/parisc/kernel/cache.c2
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/parisc/include/asm/cacheflush.h b/arch/parisc/include/asm/cacheflush.h
index 9f21ab0c02e..79f694f3ad9 100644
--- a/arch/parisc/include/asm/cacheflush.h
+++ b/arch/parisc/include/asm/cacheflush.h
@@ -115,7 +115,9 @@ flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned long vma
{
if (PageAnon(page)) {
flush_tlb_page(vma, vmaddr);
+ preempt_disable();
flush_dcache_page_asm(page_to_phys(page), vmaddr);
+ preempt_enable();
}
}
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c
index 1c61b824565..4b12890642e 100644
--- a/arch/parisc/kernel/cache.c
+++ b/arch/parisc/kernel/cache.c
@@ -267,9 +267,11 @@ static inline void
__flush_cache_page(struct vm_area_struct *vma, unsigned long vmaddr,
unsigned long physaddr)
{
+ preempt_disable();
flush_dcache_page_asm(physaddr, vmaddr);
if (vma->vm_flags & VM_EXEC)
flush_icache_page_asm(physaddr, vmaddr);
+ preempt_enable();
}
void flush_dcache_page(struct page *page)