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authorRalf Baechle <ralf@linux-mips.org>2013-04-22 17:57:54 +0200
committerRalf Baechle <ralf@linux-mips.org>2013-04-22 18:09:35 +0200
commit3b5e50edaf500f392f4a372296afc0b99ffa7e70 (patch)
tree494cb0bafa1e787b7e00b6cfa0c2929660f760b1
parent41ef2d5678d83af030125550329b6ae8b74618fa (diff)
downloadlinux-3b5e50edaf500f392f4a372296afc0b99ffa7e70.tar.gz
Revert "MIPS: page.h: Provide more readable definition for PAGE_MASK."
This reverts commit c17a6554782ad531f4713b33fd6339ba67ef6391. Manuel Lauss writes: lmo commit c17a6554 (MIPS: page.h: Provide more readable definition for PAGE_MASK) apparently breaks ioremap of 36-bit addresses on my Alchemy systems (PCI and PCMCIA) The reason is that in arch/mips/mm/ioremap.c line 157 (phys_addr &= PAGE_MASK) bits 32-35 are cut off. Seems the new PAGE_MASK is explicitly 32bit, or one could make it signed instead of unsigned long.
-rw-r--r--arch/mips/include/asm/page.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h
index 99fc547af9d..eab99e536b5 100644
--- a/arch/mips/include/asm/page.h
+++ b/arch/mips/include/asm/page.h
@@ -31,7 +31,7 @@
#define PAGE_SHIFT 16
#endif
#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT)
-#define PAGE_MASK (~(PAGE_SIZE - 1))
+#define PAGE_MASK (~((1 << PAGE_SHIFT) - 1))
#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
#define HPAGE_SHIFT (PAGE_SHIFT + PAGE_SHIFT - 3)