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authorLinus Torvalds <torvalds@linux-foundation.org>2013-07-13 14:58:36 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2013-07-13 14:58:36 -0700
commitbfd65dd9fe42b54c6f4eabbabc40bda9e25dcf93 (patch)
tree232c452b88dc5000bf1863e2bc033167c64a026e
parentd1447464789918db1e1a3d0aaf50d3d0f6487a4f (diff)
parentcbbe6f82b489e7ceba4ad7c833bd3a76cd0084cb (diff)
downloadlinux-bfd65dd9fe42b54c6f4eabbabc40bda9e25dcf93.tar.gz
Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM fixes from Russell King: "A few fixes for ARM, mostly just one liners with the exception of the missing section specification. We decided not to rely on .previous to fix this but to explicitly state the section we want the code to be in." * 'fixes' of git://git.linaro.org/people/rmk/linux-arm: ARM: 7778/1: smp_twd: twd_update_frequency need be run on all online CPUs ARM: 7782/1: Kconfig: Let ARM_ERRATA_364296 not depend on CONFIG_SMP ARM: mm: fix boot on SA1110 Assabet ARM: 7781/1: mmu: Add debug_ll_io_init() mappings to early mappings ARM: 7780/1: add missing linker section markup to head-common.S
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/kernel/head-common.S3
-rw-r--r--arch/arm/kernel/smp_twd.c2
-rw-r--r--arch/arm/mm/init.c2
-rw-r--r--arch/arm/mm/mmu.c2
5 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 0ac9be677eb..ba412e02ec0 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1316,7 +1316,7 @@ config ARM_ERRATA_754327
config ARM_ERRATA_364296
bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
- depends on CPU_V6 && !SMP
+ depends on CPU_V6
help
This options enables the workaround for the 364296 ARM1136
r0p2 erratum (possible cache data corruption with
diff --git a/arch/arm/kernel/head-common.S b/arch/arm/kernel/head-common.S
index 5b391a689b4..76ab5ca5061 100644
--- a/arch/arm/kernel/head-common.S
+++ b/arch/arm/kernel/head-common.S
@@ -133,6 +133,9 @@ ENTRY(lookup_processor_type)
ldmfd sp!, {r4 - r6, r9, pc}
ENDPROC(lookup_processor_type)
+ __FINIT
+ .text
+
/*
* Read processor ID register (CP#15, CR0), and look up in the linker-built
* supported processor list. Note that we can't use the absolute addresses
diff --git a/arch/arm/kernel/smp_twd.c b/arch/arm/kernel/smp_twd.c
index 90525d9d290..f6fd1d4398c 100644
--- a/arch/arm/kernel/smp_twd.c
+++ b/arch/arm/kernel/smp_twd.c
@@ -120,7 +120,7 @@ static int twd_rate_change(struct notifier_block *nb,
* changing cpu.
*/
if (flags == POST_RATE_CHANGE)
- smp_call_function(twd_update_frequency,
+ on_each_cpu(twd_update_frequency,
(void *)&cnd->new_rate, 1);
return NOTIFY_OK;
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 6833cbead6c..15225d829d7 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -597,7 +597,7 @@ void __init mem_init(void)
#ifdef CONFIG_SA1111
/* now that our DMA memory is actually so designated, we can free it */
- free_reserved_area(__va(PHYS_PFN_OFFSET), swapper_pg_dir, -1, NULL);
+ free_reserved_area(__va(PHYS_OFFSET), swapper_pg_dir, -1, NULL);
#endif
free_highpages();
diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c
index d7229d28c7f..4f56617a239 100644
--- a/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@ -950,7 +950,7 @@ void __init debug_ll_io_init(void)
map.virtual &= PAGE_MASK;
map.length = PAGE_SIZE;
map.type = MT_DEVICE;
- create_mapping(&map);
+ iotable_init(&map, 1);
}
#endif