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authorNaresh Bhat <naresh.bhat@linaro.org>2014-07-02 19:08:24 +0530
committerNaresh Bhat <naresh.bhat@linaro.org>2014-09-03 16:48:47 +0530
commitc2663547bf467e1c81e76f0046903ed047bb2583 (patch)
tree4f01103807dd86e9e583020721063ca78912e36f
parentc77539e577a893635657e390bd3590d0ec2f29f7 (diff)
downloadxen-c2663547bf467e1c81e76f0046903ed047bb2583.tar.gz
ARM64 / ACPI: Define ACPI_IRQ_MODEL_GIC needed for arm
Needed because ARM64 uses GIC which is defined in ACPI 5.0 spec. Signed-off-by: Al Stone <al.stone@linaro.org> Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Naresh Bhat <naresh.bhat@linaro.org>
-rw-r--r--xen/arch/arm/arm64/acpi/arm-core.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/xen/arch/arm/arm64/acpi/arm-core.c b/xen/arch/arm/arm64/acpi/arm-core.c
index 0e3074ad2a..9fe2815bc5 100644
--- a/xen/arch/arm/arm64/acpi/arm-core.c
+++ b/xen/arch/arm/arm64/acpi/arm-core.c
@@ -54,7 +54,11 @@ int acpi_psci_use_hvc;
/* available_cpus means enabled cpu in MADT */
static int available_cpus;
-enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PLATFORM;
+/*
+ * Since we're on ARM, the default interrupt routing model
+ * clearly has to be GIC.
+ */
+enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_GIC;
struct acpi_arm_root acpi_arm_rsdp_info; /* info about RSDP from FDT */