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Diffstat (limited to 'arch/arm64/boot/dts/bitmain/bm1880.dtsi')
-rw-r--r--arch/arm64/boot/dts/bitmain/bm1880.dtsi28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
index dc574bced19f..6ed25f3e8b81 100644
--- a/arch/arm64/boot/dts/bitmain/bm1880.dtsi
+++ b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
@@ -82,6 +82,34 @@
#interrupt-cells = <3>;
};
+ emmc: sdhci@50100000 {
+ compatible = "bitmain,bm1880-sdhci";
+ reg = <0x0 0x50100000 0x0 0x1000>;
+ clocks = <&clk BM1880_CLK_AXI_EMMC>,
+ <&clk BM1880_CLK_EMMC>,
+ <&clk BM1880_CLK_100K_EMMC>;
+ clock-names = "axi_clk", "periph_clk", "core_clk";
+ interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst BM1880_RST_EMMC>;
+ max-frequency = <125000000>;
+ bus-width = <4>;
+ status = "disabled";
+ };
+
+ sd: sdhci@50101000 {
+ compatible = "bitmain,bm1880-sdhci";
+ reg = <0x0 0x50101000 0x0 0x1000>;
+ clocks = <&clk BM1880_CLK_AXI_SD>,
+ <&clk BM1880_CLK_SD>,
+ <&clk BM1880_CLK_100K_SD>;
+ clock-names = "axi_clk", "periph_clk", "core_clk";
+ interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst BM1880_RST_SD>;
+ max-frequency = <100000000>;
+ bus-width = <4>;
+ status = "disabled";
+ };
+
sctrl: system-controller@50010000 {
compatible = "bitmain,bm1880-sctrl", "syscon",
"simple-mfd";