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-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399.dtsi10
-rw-r--r--drivers/iommu/rockchip-iommu.c2
-rw-r--r--drivers/media/platform/rockchip/isp1/capture.c21
-rw-r--r--drivers/media/platform/rockchip/isp1/dev.c4
-rw-r--r--drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c48
-rw-r--r--drivers/media/platform/rockchip/isp1/regs.c3
-rw-r--r--drivers/media/platform/rockchip/isp1/rkisp1.c2
7 files changed, 77 insertions, 13 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index d627217b5cbb..582c3b22efbd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1388,6 +1388,7 @@
<&cru PCLK_VIO_GRF>;
clock-names = "dphy-ref", "dphy-cfg", "grf";
power-domains = <&power RK3399_PD_VIO>;
+ rockchip,grf = <&grf>;
status = "disabled";
};
@@ -1713,6 +1714,8 @@
clock-names = "clk_isp",
"aclk_isp", "aclk_isp_wrap",
"hclk_isp", "hclk_isp_wrap";
+ assigned-clocks = <&cru SCLK_ISP0>, <&cru ACLK_ISP0>;
+ assigned-clock-rates = <500000000>, <400000000>;
power-domains = <&power RK3399_PD_ISP0>;
iommus = <&isp0_mmu>;
status = "disabled";
@@ -1723,9 +1726,11 @@
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "isp0_mmu";
- clocks = <&cru ACLK_ISP0_NOC>, <&cru HCLK_ISP0_NOC>;
- clock-names = "aclk", "iface";
+ clocks = <&cru ACLK_ISP0_NOC>, <&cru HCLK_ISP0_NOC>,
+ <&cru ACLK_ISP0_WRAPPER>, <&cru HCLK_ISP0_WRAPPER>;
+ clock-names = "aclk", "iface", "aclk_wrapper", "iface_wrapper";
#iommu-cells = <0>;
+ power-domains = <&power RK3399_PD_ISP0>;
rockchip,disable-mmu-reset;
status = "disabled";
};
@@ -1738,6 +1743,7 @@
clocks = <&cru ACLK_ISP1_NOC>, <&cru HCLK_ISP1_NOC>;
clock-names = "aclk", "iface";
#iommu-cells = <0>;
+ power-domains = <&power RK3399_PD_ISP1>;
rockchip,disable-mmu-reset;
status = "disabled";
};
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 77d4bd93fe4b..41d21a8cab1b 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -96,7 +96,7 @@ struct rk_iommu_domain {
/* list of clocks required by IOMMU */
static const char * const rk_iommu_clocks[] = {
- "aclk", "iface",
+ "aclk", "iface", "aclk_wrapper", "iface_wrapper",
};
struct rk_iommu {
diff --git a/drivers/media/platform/rockchip/isp1/capture.c b/drivers/media/platform/rockchip/isp1/capture.c
index b44a057ca553..0880eb1add22 100644
--- a/drivers/media/platform/rockchip/isp1/capture.c
+++ b/drivers/media/platform/rockchip/isp1/capture.c
@@ -653,6 +653,7 @@ static int rkisp1_config_dcrop(struct rkisp1_stream *stream, bool async)
/* configure scale unit */
static int rkisp1_config_rsz(struct rkisp1_stream *stream, bool async)
{
+ pr_info("%s: %d\n", __func__, __LINE__);
struct rkisp1_device *dev = stream->ispdev;
struct v4l2_pix_format_mplane output_fmt = stream->out_fmt;
struct capture_fmt *output_isp_fmt = &stream->out_isp_fmt;
@@ -661,6 +662,7 @@ static int rkisp1_config_rsz(struct rkisp1_stream *stream, bool async)
struct v4l2_rect in_y, in_c, out_y, out_c;
u32 xsubs_in, ysubs_in, xsubs_out, ysubs_out;
+ pr_info("%s: %d\n", __func__, __LINE__);
if (input_isp_fmt->fmt_type == FMT_BAYER)
goto disable;
@@ -670,6 +672,7 @@ static int rkisp1_config_rsz(struct rkisp1_stream *stream, bool async)
out_y.width = output_fmt.width;
out_y.height = output_fmt.height;
+ pr_info("%s: %d\n", __func__, __LINE__);
/* The size of Cb,Cr are related to the format */
if (mbus_code_xysubs(input_isp_fmt->mbus_code, &xsubs_in, &ysubs_in)) {
v4l2_err(&dev->v4l2_dev, "Not xsubs/ysubs found\n");
@@ -678,6 +681,7 @@ static int rkisp1_config_rsz(struct rkisp1_stream *stream, bool async)
in_c.width = in_y.width / xsubs_in;
in_c.height = in_y.height / ysubs_in;
+ pr_info("%s: %d\n", __func__, __LINE__);
if (output_isp_fmt->fmt_type == FMT_YUV) {
fcc_xysubs(output_isp_fmt->fourcc, &xsubs_out, &ysubs_out);
out_c.width = out_y.width / xsubs_out;
@@ -690,6 +694,7 @@ static int rkisp1_config_rsz(struct rkisp1_stream *stream, bool async)
if (in_c.width == out_c.width && in_c.height == out_c.height)
goto disable;
+ pr_info("%s: %d\n", __func__, __LINE__);
/* set RSZ input and output */
v4l2_dbg(1, 1, &dev->v4l2_dev,
"stream %d rsz/scale: %dx%d -> %dx%d\n",
@@ -699,17 +704,21 @@ static int rkisp1_config_rsz(struct rkisp1_stream *stream, bool async)
"chroma scaling %dx%d -> %dx%d\n",
in_c.width, in_c.height, out_c.width, out_c.height);
+ pr_info("%s: %d\n", __func__, __LINE__);
/* calculate and set scale */
config_rsz(stream, &in_y, &in_c, &out_y, &out_c, async);
- if (1)
- dump_rsz_regs(stream);
+// if (1)
+// dump_rsz_regs(stream);
+ pr_info("%s: %d\n", __func__, __LINE__);
return 0;
disable:
+ pr_info("%s: %d\n", __func__, __LINE__);
disable_rsz(stream, async);
+ pr_info("%s: %d\n", __func__, __LINE__);
return 0;
}
@@ -1188,15 +1197,18 @@ static int rkisp1_stream_start(struct rkisp1_stream *stream)
bool async = false;
int ret;
+ pr_info("%s: %d\n", __func__, __LINE__);
if (other->state == RKISP1_STATE_STREAMING)
async = true;
+ pr_info("%s: %d\n", __func__, __LINE__);
ret = rkisp1_config_rsz(stream, async);
if (ret < 0) {
v4l2_err(v4l2_dev, "config rsz failed with error %d\n", ret);
return ret;
}
+ pr_info("%s: %d\n", __func__, __LINE__);
/*
* can't be async now, otherwise the latter started stream fails to
* produce mi interrupt.
@@ -1207,6 +1219,7 @@ static int rkisp1_stream_start(struct rkisp1_stream *stream)
return ret;
}
+ pr_info("%s: %d\n", __func__, __LINE__);
return rkisp1_start(stream);
}
@@ -1233,6 +1246,7 @@ rkisp1_start_streaming(struct vb2_queue *queue, unsigned int count)
goto destroy_dummy_buf;
}
+ pr_info("%s: %d\n", __func__, __LINE__);
/* configure stream hardware to start */
ret = rkisp1_stream_start(stream);
if (ret < 0) {
@@ -1240,11 +1254,13 @@ rkisp1_start_streaming(struct vb2_queue *queue, unsigned int count)
goto close_pipe;
}
+ pr_info("%s: %d\n", __func__, __LINE__);
/* start sub-devices */
ret = dev->pipe.set_stream(&dev->pipe, true);
if (ret < 0)
goto stop_stream;
+ pr_info("%s: %d\n", __func__, __LINE__);
ret = media_pipeline_start(&node->vdev.entity, &dev->pipe.pipe);
if (ret < 0) {
v4l2_err(&dev->v4l2_dev, "start pipeline failed %d\n", ret);
@@ -1725,6 +1741,7 @@ void rkisp1_mi_isr(struct rkisp1_stream *stream)
void __iomem *base = stream->ispdev->base_addr;
u32 val;
+ pr_info("%s: %d\n", __func__, __LINE__);
stream->ops->clr_frame_end_int(base);
if (stream->ops->is_frame_end_int_masked(base)) {
val = mi_get_masked_int_status(base);
diff --git a/drivers/media/platform/rockchip/isp1/dev.c b/drivers/media/platform/rockchip/isp1/dev.c
index 17d662846304..9dad55c75ba9 100644
--- a/drivers/media/platform/rockchip/isp1/dev.c
+++ b/drivers/media/platform/rockchip/isp1/dev.c
@@ -40,6 +40,7 @@ static int __isp_pipeline_prepare(struct rkisp1_pipeline *p,
while (1) {
struct media_pad *pad = NULL;
+ pr_info("%s: %d\n", __func__, __LINE__);
/* Find remote source pad */
for (i = 0; i < me->num_pads; i++) {
struct media_pad *spad = &me->pads[i];
@@ -117,6 +118,7 @@ static int rkisp1_pipeline_open(struct rkisp1_pipeline *p,
if (atomic_inc_return(&p->power_cnt) > 1)
return 0;
+ pr_info("%s: %d\n", __func__, __LINE__);
/* go through media graphic and get subdevs */
if (prepare)
__isp_pipeline_prepare(p, me);
@@ -124,10 +126,12 @@ static int rkisp1_pipeline_open(struct rkisp1_pipeline *p,
if (!p->num_subdevs)
return -EINVAL;
+ pr_info("%s: %d\n", __func__, __LINE__);
ret = __isp_pipeline_s_power(p, 1);
if (ret < 0)
return ret;
+ pr_info("%s: %d\n", __func__, __LINE__);
return 0;
}
diff --git a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
index 100c2e397560..8c45e00bece5 100644
--- a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
+++ b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
@@ -325,7 +325,12 @@ static int mipidphy_get_sensor_data_rate(struct v4l2_subdev *sd)
static int mipidphy_s_stream_start(struct v4l2_subdev *sd)
{
struct mipidphy_priv *priv = to_dphy_priv(sd);
- int ret = 0;
+ struct v4l2_subdev *sensor_sd = get_remote_sensor(sd);
+ struct mipidphy_sensor *sensor = sd_to_sensor(priv, sensor_sd);
+ const struct dphy_drv_data *drv_data = priv->drv_data;
+ const struct hsfreq_range *hsfreq_ranges = drv_data->hsfreq_ranges;
+ int num_hsfreq_ranges = drv_data->num_hsfreq_ranges;
+ int i, ret, hsfreq = 0;
if (priv->is_streaming)
return 0;
@@ -334,7 +339,40 @@ static int mipidphy_s_stream_start(struct v4l2_subdev *sd)
if (ret < 0)
return ret;
- priv->stream_on(priv, sd);
+ for (i = 0; i < num_hsfreq_ranges; i++) {
+ if (hsfreq_ranges[i].range_h >= priv->data_rate_mbps) {
+ hsfreq = hsfreq_ranges[i].cfg_bit;
+ break;
+ }
+ }
+
+ write_grf_reg(priv, GRF_DPHY_RX0_FORCERXMODE, 0);
+ write_grf_reg(priv, GRF_DPHY_RX0_FORCETXSTOPMODE, 0);
+ /* Disable lan turn around, which is ignored in receive mode */
+ write_grf_reg(priv, GRF_DPHY_RX0_TURNREQUEST, 0);
+ write_grf_reg(priv, GRF_DPHY_RX0_TURNDISABLE, 0xf);
+ write_grf_reg(priv, GRF_DPHY_RX0_ENABLE, GENMASK(sensor->lanes - 1, 0));
+ /* dphy start */
+ write_grf_reg(priv, GRF_DPHY_RX0_TESTCLK, 1);
+ write_grf_reg(priv, GRF_DPHY_RX0_TESTCLR, 1);
+ usleep_range(100, 150);
+ write_grf_reg(priv, GRF_DPHY_RX0_TESTCLR, 0);
+ usleep_range(100, 150);
+ /* set clock lane */
+ /* HS hsfreq_range & lane 0 settle bypass */
+ mipidphy0_wr_reg(priv, CLOCK_LANE_HS_RX_CONTROL, 0);
+ /* HS RX Control of lane0 */
+ mipidphy0_wr_reg(priv, LANE0_HS_RX_CONTROL, hsfreq << 1);
+ /* HS RX Control of lane1 */
+ mipidphy0_wr_reg(priv, LANE1_HS_RX_CONTROL, 0);
+ /* HS RX Control of lane2 */
+ mipidphy0_wr_reg(priv, LANE2_HS_RX_CONTROL, 0);
+ /* HS RX Control of lane3 */
+ mipidphy0_wr_reg(priv, LANE3_HS_RX_CONTROL, 0);
+ /* HS RX Data Lanes Settle State Time Control */
+ mipidphy0_wr_reg(priv, HS_RX_DATA_LANES_THS_SETTLE_CONTROL, 0x04);
+ /* Normal operation */
+ mipidphy0_wr_reg(priv, 0x0, 0);
priv->is_streaming = true;
@@ -809,12 +847,6 @@ static int rockchip_mipidphy_probe(struct platform_device *pdev)
priv->grf_regs = drv_data->regs;
priv->drv_data = drv_data;
- priv->stream_on = mipidphy_txrx_stream_on;
- priv->txrx_base_addr = NULL;
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- priv->txrx_base_addr = devm_ioremap_resource(dev, res);
- if (IS_ERR(priv->txrx_base_addr))
- priv->stream_on = mipidphy_rx_stream_on;
sd = &priv->sd;
v4l2_subdev_init(sd, &mipidphy_subdev_ops);
diff --git a/drivers/media/platform/rockchip/isp1/regs.c b/drivers/media/platform/rockchip/isp1/regs.c
index 4687d7f0c6dc..856d479431be 100644
--- a/drivers/media/platform/rockchip/isp1/regs.c
+++ b/drivers/media/platform/rockchip/isp1/regs.c
@@ -164,12 +164,15 @@ void config_rsz(struct rkisp1_stream *stream, struct v4l2_rect *in_y,
{
int i = 0;
+ pr_info("%s: %d\n", __func__, __LINE__);
/* No phase offset */
writel(0, stream->ispdev->base_addr + stream->config->rsz.phase_hy);
+ pr_info("%s: %d\n", __func__, __LINE__);
writel(0, stream->ispdev->base_addr + stream->config->rsz.phase_hc);
writel(0, stream->ispdev->base_addr + stream->config->rsz.phase_vy);
writel(0, stream->ispdev->base_addr + stream->config->rsz.phase_vc);
+ pr_info("%s: %d\n", __func__, __LINE__);
/* Linear interpolation */
for (i = 0; i < 64; i++) {
writel(i, stream->ispdev->base_addr + stream->config->rsz.scale_lut_addr);
diff --git a/drivers/media/platform/rockchip/isp1/rkisp1.c b/drivers/media/platform/rockchip/isp1/rkisp1.c
index 2c617a672dd0..47d5c75d1258 100644
--- a/drivers/media/platform/rockchip/isp1/rkisp1.c
+++ b/drivers/media/platform/rockchip/isp1/rkisp1.c
@@ -1078,6 +1078,7 @@ void rkisp1_mipi_isr(unsigned int mis, struct rkisp1_device *dev)
void __iomem *base = dev->base_addr;
u32 val;
+ pr_info("%s: %d\n", __func__, __LINE__);
writel(~0, base + CIF_MIPI_ICR);
/*
@@ -1118,6 +1119,7 @@ void rkisp1_isp_isr(unsigned int isp_mis, struct rkisp1_device *dev)
unsigned int isp_mis_tmp = 0;
unsigned int isp_err = 0;
+ pr_info("%s: %d\n", __func__, __LINE__);
/* start edge of v_sync */
if (isp_mis & CIF_ISP_V_START) {
riksp1_isp_queue_event_sof(&dev->isp_sdev);
generated by cgit v1.2.1 (git 2.23.0) at 2021-04-23 16:43:35 +0000