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authorPalmer Dabbelt <palmer@dabbelt.com>2017-07-10 18:00:26 -0700
committerPalmer Dabbelt <palmer@dabbelt.com>2017-09-26 15:26:44 -0700
commit76d2a0493a17d4c8ecc781366850c3c4f8e1a446 (patch)
tree5612f17472f4f3bd6fb49e217cb998f5c32836c4 /arch/riscv/include/asm/cache.h
parent8caea502367056881e5209ca55a7a01775c9a1cd (diff)
download96b-common-76d2a0493a17d4c8ecc781366850c3c4f8e1a446.tar.gz
RISC-V: Init and Halt Code
This contains the various __init C functions, the initial assembly kernel entry point, and the code to reset the system. When a file was init-related this patch contains the entire file. Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
Diffstat (limited to 'arch/riscv/include/asm/cache.h')
-rw-r--r--arch/riscv/include/asm/cache.h22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/cache.h b/arch/riscv/include/asm/cache.h
new file mode 100644
index 000000000000..e8f0d1110d74
--- /dev/null
+++ b/arch/riscv/include/asm/cache.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2017 Chen Liqin <liqin.chen@sunplusct.com>
+ * Copyright (C) 2012 Regents of the University of California
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation, version 2.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _ASM_RISCV_CACHE_H
+#define _ASM_RISCV_CACHE_H
+
+#define L1_CACHE_SHIFT 6
+
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+
+#endif /* _ASM_RISCV_CACHE_H */