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authorShunqian Zheng <zhengsq@rock-chips.com>2018-03-08 17:48:05 +0800
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2019-05-03 11:31:29 +0530
commit41f02d82f5a350108cf5438b0d6569fcf3d0488d (patch)
tree8122a890edaf0ba18d3e2059aaab000ea46f9e58
parentc4f03b2c27f323d71018302bc67835d3ef66f6bb (diff)
download96b-common-41f02d82f5a350108cf5438b0d6569fcf3d0488d.tar.gz
arm64: dts: rockchip: add isp0 node for rk3399
rk3399 have two ISP, but we havn't test isp1, so just add isp0 at present. Signed-off-by: Shunqian Zheng <zhengsq@rock-chips.com> Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index db9d948c0b03..6e9842a074b3 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1693,6 +1693,21 @@
status = "disabled";
};
+ isp0: isp0@ff910000 {
+ compatible = "rockchip,rk3399-cif-isp";
+ reg = <0x0 0xff910000 0x0 0x4000>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru SCLK_ISP0>,
+ <&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
+ <&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
+ clock-names = "clk_isp",
+ "aclk_isp", "aclk_isp_wrap",
+ "hclk_isp", "hclk_isp_wrap";
+ power-domains = <&power RK3399_PD_ISP0>;
+ iommus = <&isp0_mmu>;
+ status = "disabled";
+ };
+
isp0_mmu: iommu@ff914000 {
compatible = "rockchip,iommu";
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;