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authorStu Hsieh <stu.hsieh@mediatek.com>2018-08-09 10:15:38 +0800
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2018-09-03 15:19:21 +0530
commit6e60dc31ffc288baa439210a3179bf8393e37a65 (patch)
tree4f0bece91e7e6d0fadb1af18e775730138bd063f
parent5426e6e1248bc2aab9d79352c51a55c13ae9a0b5 (diff)
download96b-common-6e60dc31ffc288baa439210a3179bf8393e37a65.tar.gz
drm/mediatek: add connection from RDMA1 to DSI0
This patch add connection from RDMA1 to DSI0 Signed-off-by: Stu Hsieh <stu.hsieh@mediatek.com> Signed-off-by: CK Hu <ck.hu@mediatek.com>
-rw-r--r--drivers/gpu/drm/mediatek/mtk_drm_ddp.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
index 310d8482d5a0..31189fad8d4e 100644
--- a/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
+++ b/drivers/gpu/drm/mediatek/mtk_drm_ddp.c
@@ -124,6 +124,7 @@
#define DPI0_SEL_IN_RDMA2 0x3
#define DPI1_SEL_IN_RDMA1 (0x1 << 8)
#define DPI1_SEL_IN_RDMA2 (0x3 << 8)
+#define DSI0_SEL_IN_RDMA1 0x1
#define DSI1_SEL_IN_RDMA1 0x1
#define DSI1_SEL_IN_RDMA2 0x4
#define DSI2_SEL_IN_RDMA1 (0x1 << 16)
@@ -290,6 +291,9 @@ static unsigned int mtk_ddp_sel_in(enum mtk_ddp_comp_id cur,
} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DPI1) {
*addr = DISP_REG_CONFIG_DPI_SEL_IN;
value = DPI1_SEL_IN_RDMA1;
+ } else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI0) {
+ *addr = DISP_REG_CONFIG_DSIE_SEL_IN;
+ value = DSI0_SEL_IN_RDMA1;
} else if (cur == DDP_COMPONENT_RDMA1 && next == DDP_COMPONENT_DSI1) {
*addr = DISP_REG_CONFIG_DSIO_SEL_IN;
value = DSI1_SEL_IN_RDMA1;