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authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2019-03-07 17:17:26 +0530
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2019-03-07 17:17:26 +0530
commitfa348eb9995a5fcac586f3525b82ccef2b02b25a (patch)
treef52dd1ea5bbfe53c33e4950c588a9dbbbf6abbb0
parent23c624358dc89e41a4ac099348a1fd0eae92f616 (diff)
download96b-common-oxalis.tar.gz
arm64: dts: freescale: Enable PCI-E controller for Oxalis boardoxalis
Enable PCI-E controller for Oxalis board based on NXP/Freescale LS1012a SoC available as the Mini PCI-E connector on the bottom side. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts4
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi2
2 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts
index 760a3e258c96..5f9cde402744 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-oxalis.dts
@@ -87,6 +87,10 @@
status = "okay";
};
+&pcie {
+ status = "okay";
+};
+
&sai2 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index 816f3a4537e3..d48b0df1da6d 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -474,7 +474,7 @@
interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
};
- pcie@3400000 {
+ pcie: pcie@3400000 {
compatible = "fsl,ls1012a-pcie";
reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */
0x40 0x00000000 0x0 0x00002000>; /* configuration space */