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authorJacob Chen <jacob2.chen@rock-chips.com>2018-03-08 17:48:02 +0800
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2019-05-03 11:31:29 +0530
commit5d9f4d031e4675926ef0d537a4c677ddd7c1196c (patch)
tree3fe8b70303aa27edfa3f8dfa583b7c4f1714e56a
parent07f6a935ed94b074ac3f465084fdfd7e9b6d25ae (diff)
download96b-common-5d9f4d031e4675926ef0d537a4c677ddd7c1196c.tar.gz
ARM: dts: rockchip: add isp node for rk3288
rk3288 have a Embedded 13M ISP Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
-rw-r--r--arch/arm/boot/dts/rk3288.dtsi17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index a024d1e7e74c..65c4b99ba379 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -988,6 +988,23 @@
status = "disabled";
};
+ isp: isp@ff910000 {
+ compatible = "rockchip,rk3288-cif-isp";
+ reg = <0x0 0xff910000 0x0 0x4000>;
+ interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_ISP>, <&cru ACLK_ISP>,
+ <&cru HCLK_ISP>, <&cru PCLK_ISP_IN>,
+ <&cru SCLK_ISP_JPE>;
+ clock-names = "clk_isp", "aclk_isp",
+ "hclk_isp", "pclk_isp_in",
+ "sclk_isp_jpe";
+ assigned-clocks = <&cru SCLK_ISP>, <&cru SCLK_ISP_JPE>;
+ assigned-clock-rates = <400000000>, <400000000>;
+ power-domains = <&power RK3288_PD_VIO>;
+ iommus = <&isp_mmu>;
+ status = "disabled";
+ };
+
isp_mmu: iommu@ff914000 {
compatible = "rockchip,iommu";
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;