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authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2019-04-25 18:09:59 +0530
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2019-05-10 14:43:43 +0530
commitc8dbd6a4e26cb10bd024a0ca552056ded4e7348b (patch)
treed273f0e49dbbe292f58f3e0c0630c2c620c5d3ac
parente37dbea5c3dcf44368c46ecd2f735a719b5fade4 (diff)
download96b-common-c8dbd6a4e26cb10bd024a0ca552056ded4e7348b.tar.gz
arm64: dts: bitmain: Add reset controller support for BM1880 SoC
Add reset controller support for Bitmain BM1880 SoC. This commit also adds reset support to UART peripherals. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
-rw-r--r--arch/arm64/boot/dts/bitmain/bm1880.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
index fdfdc65d29ef..3ab039029bf2 100644
--- a/arch/arm64/boot/dts/bitmain/bm1880.dtsi
+++ b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
@@ -5,6 +5,7 @@
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/reset/bitmain,bm1880-reset.h>
/ {
compatible = "bitmain,bm1880";
@@ -92,6 +93,12 @@
compatible = "bitmain,bm1880-pinctrl";
reg = <0x50 0x4B0>;
};
+
+ rst: reset-controller@c00 {
+ compatible = "bitmain,bm1880-reset";
+ reg = <0xc00 0x8>;
+ #reset-cells = <1>;
+ };
};
uart0: serial@58018000 {
@@ -100,6 +107,7 @@
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ resets = <&rst BM1880_RST_UART0_1_CLK>;
status = "disabled";
};
@@ -109,6 +117,7 @@
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ resets = <&rst BM1880_RST_UART0_1_ACLK>;
status = "disabled";
};
@@ -118,6 +127,7 @@
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ resets = <&rst BM1880_RST_UART2_3_CLK>;
status = "disabled";
};
@@ -127,6 +137,7 @@
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
+ resets = <&rst BM1880_RST_UART2_3_ACLK>;
status = "disabled";
};
};