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authorAlexey Brodkin <Alexey.Brodkin@synopsys.com>2019-05-15 18:33:40 +0300
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2019-06-17 20:42:35 +0530
commit7c78e2a0917417a92545d9c9fdc143c1bb6351ef (patch)
treedafa4cb2a3d59eabe2e3c00c55da4c479ef7314b
parentc51c22e1d8f55def56127d56199bb5c05bb93892 (diff)
download96b-common-7c78e2a0917417a92545d9c9fdc143c1bb6351ef.tar.gz
ARC: [plat-hsdk] Get rid of inappropriate PHY settings
Initial bring-up of the platform was done on FPGA prototype where TI's DP83867 PHY was used. And so some specific PHY options were added. Just to confirm this is what we get on FPGA prototype in the bootlog: | TI DP83867 stmmac-0:00: attached PHY driver [TI DP83867] ... On real board though we have Micrel KZS9031 PHY and we even have CONFIG_MICREL_PHY=y set in hsdk_defconfig. That's what we see in the bootlog: | Micrel KSZ9031 Gigabit PHY stmmac-0:00: ... So essentially all TI-related bits have to go away. Cc: Rob Herring <robh+dt@kernel.org> Acked-by: Trent Piepho <tpiepho@impinj.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
-rw-r--r--arch/arc/boot/dts/hsdk.dts4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arc/boot/dts/hsdk.dts b/arch/arc/boot/dts/hsdk.dts
index 64a2e32c5ad7..acfbed41b020 100644
--- a/arch/arc/boot/dts/hsdk.dts
+++ b/arch/arc/boot/dts/hsdk.dts
@@ -11,7 +11,6 @@
*/
/dts-v1/;
-#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/reset/snps,hsdk-reset.h>
/ {
@@ -223,9 +222,6 @@
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <0>;
- ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
- ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
};
};
};