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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /sound/pci
downloadlinux-stericsson-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.tar.gz
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'sound/pci')
-rw-r--r--sound/pci/Kconfig528
-rw-r--r--sound/pci/Makefile64
-rw-r--r--sound/pci/ac97/Makefile18
-rw-r--r--sound/pci/ac97/ac97_codec.c2579
-rw-r--r--sound/pci/ac97/ac97_id.h62
-rw-r--r--sound/pci/ac97/ac97_local.h83
-rw-r--r--sound/pci/ac97/ac97_patch.c2309
-rw-r--r--sound/pci/ac97/ac97_patch.h59
-rw-r--r--sound/pci/ac97/ac97_pcm.c700
-rw-r--r--sound/pci/ac97/ac97_proc.c449
-rw-r--r--sound/pci/ac97/ak4531_codec.c437
-rw-r--r--sound/pci/ali5451/Makefile9
-rw-r--r--sound/pci/ali5451/ali5451.c2282
-rw-r--r--sound/pci/als4000.c789
-rw-r--r--sound/pci/atiixp.c1657
-rw-r--r--sound/pci/atiixp_modem.c1344
-rw-r--r--sound/pci/au88x0/Makefile7
-rw-r--r--sound/pci/au88x0/au8810.c17
-rw-r--r--sound/pci/au88x0/au8810.h229
-rw-r--r--sound/pci/au88x0/au8820.c15
-rw-r--r--sound/pci/au88x0/au8820.h209
-rw-r--r--sound/pci/au88x0/au8830.c18
-rw-r--r--sound/pci/au88x0/au8830.h256
-rw-r--r--sound/pci/au88x0/au88x0.c388
-rw-r--r--sound/pci/au88x0/au88x0.h284
-rw-r--r--sound/pci/au88x0/au88x0_a3d.c914
-rw-r--r--sound/pci/au88x0/au88x0_a3d.h123
-rw-r--r--sound/pci/au88x0/au88x0_a3ddata.c91
-rw-r--r--sound/pci/au88x0/au88x0_core.c2837
-rw-r--r--sound/pci/au88x0/au88x0_eq.c937
-rw-r--r--sound/pci/au88x0/au88x0_eq.h46
-rw-r--r--sound/pci/au88x0/au88x0_eqdata.c112
-rw-r--r--sound/pci/au88x0/au88x0_game.c135
-rw-r--r--sound/pci/au88x0/au88x0_mixer.c33
-rw-r--r--sound/pci/au88x0/au88x0_mpu401.c112
-rw-r--r--sound/pci/au88x0/au88x0_pcm.c548
-rw-r--r--sound/pci/au88x0/au88x0_sb.h40
-rw-r--r--sound/pci/au88x0/au88x0_synth.c395
-rw-r--r--sound/pci/au88x0/au88x0_wt.h65
-rw-r--r--sound/pci/au88x0/au88x0_xtalk.c787
-rw-r--r--sound/pci/au88x0/au88x0_xtalk.h61
-rw-r--r--sound/pci/azt3328.c1536
-rw-r--r--sound/pci/azt3328.h165
-rw-r--r--sound/pci/bt87x.c930
-rw-r--r--sound/pci/ca0106/Makefile3
-rw-r--r--sound/pci/ca0106/ca0106.h549
-rw-r--r--sound/pci/ca0106/ca0106_main.c1283
-rw-r--r--sound/pci/ca0106/ca0106_mixer.c634
-rw-r--r--sound/pci/ca0106/ca0106_proc.c436
-rw-r--r--sound/pci/cmipci.c2956
-rw-r--r--sound/pci/cs4281.c2136
-rw-r--r--sound/pci/cs46xx/Makefile12
-rw-r--r--sound/pci/cs46xx/cs46xx.c183
-rw-r--r--sound/pci/cs46xx/cs46xx_image.h3468
-rw-r--r--sound/pci/cs46xx/cs46xx_lib.c3922
-rw-r--r--sound/pci/cs46xx/cs46xx_lib.h182
-rw-r--r--sound/pci/cs46xx/dsp_spos.c1892
-rw-r--r--sound/pci/cs46xx/dsp_spos.h225
-rw-r--r--sound/pci/cs46xx/dsp_spos_scb_lib.c1750
-rw-r--r--sound/pci/cs46xx/imgs/cwc4630.h320
-rw-r--r--sound/pci/cs46xx/imgs/cwcasync.h176
-rw-r--r--sound/pci/cs46xx/imgs/cwcbinhack.h48
-rw-r--r--sound/pci/cs46xx/imgs/cwcdma.asp169
-rw-r--r--sound/pci/cs46xx/imgs/cwcdma.h68
-rw-r--r--sound/pci/cs46xx/imgs/cwcemb80.h1607
-rw-r--r--sound/pci/cs46xx/imgs/cwcsnoop.h46
-rw-r--r--sound/pci/emu10k1/Makefile23
-rw-r--r--sound/pci/emu10k1/emu10k1.c240
-rw-r--r--sound/pci/emu10k1/emu10k1_callback.c540
-rw-r--r--sound/pci/emu10k1/emu10k1_main.c875
-rw-r--r--sound/pci/emu10k1/emu10k1_patch.c223
-rw-r--r--sound/pci/emu10k1/emu10k1_synth.c120
-rw-r--r--sound/pci/emu10k1/emu10k1_synth_local.h38
-rw-r--r--sound/pci/emu10k1/emu10k1x.c1643
-rw-r--r--sound/pci/emu10k1/emufx.c2320
-rw-r--r--sound/pci/emu10k1/emumixer.c955
-rw-r--r--sound/pci/emu10k1/emumpu401.c374
-rw-r--r--sound/pci/emu10k1/emupcm.c1724
-rw-r--r--sound/pci/emu10k1/emuproc.c568
-rw-r--r--sound/pci/emu10k1/io.c404
-rw-r--r--sound/pci/emu10k1/irq.c189
-rw-r--r--sound/pci/emu10k1/memory.c564
-rw-r--r--sound/pci/emu10k1/p16v.c736
-rw-r--r--sound/pci/emu10k1/p16v.h299
-rw-r--r--sound/pci/emu10k1/timer.c97
-rw-r--r--sound/pci/emu10k1/voice.c152
-rw-r--r--sound/pci/ens1370.c2413
-rw-r--r--sound/pci/ens1371.c2
-rw-r--r--sound/pci/es1938.c1773
-rw-r--r--sound/pci/es1968.c2807
-rw-r--r--sound/pci/fm801.c1480
-rw-r--r--sound/pci/hda/Makefile7
-rw-r--r--sound/pci/hda/hda_codec.c1856
-rw-r--r--sound/pci/hda/hda_codec.h604
-rw-r--r--sound/pci/hda/hda_generic.c906
-rw-r--r--sound/pci/hda/hda_intel.c1449
-rw-r--r--sound/pci/hda/hda_local.h161
-rw-r--r--sound/pci/hda/hda_patch.h17
-rw-r--r--sound/pci/hda/hda_proc.c298
-rw-r--r--sound/pci/hda/patch_analog.c445
-rw-r--r--sound/pci/hda/patch_cmedia.c621
-rw-r--r--sound/pci/hda/patch_realtek.c1503
-rw-r--r--sound/pci/ice1712/Makefile12
-rw-r--r--sound/pci/ice1712/ak4xxx.c194
-rw-r--r--sound/pci/ice1712/amp.c65
-rw-r--r--sound/pci/ice1712/amp.h34
-rw-r--r--sound/pci/ice1712/aureon.c1948
-rw-r--r--sound/pci/ice1712/aureon.h56
-rw-r--r--sound/pci/ice1712/delta.c771
-rw-r--r--sound/pci/ice1712/delta.h150
-rw-r--r--sound/pci/ice1712/envy24ht.h215
-rw-r--r--sound/pci/ice1712/ews.c1036
-rw-r--r--sound/pci/ice1712/ews.h84
-rw-r--r--sound/pci/ice1712/hoontech.c326
-rw-r--r--sound/pci/ice1712/hoontech.h77
-rw-r--r--sound/pci/ice1712/ice1712.c2760
-rw-r--r--sound/pci/ice1712/ice1712.h494
-rw-r--r--sound/pci/ice1712/ice1724.c2340
-rw-r--r--sound/pci/ice1712/juli.c230
-rw-r--r--sound/pci/ice1712/juli.h10
-rw-r--r--sound/pci/ice1712/phase.c138
-rw-r--r--sound/pci/ice1712/phase.h34
-rw-r--r--sound/pci/ice1712/pontis.c849
-rw-r--r--sound/pci/ice1712/pontis.h33
-rw-r--r--sound/pci/ice1712/prodigy192.c524
-rw-r--r--sound/pci/ice1712/prodigy192.h11
-rw-r--r--sound/pci/ice1712/revo.c205
-rw-r--r--sound/pci/ice1712/revo.h48
-rw-r--r--sound/pci/ice1712/stac946x.h25
-rw-r--r--sound/pci/ice1712/vt1720_mobo.c115
-rw-r--r--sound/pci/ice1712/vt1720_mobo.h39
-rw-r--r--sound/pci/intel8x0.c2855
-rw-r--r--sound/pci/intel8x0m.c1462
-rw-r--r--sound/pci/korg1212/Makefile9
-rw-r--r--sound/pci/korg1212/korg1212-firmware.h987
-rw-r--r--sound/pci/korg1212/korg1212.c2553
-rw-r--r--sound/pci/maestro3.c2714
-rw-r--r--sound/pci/mixart/Makefile8
-rw-r--r--sound/pci/mixart/mixart.c1443
-rw-r--r--sound/pci/mixart/mixart.h242
-rw-r--r--sound/pci/mixart/mixart_core.c588
-rw-r--r--sound/pci/mixart/mixart_core.h607
-rw-r--r--sound/pci/mixart/mixart_hwdep.c647
-rw-r--r--sound/pci/mixart/mixart_hwdep.h145
-rw-r--r--sound/pci/mixart/mixart_mixer.c1136
-rw-r--r--sound/pci/mixart/mixart_mixer.h31
-rw-r--r--sound/pci/nm256/Makefile9
-rw-r--r--sound/pci/nm256/nm256.c1657
-rw-r--r--sound/pci/nm256/nm256_coef.c4607
-rw-r--r--sound/pci/rme32.c2043
-rw-r--r--sound/pci/rme96.c2449
-rw-r--r--sound/pci/rme9652/Makefile11
-rw-r--r--sound/pci/rme9652/hdsp.c5206
-rw-r--r--sound/pci/rme9652/rme9652.c2676
-rw-r--r--sound/pci/sonicvibes.c1534
-rw-r--r--sound/pci/trident/Makefile19
-rw-r--r--sound/pci/trident/trident.c196
-rw-r--r--sound/pci/trident/trident_main.c3991
-rw-r--r--sound/pci/trident/trident_memory.c476
-rw-r--r--sound/pci/trident/trident_synth.c1031
-rw-r--r--sound/pci/via82xx.c2346
-rw-r--r--sound/pci/via82xx_modem.c1245
-rw-r--r--sound/pci/vx222/Makefile8
-rw-r--r--sound/pci/vx222/vx222.c272
-rw-r--r--sound/pci/vx222/vx222.h114
-rw-r--r--sound/pci/vx222/vx222_ops.c1004
-rw-r--r--sound/pci/ymfpci/Makefile9
-rw-r--r--sound/pci/ymfpci/ymfpci.c372
-rw-r--r--sound/pci/ymfpci/ymfpci_image.h1565
-rw-r--r--sound/pci/ymfpci/ymfpci_main.c2273
170 files changed, 138513 insertions, 0 deletions
diff --git a/sound/pci/Kconfig b/sound/pci/Kconfig
new file mode 100644
index 000000000000..428efdbd70a1
--- /dev/null
+++ b/sound/pci/Kconfig
@@ -0,0 +1,528 @@
+# ALSA PCI drivers
+
+menu "PCI devices"
+ depends on SND!=n && PCI
+
+config SND_AC97_CODEC
+ tristate
+ select SND_PCM
+
+config SND_ALI5451
+ tristate "ALi M5451 PCI Audio Controller"
+ depends on SND
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for the integrated AC97 sound
+ device on motherboards using the ALi M5451 Audio Controller
+ (M1535/M1535D/M1535+/M1535D+ south bridges). Newer chipsets
+ use the "Intel/SiS/nVidia/AMD/ALi AC97 Controller" driver.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-ali5451.
+
+config SND_ATIIXP
+ tristate "ATI IXP AC97 Controller"
+ depends on SND
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for the integrated AC97 sound
+ device on motherboards with ATI chipsets (ATI IXP 150/200/250/
+ 300/400).
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-atiixp.
+
+config SND_ATIIXP_MODEM
+ tristate "ATI IXP Modem"
+ depends on SND
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for the integrated MC97 modem on
+ motherboards with ATI chipsets (ATI IXP 150/200/250).
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-atiixp-modem.
+
+config SND_AU8810
+ tristate "Aureal Advantage"
+ depends on SND
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for Aureal Advantage soundcards.
+
+ Supported features: Hardware Mixer, SRC, EQ and SPDIF output.
+ 3D support code is in place, but not yet useable. For more info,
+ email the ALSA developer list, or <mjander@users.sourceforge.net>.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-au8810.
+
+config SND_AU8820
+ tristate "Aureal Vortex"
+ depends on SND
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for Aureal Vortex soundcards.
+
+ Supported features: Hardware Mixer and SRC. For more info, email
+ the ALSA developer list, or <mjander@users.sourceforge.net>.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-au8820.
+
+config SND_AU8830
+ tristate "Aureal Vortex 2"
+ depends on SND
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for Aureal Vortex 2 soundcards.
+
+ Supported features: Hardware Mixer, SRC, EQ and SPDIF output.
+ 3D support code is in place, but not yet useable. For more info,
+ email the ALSA developer list, or <mjander@users.sourceforge.net>.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-au8830.
+
+config SND_AZT3328
+ tristate "Aztech AZF3328 / PCI168 (EXPERIMENTAL)"
+ depends on SND && EXPERIMENTAL
+ select SND_OPL3_LIB
+ select SND_MPU401_UART
+ select SND_PCM
+ help
+ Say Y here to include support for Aztech AZF3328 (PCI168)
+ soundcards.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-azt3328.
+
+config SND_BT87X
+ tristate "Bt87x Audio Capture"
+ depends on SND
+ select SND_PCM
+ help
+ If you want to record audio from TV cards based on
+ Brooktree Bt878/Bt879 chips, say Y here and read
+ <file:Documentation/sound/alsa/Bt87x.txt>.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-bt87x.
+
+config SND_BT87X_OVERCLOCK
+ bool "Bt87x Audio overclocking"
+ depends on SND_BT87X
+ help
+ Say Y here if 448000 Hz isn't enough for you and you want to
+ record from the analog input with up to 1792000 Hz.
+
+ Higher sample rates won't hurt your hardware, but audio
+ quality may suffer.
+
+config SND_CS46XX
+ tristate "Cirrus Logic (Sound Fusion) CS4280/CS461x/CS462x/CS463x"
+ depends on SND
+ select SND_RAWMIDI
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for Cirrus Logic CS4610/CS4612/
+ CS4614/CS4615/CS4622/CS4624/CS4630/CS4280 chips.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-cs46xx.
+
+config SND_CS46XX_NEW_DSP
+ bool "Cirrus Logic (Sound Fusion) New DSP support (EXPERIMENTAL)"
+ depends on SND_CS46XX && EXPERIMENTAL
+ help
+ Say Y here to use a new DSP image for SPDIF and dual codecs.
+
+ This works better than the old code, so say Y.
+
+config SND_CS4281
+ tristate "Cirrus Logic (Sound Fusion) CS4281"
+ depends on SND
+ select SND_OPL3_LIB
+ select SND_RAWMIDI
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for Cirrus Logic CS4281 chips.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-cs4281.
+
+config SND_EMU10K1
+ tristate "Emu10k1 (SB Live!, Audigy, E-mu APS)"
+ depends on SND
+ select SND_HWDEP
+ select SND_RAWMIDI
+ select SND_AC97_CODEC
+ help
+ Say Y to include support for Sound Blaster PCI 512, Live!,
+ Audigy and E-mu APS (partially supported) soundcards.
+
+ The confusing multitude of mixer controls is documented in
+ <file:Documentation/sound/alsa/SB-Live-mixer.txt> and
+ <file:Documentation/sound/alsa/Audigy-mixer.txt>.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-emu10k1.
+
+config SND_EMU10K1X
+ tristate "Emu10k1X (Dell OEM Version)"
+ depends on SND
+ select SND_AC97_CODEC
+ select SND_RAWMIDI
+ help
+ Say Y here to include support for the Dell OEM version of the
+ Sound Blaster Live!.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-emu10k1x.
+
+config SND_CA0106
+ tristate "SB Audigy LS / Live 24bit"
+ depends on SND
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for the Sound Blaster Audigy LS
+ and Live 24bit.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-ca0106.
+
+config SND_KORG1212
+ tristate "Korg 1212 IO"
+ depends on SND
+ select SND_PCM
+ help
+ Say Y here to include support for Korg 1212IO soundcards.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-korg1212.
+
+config SND_MIXART
+ tristate "Digigram miXart"
+ depends on SND
+ select SND_HWDEP
+ select SND_PCM
+ help
+ If you want to use Digigram miXart soundcards, say Y here and
+ read <file:Documentation/sound/alsa/MIXART.txt>.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-mixart.
+
+config SND_NM256
+ tristate "NeoMagic NM256AV/ZX"
+ depends on SND
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for NeoMagic NM256AV/ZX chips.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-nm256.
+
+config SND_RME32
+ tristate "RME Digi32, 32/8, 32 PRO"
+ depends on SND
+ select SND_PCM
+ help
+ Say Y to include support for RME Digi32, Digi32 PRO and
+ Digi32/8 (Sek'd Prodif32, Prodif96 and Prodif Gold) audio
+ devices.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-rme32.
+
+config SND_RME96
+ tristate "RME Digi96, 96/8, 96/8 PRO"
+ depends on SND
+ select SND_PCM
+ help
+ Say Y here to include support for RME Digi96, Digi96/8 and
+ Digi96/8 PRO/PAD/PST soundcards.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-rme96.
+
+config SND_RME9652
+ tristate "RME Digi9652 (Hammerfall)"
+ depends on SND
+ select SND_PCM
+ help
+ Say Y here to include support for RME Hammerfall (RME
+ Digi9652/Digi9636) soundcards.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-rme9652.
+
+config SND_HDSP
+ tristate "RME Hammerfall DSP Audio"
+ depends on SND
+ select SND_HWDEP
+ select SND_RAWMIDI
+ select SND_PCM
+ help
+ Say Y here to include support for RME Hammerfall DSP Audio
+ soundcards.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-hdsp.
+
+config SND_TRIDENT
+ tristate "Trident 4D-Wave DX/NX; SiS 7018"
+ depends on SND
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for soundcards based on Trident
+ 4D-Wave DX/NX or SiS 7018 chips.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-trident.
+
+config SND_YMFPCI
+ tristate "Yamaha YMF724/740/744/754"
+ depends on SND
+ select SND_OPL3_LIB
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for Yamaha PCI audio chips -
+ YMF724, YMF724F, YMF740, YMF740C, YMF744, YMF754.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-ymfpci.
+
+config SND_ALS4000
+ tristate "Avance Logic ALS4000"
+ depends on SND
+ select SND_OPL3_LIB
+ select SND_MPU401_UART
+ select SND_PCM
+ help
+ Say Y here to include support for soundcards based on Avance Logic
+ ALS4000 chips.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-als4000.
+
+config SND_CMIPCI
+ tristate "C-Media 8738, 8338"
+ depends on SND
+ select SND_OPL3_LIB
+ select SND_MPU401_UART
+ select SND_PCM
+ help
+ If you want to use soundcards based on C-Media CMI8338 or CMI8738
+ chips, say Y here and read
+ <file:Documentation/sound/alsa/CMIPCI.txt>.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-cmipci.
+
+config SND_ENS1370
+ tristate "(Creative) Ensoniq AudioPCI 1370"
+ depends on SND
+ select SND_RAWMIDI
+ select SND_PCM
+ help
+ Say Y here to include support for Ensoniq AudioPCI ES1370 chips.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-ens1370.
+
+config SND_ENS1371
+ tristate "(Creative) Ensoniq AudioPCI 1371/1373"
+ depends on SND
+ select SND_RAWMIDI
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for Ensoniq AudioPCI ES1371 chips and
+ Sound Blaster PCI 64 or 128 soundcards.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-ens1371.
+
+config SND_ES1938
+ tristate "ESS ES1938/1946/1969 (Solo-1)"
+ depends on SND
+ select SND_OPL3_LIB
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for soundcards based on ESS Solo-1
+ (ES1938, ES1946, ES1969) chips.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-es1938.
+
+config SND_ES1968
+ tristate "ESS ES1968/1978 (Maestro-1/2/2E)"
+ depends on SND
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for soundcards based on ESS Maestro
+ 1/2/2E chips.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-es1968.
+
+config SND_MAESTRO3
+ tristate "ESS Allegro/Maestro3"
+ depends on SND
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for soundcards based on ESS Maestro 3
+ (Allegro) chips.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-maestro3.
+
+config SND_FM801
+ tristate "ForteMedia FM801"
+ depends on SND
+ select SND_OPL3_LIB
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for soundcards based on the ForteMedia
+ FM801 chip.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-fm801.
+
+config SND_FM801_TEA575X
+ tristate "ForteMedia FM801 + TEA5757 tuner"
+ depends on SND_FM801
+ select VIDEO_DEV
+ help
+ Say Y here to include support for soundcards based on the ForteMedia
+ FM801 chip with a TEA5757 tuner connected to GPIO1-3 pins (Media
+ Forte SF256-PCS-02).
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-fm801-tea575x.
+
+config SND_ICE1712
+ tristate "ICEnsemble ICE1712 (Envy24)"
+ depends on SND
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for soundcards based on the
+ ICE1712 (Envy24) chip.
+
+ Currently supported hardware is: M-Audio Delta 1010(LT),
+ DiO 2496, 66, 44, 410, Audiophile 24/96; Digigram VX442;
+ TerraTec EWX 24/96, EWS 88MT, 88D, DMX 6Fire, Phase 88;
+ Hoontech SoundTrack DSP 24/Value/Media7.1; Event EZ8.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-ice1712.
+
+config SND_ICE1724
+ tristate "ICE/VT1724/1720 (Envy24HT/PT)"
+ depends on SND
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for soundcards based on
+ ICE/VT1724/1720 (Envy24HT/PT) chips.
+
+ Currently supported hardware is: AMP AUDIO2000; M-Audio
+ Revolution 7.1; TerraTec Aureon 5.1 Sky, 7.1 Space/Universe;
+ AudioTrak Prodigy 7.1; Pontis MS300; Albatron K8X800 Pro II;
+ Chaintech ZNF3-150/250.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-ice1724.
+
+config SND_INTEL8X0
+ tristate "Intel/SiS/nVidia/AMD/ALi AC97 Controller"
+ depends on SND
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for the integrated AC97 sound
+ device on motherboards with Intel/SiS/nVidia/AMD chipsets, or
+ ALi chipsets using the M5455 Audio Controller. (There is a
+ separate driver for ALi M5451 Audio Controllers.)
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-intel8x0.
+
+config SND_INTEL8X0M
+ tristate "Intel/SiS/nVidia/AMD MC97 Modem (EXPERIMENTAL)"
+ depends on SND && EXPERIMENTAL
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for the integrated MC97 modem on
+ motherboards with Intel/SiS/nVidia/AMD chipsets.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-intel8x0m.
+
+config SND_SONICVIBES
+ tristate "S3 SonicVibes"
+ depends on SND
+ select SND_OPL3_LIB
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for soundcards based on the S3
+ SonicVibes chip.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-sonicvibes.
+
+config SND_VIA82XX
+ tristate "VIA 82C686A/B, 8233/8235 AC97 Controller"
+ depends on SND
+ select SND_MPU401_UART
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for the integrated AC97 sound
+ device on motherboards with VIA chipsets.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-via82xx.
+
+config SND_VIA82XX_MODEM
+ tristate "VIA 82C686A/B, 8233 based Modems"
+ depends on SND
+ select SND_AC97_CODEC
+ help
+ Say Y here to include support for the integrated MC97 modem on
+ motherboards with VIA chipsets.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-via82xx-modem.
+
+config SND_VX222
+ tristate "Digigram VX222"
+ depends on SND
+ select SND_VX_LIB
+ help
+ Say Y here to include support for Digigram VX222 soundcards.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-vx222.
+
+config SND_HDA_INTEL
+ tristate "Intel HD Audio"
+ depends on SND
+ select SND_PCM
+ help
+ Say Y here to include support for Intel "High Definition
+ Audio" (Azalia) motherboard devices.
+
+ To compile this driver as a module, choose M here: the module
+ will be called snd-hda-intel.
+
+endmenu
diff --git a/sound/pci/Makefile b/sound/pci/Makefile
new file mode 100644
index 000000000000..b40575c3349a
--- /dev/null
+++ b/sound/pci/Makefile
@@ -0,0 +1,64 @@
+#
+# Makefile for ALSA
+# Copyright (c) 2001 by Jaroslav Kysela <perex@suse.cz>
+#
+
+snd-als4000-objs := als4000.o
+snd-atiixp-objs := atiixp.o
+snd-atiixp-modem-objs := atiixp_modem.o
+snd-azt3328-objs := azt3328.o
+snd-bt87x-objs := bt87x.o
+snd-cmipci-objs := cmipci.o
+snd-cs4281-objs := cs4281.o
+snd-ens1370-objs := ens1370.o
+snd-ens1371-objs := ens1371.o
+snd-es1938-objs := es1938.o
+snd-es1968-objs := es1968.o
+snd-fm801-objs := fm801.o
+snd-intel8x0-objs := intel8x0.o
+snd-intel8x0m-objs := intel8x0m.o
+snd-maestro3-objs := maestro3.o
+snd-rme32-objs := rme32.o
+snd-rme96-objs := rme96.o
+snd-sonicvibes-objs := sonicvibes.o
+snd-via82xx-objs := via82xx.o
+snd-via82xx-modem-objs := via82xx_modem.o
+
+# Toplevel Module Dependency
+obj-$(CONFIG_SND_ALS4000) += snd-als4000.o
+obj-$(CONFIG_SND_ATIIXP) += snd-atiixp.o
+obj-$(CONFIG_SND_ATIIXP_MODEM) += snd-atiixp-modem.o
+obj-$(CONFIG_SND_AZT3328) += snd-azt3328.o
+obj-$(CONFIG_SND_BT87X) += snd-bt87x.o
+obj-$(CONFIG_SND_CMIPCI) += snd-cmipci.o
+obj-$(CONFIG_SND_CS4281) += snd-cs4281.o
+obj-$(CONFIG_SND_ENS1370) += snd-ens1370.o
+obj-$(CONFIG_SND_ENS1371) += snd-ens1371.o
+obj-$(CONFIG_SND_ES1938) += snd-es1938.o
+obj-$(CONFIG_SND_ES1968) += snd-es1968.o
+obj-$(CONFIG_SND_FM801) += snd-fm801.o
+obj-$(CONFIG_SND_INTEL8X0) += snd-intel8x0.o
+obj-$(CONFIG_SND_INTEL8X0M) += snd-intel8x0m.o
+obj-$(CONFIG_SND_MAESTRO3) += snd-maestro3.o
+obj-$(CONFIG_SND_RME32) += snd-rme32.o
+obj-$(CONFIG_SND_RME96) += snd-rme96.o
+obj-$(CONFIG_SND_SONICVIBES) += snd-sonicvibes.o
+obj-$(CONFIG_SND_VIA82XX) += snd-via82xx.o
+obj-$(CONFIG_SND_VIA82XX_MODEM) += snd-via82xx-modem.o
+
+obj-$(CONFIG_SND) += \
+ ac97/ \
+ ali5451/ \
+ au88x0/ \
+ ca0106/ \
+ cs46xx/ \
+ emu10k1/ \
+ hda/ \
+ ice1712/ \
+ korg1212/ \
+ mixart/ \
+ nm256/ \
+ rme9652/ \
+ trident/ \
+ ymfpci/ \
+ vx222/
diff --git a/sound/pci/ac97/Makefile b/sound/pci/ac97/Makefile
new file mode 100644
index 000000000000..3c3222122d8b
--- /dev/null
+++ b/sound/pci/ac97/Makefile
@@ -0,0 +1,18 @@
+#
+# Makefile for ALSA
+# Copyright (c) 2001 by Jaroslav Kysela <perex@suse.cz>
+#
+
+snd-ac97-codec-objs := ac97_codec.o ac97_pcm.o ac97_patch.o
+
+ifneq ($(CONFIG_PROC_FS),)
+snd-ac97-codec-objs += ac97_proc.o
+endif
+
+snd-ak4531-codec-objs := ak4531_codec.o
+
+# Toplevel Module Dependency
+obj-$(CONFIG_SND_AC97_CODEC) += snd-ac97-codec.o
+obj-$(CONFIG_SND_ENS1370) += snd-ak4531-codec.o
+
+obj-m := $(sort $(obj-m))
diff --git a/sound/pci/ac97/ac97_codec.c b/sound/pci/ac97/ac97_codec.c
new file mode 100644
index 000000000000..0b024ec1f709
--- /dev/null
+++ b/sound/pci/ac97/ac97_codec.c
@@ -0,0 +1,2579 @@
+/*
+ * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
+ * Universal interface for Audio Codec '97
+ *
+ * For more details look to AC '97 component specification revision 2.2
+ * by Intel Corporation (http://developer.intel.com).
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <sound/driver.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/pci.h>
+#include <linux/moduleparam.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/ac97_codec.h>
+#include <sound/asoundef.h>
+#include <sound/initval.h>
+#include "ac97_local.h"
+#include "ac97_id.h"
+#include "ac97_patch.h"
+
+MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
+MODULE_DESCRIPTION("Universal interface for Audio Codec '97");
+MODULE_LICENSE("GPL");
+
+static int enable_loopback;
+
+module_param(enable_loopback, bool, 0444);
+MODULE_PARM_DESC(enable_loopback, "Enable AC97 ADC/DAC Loopback Control");
+
+/*
+
+ */
+
+typedef struct {
+ unsigned int id;
+ unsigned int mask;
+ const char *name;
+ int (*patch)(ac97_t *ac97);
+ int (*mpatch)(ac97_t *ac97);
+ unsigned int flags;
+} ac97_codec_id_t;
+
+static const ac97_codec_id_t snd_ac97_codec_id_vendors[] = {
+{ 0x414b4d00, 0xffffff00, "Asahi Kasei", NULL, NULL },
+{ 0x41445300, 0xffffff00, "Analog Devices", NULL, NULL },
+{ 0x414c4300, 0xffffff00, "Realtek", NULL, NULL },
+{ 0x414c4700, 0xffffff00, "Realtek", NULL, NULL },
+{ 0x434d4900, 0xffffff00, "C-Media Electronics", NULL, NULL },
+{ 0x43525900, 0xffffff00, "Cirrus Logic", NULL, NULL },
+{ 0x43585400, 0xffffff00, "Conexant", NULL, NULL },
+{ 0x44543000, 0xffffff00, "Diamond Technology", NULL, NULL },
+{ 0x454d4300, 0xffffff00, "eMicro", NULL, NULL },
+{ 0x45838300, 0xffffff00, "ESS Technology", NULL, NULL },
+{ 0x48525300, 0xffffff00, "Intersil", NULL, NULL },
+{ 0x49434500, 0xffffff00, "ICEnsemble", NULL, NULL },
+{ 0x49544500, 0xffffff00, "ITE Tech.Inc", NULL, NULL },
+{ 0x4e534300, 0xffffff00, "National Semiconductor", NULL, NULL },
+{ 0x50534300, 0xffffff00, "Philips", NULL, NULL },
+{ 0x53494c00, 0xffffff00, "Silicon Laboratory", NULL, NULL },
+{ 0x54524100, 0xffffff00, "TriTech", NULL, NULL },
+{ 0x54584e00, 0xffffff00, "Texas Instruments", NULL, NULL },
+{ 0x56494100, 0xffffff00, "VIA Technologies", NULL, NULL },
+{ 0x57454300, 0xffffff00, "Winbond", NULL, NULL },
+{ 0x574d4c00, 0xffffff00, "Wolfson", NULL, NULL },
+{ 0x594d4800, 0xffffff00, "Yamaha", NULL, NULL },
+{ 0x83847600, 0xffffff00, "SigmaTel", NULL, NULL },
+{ 0, 0, NULL, NULL, NULL }
+};
+
+static const ac97_codec_id_t snd_ac97_codec_ids[] = {
+{ 0x414b4d00, 0xffffffff, "AK4540", NULL, NULL },
+{ 0x414b4d01, 0xffffffff, "AK4542", NULL, NULL },
+{ 0x414b4d02, 0xffffffff, "AK4543", NULL, NULL },
+{ 0x414b4d06, 0xffffffff, "AK4544A", NULL, NULL },
+{ 0x414b4d07, 0xffffffff, "AK4545", NULL, NULL },
+{ 0x41445303, 0xffffffff, "AD1819", patch_ad1819, NULL },
+{ 0x41445340, 0xffffffff, "AD1881", patch_ad1881, NULL },
+{ 0x41445348, 0xffffffff, "AD1881A", patch_ad1881, NULL },
+{ 0x41445360, 0xffffffff, "AD1885", patch_ad1885, NULL },
+{ 0x41445361, 0xffffffff, "AD1886", patch_ad1886, NULL },
+{ 0x41445362, 0xffffffff, "AD1887", patch_ad1881, NULL },
+{ 0x41445363, 0xffffffff, "AD1886A", patch_ad1881, NULL },
+{ 0x41445368, 0xffffffff, "AD1888", patch_ad1888, NULL },
+{ 0x41445370, 0xffffffff, "AD1980", patch_ad1980, NULL },
+{ 0x41445372, 0xffffffff, "AD1981A", patch_ad1981a, NULL },
+{ 0x41445374, 0xffffffff, "AD1981B", patch_ad1981b, NULL },
+{ 0x41445375, 0xffffffff, "AD1985", patch_ad1985, NULL },
+{ 0x41445378, 0xffffffff, "AD1986", patch_ad1985, NULL },
+{ 0x414c4300, 0xffffff00, "ALC100,100P", NULL, NULL },
+{ 0x414c4710, 0xfffffff0, "ALC200,200P", NULL, NULL },
+{ 0x414c4721, 0xffffffff, "ALC650D", NULL, NULL }, /* already patched */
+{ 0x414c4722, 0xffffffff, "ALC650E", NULL, NULL }, /* already patched */
+{ 0x414c4723, 0xffffffff, "ALC650F", NULL, NULL }, /* already patched */
+{ 0x414c4720, 0xfffffff0, "ALC650", patch_alc650, NULL },
+{ 0x414c4760, 0xfffffff0, "ALC655", patch_alc655, NULL },
+{ 0x414c4780, 0xfffffff0, "ALC658", patch_alc655, NULL },
+{ 0x414c4790, 0xfffffff0, "ALC850", patch_alc850, NULL },
+{ 0x414c4730, 0xffffffff, "ALC101", NULL, NULL },
+{ 0x414c4740, 0xfffffff0, "ALC202", NULL, NULL },
+{ 0x414c4750, 0xfffffff0, "ALC250", NULL, NULL },
+{ 0x414c4770, 0xfffffff0, "ALC203", NULL, NULL },
+{ 0x434d4941, 0xffffffff, "CMI9738", patch_cm9738, NULL },
+{ 0x434d4961, 0xffffffff, "CMI9739", patch_cm9739, NULL },
+{ 0x434d4978, 0xffffffff, "CMI9761", patch_cm9761, NULL },
+{ 0x434d4982, 0xffffffff, "CMI9761", patch_cm9761, NULL },
+{ 0x434d4983, 0xffffffff, "CMI9761", patch_cm9761, NULL },
+{ 0x43525900, 0xfffffff8, "CS4297", NULL, NULL },
+{ 0x43525910, 0xfffffff8, "CS4297A", patch_cirrus_spdif, NULL },
+{ 0x43525920, 0xfffffff8, "CS4298", patch_cirrus_spdif, NULL },
+{ 0x43525928, 0xfffffff8, "CS4294", NULL, NULL },
+{ 0x43525930, 0xfffffff8, "CS4299", patch_cirrus_cs4299, NULL },
+{ 0x43525948, 0xfffffff8, "CS4201", NULL, NULL },
+{ 0x43525958, 0xfffffff8, "CS4205", patch_cirrus_spdif, NULL },
+{ 0x43525960, 0xfffffff8, "CS4291", NULL, NULL },
+{ 0x43525970, 0xfffffff8, "CS4202", NULL, NULL },
+{ 0x43585421, 0xffffffff, "HSD11246", NULL, NULL }, // SmartMC II
+{ 0x43585428, 0xfffffff8, "Cx20468", patch_conexant, NULL }, // SmartAMC fixme: the mask might be different
+{ 0x44543031, 0xfffffff0, "DT0398", NULL, NULL },
+{ 0x454d4328, 0xffffffff, "28028", NULL, NULL }, // same as TR28028?
+{ 0x45838308, 0xffffffff, "ESS1988", NULL, NULL },
+{ 0x48525300, 0xffffff00, "HMP9701", NULL, NULL },
+{ 0x49434501, 0xffffffff, "ICE1230", NULL, NULL },
+{ 0x49434511, 0xffffffff, "ICE1232", NULL, NULL }, // alias VIA VT1611A?
+{ 0x49434514, 0xffffffff, "ICE1232A", NULL, NULL },
+{ 0x49434551, 0xffffffff, "VT1616", patch_vt1616, NULL },
+{ 0x49434552, 0xffffffff, "VT1616i", patch_vt1616, NULL }, // VT1616 compatible (chipset integrated)
+{ 0x49544520, 0xffffffff, "IT2226E", NULL, NULL },
+{ 0x49544561, 0xffffffff, "IT2646E", patch_it2646, NULL },
+{ 0x4e534300, 0xffffffff, "LM4540,43,45,46,48", NULL, NULL }, // only guess --jk
+{ 0x4e534331, 0xffffffff, "LM4549", NULL, NULL },
+{ 0x4e534350, 0xffffffff, "LM4550", NULL, NULL },
+{ 0x50534304, 0xffffffff, "UCB1400", NULL, NULL },
+{ 0x53494c20, 0xffffffe0, "Si3036,8", NULL, mpatch_si3036 },
+{ 0x54524102, 0xffffffff, "TR28022", NULL, NULL },
+{ 0x54524106, 0xffffffff, "TR28026", NULL, NULL },
+{ 0x54524108, 0xffffffff, "TR28028", patch_tritech_tr28028, NULL }, // added by xin jin [07/09/99]
+{ 0x54524123, 0xffffffff, "TR28602", NULL, NULL }, // only guess --jk [TR28023 = eMicro EM28023 (new CT1297)]
+{ 0x54584e20, 0xffffffff, "TLC320AD9xC", NULL, NULL },
+{ 0x56494161, 0xffffffff, "VIA1612A", NULL, NULL }, // modified ICE1232 with S/PDIF
+{ 0x57454301, 0xffffffff, "W83971D", NULL, NULL },
+{ 0x574d4c00, 0xffffffff, "WM9701A", NULL, NULL },
+{ 0x574d4C03, 0xffffffff, "WM9703,WM9707,WM9708,WM9717", patch_wolfson03, NULL},
+{ 0x574d4C04, 0xffffffff, "WM9704M,WM9704Q", patch_wolfson04, NULL},
+{ 0x574d4C05, 0xffffffff, "WM9705,WM9710", patch_wolfson05, NULL},
+{ 0x574d4C09, 0xffffffff, "WM9709", NULL, NULL},
+{ 0x574d4C12, 0xffffffff, "WM9711,WM9712", patch_wolfson11, NULL},
+{ 0x574d4c13, 0xffffffff, "WM9713,WM9714", patch_wolfson13, NULL, AC97_DEFAULT_POWER_OFF},
+{ 0x594d4800, 0xffffffff, "YMF743", NULL, NULL },
+{ 0x594d4802, 0xffffffff, "YMF752", NULL, NULL },
+{ 0x594d4803, 0xffffffff, "YMF753", patch_yamaha_ymf753, NULL },
+{ 0x83847600, 0xffffffff, "STAC9700,83,84", patch_sigmatel_stac9700, NULL },
+{ 0x83847604, 0xffffffff, "STAC9701,3,4,5", NULL, NULL },
+{ 0x83847605, 0xffffffff, "STAC9704", NULL, NULL },
+{ 0x83847608, 0xffffffff, "STAC9708,11", patch_sigmatel_stac9708, NULL },
+{ 0x83847609, 0xffffffff, "STAC9721,23", patch_sigmatel_stac9721, NULL },
+{ 0x83847644, 0xffffffff, "STAC9744", patch_sigmatel_stac9744, NULL },
+{ 0x83847650, 0xffffffff, "STAC9750,51", NULL, NULL }, // patch?
+{ 0x83847652, 0xffffffff, "STAC9752,53", NULL, NULL }, // patch?
+{ 0x83847656, 0xffffffff, "STAC9756,57", patch_sigmatel_stac9756, NULL },
+{ 0x83847658, 0xffffffff, "STAC9758,59", patch_sigmatel_stac9758, NULL },
+{ 0x83847666, 0xffffffff, "STAC9766,67", NULL, NULL }, // patch?
+{ 0, 0, NULL, NULL, NULL }
+};
+
+const char *snd_ac97_stereo_enhancements[] =
+{
+ /* 0 */ "No 3D Stereo Enhancement",
+ /* 1 */ "Analog Devices Phat Stereo",
+ /* 2 */ "Creative Stereo Enhancement",
+ /* 3 */ "National Semi 3D Stereo Enhancement",
+ /* 4 */ "YAMAHA Ymersion",
+ /* 5 */ "BBE 3D Stereo Enhancement",
+ /* 6 */ "Crystal Semi 3D Stereo Enhancement",
+ /* 7 */ "Qsound QXpander",
+ /* 8 */ "Spatializer 3D Stereo Enhancement",
+ /* 9 */ "SRS 3D Stereo Enhancement",
+ /* 10 */ "Platform Tech 3D Stereo Enhancement",
+ /* 11 */ "AKM 3D Audio",
+ /* 12 */ "Aureal Stereo Enhancement",
+ /* 13 */ "Aztech 3D Enhancement",
+ /* 14 */ "Binaura 3D Audio Enhancement",
+ /* 15 */ "ESS Technology Stereo Enhancement",
+ /* 16 */ "Harman International VMAx",
+ /* 17 */ "Nvidea/IC Ensemble/KS Waves 3D Stereo Enhancement",
+ /* 18 */ "Philips Incredible Sound",
+ /* 19 */ "Texas Instruments 3D Stereo Enhancement",
+ /* 20 */ "VLSI Technology 3D Stereo Enhancement",
+ /* 21 */ "TriTech 3D Stereo Enhancement",
+ /* 22 */ "Realtek 3D Stereo Enhancement",
+ /* 23 */ "Samsung 3D Stereo Enhancement",
+ /* 24 */ "Wolfson Microelectronics 3D Enhancement",
+ /* 25 */ "Delta Integration 3D Enhancement",
+ /* 26 */ "SigmaTel 3D Enhancement",
+ /* 27 */ "IC Ensemble/KS Waves",
+ /* 28 */ "Rockwell 3D Stereo Enhancement",
+ /* 29 */ "Reserved 29",
+ /* 30 */ "Reserved 30",
+ /* 31 */ "Reserved 31"
+};
+
+/*
+ * Shared AC97 controllers (ICH, ATIIXP...)
+ */
+static DECLARE_MUTEX(shared_codec_mutex);
+static ac97_t *shared_codec[AC97_SHARED_TYPES][4];
+
+
+/*
+ * I/O routines
+ */
+
+static int snd_ac97_valid_reg(ac97_t *ac97, unsigned short reg)
+{
+ if (ac97->limited_regs && ! test_bit(reg, ac97->reg_accessed))
+ return 0;
+
+ /* filter some registers for buggy codecs */
+ switch (ac97->id) {
+ case AC97_ID_AK4540:
+ case AC97_ID_AK4542:
+ if (reg <= 0x1c || reg == 0x20 || reg == 0x26 || reg >= 0x7c)
+ return 1;
+ return 0;
+ case AC97_ID_AD1819: /* AD1819 */
+ case AC97_ID_AD1881: /* AD1881 */
+ case AC97_ID_AD1881A: /* AD1881A */
+ if (reg >= 0x3a && reg <= 0x6e) /* 0x59 */
+ return 0;
+ return 1;
+ case AC97_ID_AD1885: /* AD1885 */
+ case AC97_ID_AD1886: /* AD1886 */
+ case AC97_ID_AD1886A: /* AD1886A - !!verify!! --jk */
+ case AC97_ID_AD1887: /* AD1887 - !!verify!! --jk */
+ if (reg == 0x5a)
+ return 1;
+ if (reg >= 0x3c && reg <= 0x6e) /* 0x59 */
+ return 0;
+ return 1;
+ case AC97_ID_STAC9700:
+ case AC97_ID_STAC9704:
+ case AC97_ID_STAC9705:
+ case AC97_ID_STAC9708:
+ case AC97_ID_STAC9721:
+ case AC97_ID_STAC9744:
+ case AC97_ID_STAC9756:
+ if (reg <= 0x3a || reg >= 0x5a)
+ return 1;
+ return 0;
+ }
+ return 1;
+}
+
+/**
+ * snd_ac97_write - write a value on the given register
+ * @ac97: the ac97 instance
+ * @reg: the register to change
+ * @value: the value to set
+ *
+ * Writes a value on the given register. This will invoke the write
+ * callback directly after the register check.
+ * This function doesn't change the register cache unlike
+ * #snd_ca97_write_cache(), so use this only when you don't want to
+ * reflect the change to the suspend/resume state.
+ */
+void snd_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short value)
+{
+ if (!snd_ac97_valid_reg(ac97, reg))
+ return;
+ if ((ac97->id & 0xffffff00) == AC97_ID_ALC100) {
+ /* Fix H/W bug of ALC100/100P */
+ if (reg == AC97_MASTER || reg == AC97_HEADPHONE)
+ ac97->bus->ops->write(ac97, AC97_RESET, 0); /* reset audio codec */
+ }
+ ac97->bus->ops->write(ac97, reg, value);
+}
+
+/**
+ * snd_ac97_read - read a value from the given register
+ *
+ * @ac97: the ac97 instance
+ * @reg: the register to read
+ *
+ * Reads a value from the given register. This will invoke the read
+ * callback directly after the register check.
+ *
+ * Returns the read value.
+ */
+unsigned short snd_ac97_read(ac97_t *ac97, unsigned short reg)
+{
+ if (!snd_ac97_valid_reg(ac97, reg))
+ return 0;
+ return ac97->bus->ops->read(ac97, reg);
+}
+
+/* read a register - return the cached value if already read */
+static inline unsigned short snd_ac97_read_cache(ac97_t *ac97, unsigned short reg)
+{
+ if (! test_bit(reg, ac97->reg_accessed)) {
+ ac97->regs[reg] = ac97->bus->ops->read(ac97, reg);
+ // set_bit(reg, ac97->reg_accessed);
+ }
+ return ac97->regs[reg];
+}
+
+/**
+ * snd_ac97_write_cache - write a value on the given register and update the cache
+ * @ac97: the ac97 instance
+ * @reg: the register to change
+ * @value: the value to set
+ *
+ * Writes a value on the given register and updates the register
+ * cache. The cached values are used for the cached-read and the
+ * suspend/resume.
+ */
+void snd_ac97_write_cache(ac97_t *ac97, unsigned short reg, unsigned short value)
+{
+ if (!snd_ac97_valid_reg(ac97, reg))
+ return;
+ down(&ac97->reg_mutex);
+ ac97->regs[reg] = value;
+ ac97->bus->ops->write(ac97, reg, value);
+ set_bit(reg, ac97->reg_accessed);
+ up(&ac97->reg_mutex);
+}
+
+/**
+ * snd_ac97_update - update the value on the given register
+ * @ac97: the ac97 instance
+ * @reg: the register to change
+ * @value: the value to set
+ *
+ * Compares the value with the register cache and updates the value
+ * only when the value is changed.
+ *
+ * Returns 1 if the value is changed, 0 if no change, or a negative
+ * code on failure.
+ */
+int snd_ac97_update(ac97_t *ac97, unsigned short reg, unsigned short value)
+{
+ int change;
+
+ if (!snd_ac97_valid_reg(ac97, reg))
+ return -EINVAL;
+ down(&ac97->reg_mutex);
+ change = ac97->regs[reg] != value;
+ if (change) {
+ ac97->regs[reg] = value;
+ ac97->bus->ops->write(ac97, reg, value);
+ }
+ up(&ac97->reg_mutex);
+ return change;
+}
+
+/**
+ * snd_ac97_update_bits - update the bits on the given register
+ * @ac97: the ac97 instance
+ * @reg: the register to change
+ * @mask: the bit-mask to change
+ * @value: the value to set
+ *
+ * Updates the masked-bits on the given register only when the value
+ * is changed.
+ *
+ * Returns 1 if the bits are changed, 0 if no change, or a negative
+ * code on failure.
+ */
+int snd_ac97_update_bits(ac97_t *ac97, unsigned short reg, unsigned short mask, unsigned short value)
+{
+ int change;
+
+ if (!snd_ac97_valid_reg(ac97, reg))
+ return -EINVAL;
+ down(&ac97->reg_mutex);
+ change = snd_ac97_update_bits_nolock(ac97, reg, mask, value);
+ up(&ac97->reg_mutex);
+ return change;
+}
+
+/* no lock version - see snd_ac97_updat_bits() */
+int snd_ac97_update_bits_nolock(ac97_t *ac97, unsigned short reg,
+ unsigned short mask, unsigned short value)
+{
+ int change;
+ unsigned short old, new;
+
+ old = snd_ac97_read_cache(ac97, reg);
+ new = (old & ~mask) | value;
+ change = old != new;
+ if (change) {
+ ac97->regs[reg] = new;
+ ac97->bus->ops->write(ac97, reg, new);
+ }
+ return change;
+}
+
+static int snd_ac97_ad18xx_update_pcm_bits(ac97_t *ac97, int codec, unsigned short mask, unsigned short value)
+{
+ int change;
+ unsigned short old, new, cfg;
+
+ down(&ac97->page_mutex);
+ old = ac97->spec.ad18xx.pcmreg[codec];
+ new = (old & ~mask) | value;
+ change = old != new;
+ if (change) {
+ down(&ac97->reg_mutex);
+ cfg = snd_ac97_read_cache(ac97, AC97_AD_SERIAL_CFG);
+ ac97->spec.ad18xx.pcmreg[codec] = new;
+ /* select single codec */
+ ac97->bus->ops->write(ac97, AC97_AD_SERIAL_CFG,
+ (cfg & ~0x7000) |
+ ac97->spec.ad18xx.unchained[codec] | ac97->spec.ad18xx.chained[codec]);
+ /* update PCM bits */
+ ac97->bus->ops->write(ac97, AC97_PCM, new);
+ /* select all codecs */
+ ac97->bus->ops->write(ac97, AC97_AD_SERIAL_CFG,
+ cfg | 0x7000);
+ up(&ac97->reg_mutex);
+ }
+ up(&ac97->page_mutex);
+ return change;
+}
+
+/*
+ * Controls
+ */
+
+int snd_ac97_info_enum_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ struct ac97_enum *e = (struct ac97_enum *)kcontrol->private_value;
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = e->shift_l == e->shift_r ? 1 : 2;
+ uinfo->value.enumerated.items = e->mask;
+
+ if (uinfo->value.enumerated.item > e->mask - 1)
+ uinfo->value.enumerated.item = e->mask - 1;
+ strcpy(uinfo->value.enumerated.name, e->texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+int snd_ac97_get_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ struct ac97_enum *e = (struct ac97_enum *)kcontrol->private_value;
+ unsigned short val;
+
+ val = snd_ac97_read_cache(ac97, e->reg);
+ ucontrol->value.enumerated.item[0] = (val >> e->shift_l) & (e->mask - 1);
+ if (e->shift_l != e->shift_r)
+ ucontrol->value.enumerated.item[1] = (val >> e->shift_r) & (e->mask - 1);
+
+ return 0;
+}
+
+int snd_ac97_put_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ struct ac97_enum *e = (struct ac97_enum *)kcontrol->private_value;
+ unsigned short val;
+ unsigned short mask;
+
+ if (ucontrol->value.enumerated.item[0] > e->mask - 1)
+ return -EINVAL;
+ val = ucontrol->value.enumerated.item[0] << e->shift_l;
+ mask = (e->mask - 1) << e->shift_l;
+ if (e->shift_l != e->shift_r) {
+ if (ucontrol->value.enumerated.item[1] > e->mask - 1)
+ return -EINVAL;
+ val |= ucontrol->value.enumerated.item[1] << e->shift_r;
+ mask |= (e->mask - 1) << e->shift_r;
+ }
+ return snd_ac97_update_bits(ac97, e->reg, mask, val);
+}
+
+/* save/restore ac97 v2.3 paging */
+static int snd_ac97_page_save(ac97_t *ac97, int reg, snd_kcontrol_t *kcontrol)
+{
+ int page_save = -1;
+ if ((kcontrol->private_value & (1<<25)) &&
+ (ac97->ext_id & AC97_EI_REV_MASK) >= AC97_EI_REV_23 &&
+ (reg >= 0x60 && reg < 0x70)) {
+ unsigned short page = (kcontrol->private_value >> 26) & 0x0f;
+ down(&ac97->page_mutex); /* lock paging */
+ page_save = snd_ac97_read(ac97, AC97_INT_PAGING) & AC97_PAGE_MASK;
+ snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, page);
+ }
+ return page_save;
+}
+
+static void snd_ac97_page_restore(ac97_t *ac97, int page_save)
+{
+ if (page_save >= 0) {
+ snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, page_save);
+ up(&ac97->page_mutex); /* unlock paging */
+ }
+}
+
+/* volume and switch controls */
+int snd_ac97_info_volsw(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ int mask = (kcontrol->private_value >> 16) & 0xff;
+ int shift = (kcontrol->private_value >> 8) & 0x0f;
+ int rshift = (kcontrol->private_value >> 12) & 0x0f;
+
+ uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = shift == rshift ? 1 : 2;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = mask;
+ return 0;
+}
+
+int snd_ac97_get_volsw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int reg = kcontrol->private_value & 0xff;
+ int shift = (kcontrol->private_value >> 8) & 0x0f;
+ int rshift = (kcontrol->private_value >> 12) & 0x0f;
+ int mask = (kcontrol->private_value >> 16) & 0xff;
+ int invert = (kcontrol->private_value >> 24) & 0x01;
+ int page_save;
+
+ page_save = snd_ac97_page_save(ac97, reg, kcontrol);
+ ucontrol->value.integer.value[0] = (snd_ac97_read_cache(ac97, reg) >> shift) & mask;
+ if (shift != rshift)
+ ucontrol->value.integer.value[1] = (snd_ac97_read_cache(ac97, reg) >> rshift) & mask;
+ if (invert) {
+ ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
+ if (shift != rshift)
+ ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
+ }
+ snd_ac97_page_restore(ac97, page_save);
+ return 0;
+}
+
+int snd_ac97_put_volsw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int reg = kcontrol->private_value & 0xff;
+ int shift = (kcontrol->private_value >> 8) & 0x0f;
+ int rshift = (kcontrol->private_value >> 12) & 0x0f;
+ int mask = (kcontrol->private_value >> 16) & 0xff;
+ int invert = (kcontrol->private_value >> 24) & 0x01;
+ int err, page_save;
+ unsigned short val, val2, val_mask;
+
+ page_save = snd_ac97_page_save(ac97, reg, kcontrol);
+ val = (ucontrol->value.integer.value[0] & mask);
+ if (invert)
+ val = mask - val;
+ val_mask = mask << shift;
+ val = val << shift;
+ if (shift != rshift) {
+ val2 = (ucontrol->value.integer.value[1] & mask);
+ if (invert)
+ val2 = mask - val2;
+ val_mask |= mask << rshift;
+ val |= val2 << rshift;
+ }
+ err = snd_ac97_update_bits(ac97, reg, val_mask, val);
+ snd_ac97_page_restore(ac97, page_save);
+ return err;
+}
+
+static const snd_kcontrol_new_t snd_ac97_controls_master_mono[2] = {
+AC97_SINGLE("Master Mono Playback Switch", AC97_MASTER_MONO, 15, 1, 1),
+AC97_SINGLE("Master Mono Playback Volume", AC97_MASTER_MONO, 0, 31, 1)
+};
+
+static const snd_kcontrol_new_t snd_ac97_controls_tone[2] = {
+AC97_SINGLE("Tone Control - Bass", AC97_MASTER_TONE, 8, 15, 1),
+AC97_SINGLE("Tone Control - Treble", AC97_MASTER_TONE, 0, 15, 1)
+};
+
+static const snd_kcontrol_new_t snd_ac97_controls_pc_beep[2] = {
+AC97_SINGLE("PC Speaker Playback Switch", AC97_PC_BEEP, 15, 1, 1),
+AC97_SINGLE("PC Speaker Playback Volume", AC97_PC_BEEP, 1, 15, 1)
+};
+
+static const snd_kcontrol_new_t snd_ac97_controls_mic_boost =
+ AC97_SINGLE("Mic Boost (+20dB)", AC97_MIC, 6, 1, 0);
+
+
+static const char* std_rec_sel[] = {"Mic", "CD", "Video", "Aux", "Line", "Mix", "Mix Mono", "Phone"};
+static const char* std_3d_path[] = {"pre 3D", "post 3D"};
+static const char* std_mix[] = {"Mix", "Mic"};
+static const char* std_mic[] = {"Mic1", "Mic2"};
+
+static const struct ac97_enum std_enum[] = {
+AC97_ENUM_DOUBLE(AC97_REC_SEL, 8, 0, 8, std_rec_sel),
+AC97_ENUM_SINGLE(AC97_GENERAL_PURPOSE, 15, 2, std_3d_path),
+AC97_ENUM_SINGLE(AC97_GENERAL_PURPOSE, 9, 2, std_mix),
+AC97_ENUM_SINGLE(AC97_GENERAL_PURPOSE, 8, 2, std_mic),
+};
+
+static const snd_kcontrol_new_t snd_ac97_control_capture_src =
+AC97_ENUM("Capture Source", std_enum[0]);
+
+static const snd_kcontrol_new_t snd_ac97_control_capture_vol =
+AC97_DOUBLE("Capture Volume", AC97_REC_GAIN, 8, 0, 15, 0);
+
+static const snd_kcontrol_new_t snd_ac97_controls_mic_capture[2] = {
+AC97_SINGLE("Mic Capture Switch", AC97_REC_GAIN_MIC, 15, 1, 1),
+AC97_SINGLE("Mic Capture Volume", AC97_REC_GAIN_MIC, 0, 15, 0)
+};
+
+typedef enum {
+ AC97_GENERAL_PCM_OUT = 0,
+ AC97_GENERAL_STEREO_ENHANCEMENT,
+ AC97_GENERAL_3D,
+ AC97_GENERAL_LOUDNESS,
+ AC97_GENERAL_MONO,
+ AC97_GENERAL_MIC,
+ AC97_GENERAL_LOOPBACK
+} ac97_general_index_t;
+
+static const snd_kcontrol_new_t snd_ac97_controls_general[7] = {
+AC97_ENUM("PCM Out Path & Mute", std_enum[1]),
+AC97_SINGLE("Simulated Stereo Enhancement", AC97_GENERAL_PURPOSE, 14, 1, 0),
+AC97_SINGLE("3D Control - Switch", AC97_GENERAL_PURPOSE, 13, 1, 0),
+AC97_SINGLE("Loudness (bass boost)", AC97_GENERAL_PURPOSE, 12, 1, 0),
+AC97_ENUM("Mono Output Select", std_enum[2]),
+AC97_ENUM("Mic Select", std_enum[3]),
+AC97_SINGLE("ADC/DAC Loopback", AC97_GENERAL_PURPOSE, 7, 1, 0)
+};
+
+const snd_kcontrol_new_t snd_ac97_controls_3d[2] = {
+AC97_SINGLE("3D Control - Center", AC97_3D_CONTROL, 8, 15, 0),
+AC97_SINGLE("3D Control - Depth", AC97_3D_CONTROL, 0, 15, 0)
+};
+
+static const snd_kcontrol_new_t snd_ac97_controls_center[2] = {
+AC97_SINGLE("Center Playback Switch", AC97_CENTER_LFE_MASTER, 7, 1, 1),
+AC97_SINGLE("Center Playback Volume", AC97_CENTER_LFE_MASTER, 0, 31, 1)
+};
+
+static const snd_kcontrol_new_t snd_ac97_controls_lfe[2] = {
+AC97_SINGLE("LFE Playback Switch", AC97_CENTER_LFE_MASTER, 15, 1, 1),
+AC97_SINGLE("LFE Playback Volume", AC97_CENTER_LFE_MASTER, 8, 31, 1)
+};
+
+static const snd_kcontrol_new_t snd_ac97_controls_surround[2] = {
+AC97_DOUBLE("Surround Playback Switch", AC97_SURROUND_MASTER, 15, 7, 1, 1),
+AC97_DOUBLE("Surround Playback Volume", AC97_SURROUND_MASTER, 8, 0, 31, 1),
+};
+
+static const snd_kcontrol_new_t snd_ac97_control_eapd =
+AC97_SINGLE("External Amplifier", AC97_POWERDOWN, 15, 1, 1);
+
+/* change the existing EAPD control as inverted */
+static void set_inv_eapd(ac97_t *ac97, snd_kcontrol_t *kctl)
+{
+ kctl->private_value = AC97_SINGLE_VALUE(AC97_POWERDOWN, 15, 1, 0);
+ snd_ac97_update_bits(ac97, AC97_POWERDOWN, (1<<15), (1<<15)); /* EAPD up */
+ ac97->scaps |= AC97_SCAP_INV_EAPD;
+}
+
+static int snd_ac97_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
+ uinfo->count = 1;
+ return 0;
+}
+
+static int snd_ac97_spdif_cmask_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ucontrol->value.iec958.status[0] = IEC958_AES0_PROFESSIONAL |
+ IEC958_AES0_NONAUDIO |
+ IEC958_AES0_CON_EMPHASIS_5015 |
+ IEC958_AES0_CON_NOT_COPYRIGHT;
+ ucontrol->value.iec958.status[1] = IEC958_AES1_CON_CATEGORY |
+ IEC958_AES1_CON_ORIGINAL;
+ ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
+ return 0;
+}
+
+static int snd_ac97_spdif_pmask_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ /* FIXME: AC'97 spec doesn't say which bits are used for what */
+ ucontrol->value.iec958.status[0] = IEC958_AES0_PROFESSIONAL |
+ IEC958_AES0_NONAUDIO |
+ IEC958_AES0_PRO_FS |
+ IEC958_AES0_PRO_EMPHASIS_5015;
+ return 0;
+}
+
+static int snd_ac97_spdif_default_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+
+ down(&ac97->reg_mutex);
+ ucontrol->value.iec958.status[0] = ac97->spdif_status & 0xff;
+ ucontrol->value.iec958.status[1] = (ac97->spdif_status >> 8) & 0xff;
+ ucontrol->value.iec958.status[2] = (ac97->spdif_status >> 16) & 0xff;
+ ucontrol->value.iec958.status[3] = (ac97->spdif_status >> 24) & 0xff;
+ up(&ac97->reg_mutex);
+ return 0;
+}
+
+static int snd_ac97_spdif_default_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned int new = 0;
+ unsigned short val = 0;
+ int change;
+
+ new = val = ucontrol->value.iec958.status[0] & (IEC958_AES0_PROFESSIONAL|IEC958_AES0_NONAUDIO);
+ if (ucontrol->value.iec958.status[0] & IEC958_AES0_PROFESSIONAL) {
+ new |= ucontrol->value.iec958.status[0] & (IEC958_AES0_PRO_FS|IEC958_AES0_PRO_EMPHASIS_5015);
+ switch (new & IEC958_AES0_PRO_FS) {
+ case IEC958_AES0_PRO_FS_44100: val |= 0<<12; break;
+ case IEC958_AES0_PRO_FS_48000: val |= 2<<12; break;
+ case IEC958_AES0_PRO_FS_32000: val |= 3<<12; break;
+ default: val |= 1<<12; break;
+ }
+ if ((new & IEC958_AES0_PRO_EMPHASIS) == IEC958_AES0_PRO_EMPHASIS_5015)
+ val |= 1<<3;
+ } else {
+ new |= ucontrol->value.iec958.status[0] & (IEC958_AES0_CON_EMPHASIS_5015|IEC958_AES0_CON_NOT_COPYRIGHT);
+ new |= ((ucontrol->value.iec958.status[1] & (IEC958_AES1_CON_CATEGORY|IEC958_AES1_CON_ORIGINAL)) << 8);
+ new |= ((ucontrol->value.iec958.status[3] & IEC958_AES3_CON_FS) << 24);
+ if ((new & IEC958_AES0_CON_EMPHASIS) == IEC958_AES0_CON_EMPHASIS_5015)
+ val |= 1<<3;
+ if (!(new & IEC958_AES0_CON_NOT_COPYRIGHT))
+ val |= 1<<2;
+ val |= ((new >> 8) & 0xff) << 4; // category + original
+ switch ((new >> 24) & 0xff) {
+ case IEC958_AES3_CON_FS_44100: val |= 0<<12; break;
+ case IEC958_AES3_CON_FS_48000: val |= 2<<12; break;
+ case IEC958_AES3_CON_FS_32000: val |= 3<<12; break;
+ default: val |= 1<<12; break;
+ }
+ }
+
+ down(&ac97->reg_mutex);
+ change = ac97->spdif_status != new;
+ ac97->spdif_status = new;
+
+ if (ac97->flags & AC97_CS_SPDIF) {
+ int x = (val >> 12) & 0x03;
+ switch (x) {
+ case 0: x = 1; break; // 44.1
+ case 2: x = 0; break; // 48.0
+ default: x = 0; break; // illegal.
+ }
+ change |= snd_ac97_update_bits_nolock(ac97, AC97_CSR_SPDIF, 0x3fff, ((val & 0xcfff) | (x << 12)));
+ } else if (ac97->flags & AC97_CX_SPDIF) {
+ int v;
+ v = new & (IEC958_AES0_CON_EMPHASIS_5015|IEC958_AES0_CON_NOT_COPYRIGHT) ? 0 : AC97_CXR_COPYRGT;
+ v |= new & IEC958_AES0_NONAUDIO ? AC97_CXR_SPDIF_AC3 : AC97_CXR_SPDIF_PCM;
+ change |= snd_ac97_update_bits_nolock(ac97, AC97_CXR_AUDIO_MISC,
+ AC97_CXR_SPDIF_MASK | AC97_CXR_COPYRGT,
+ v);
+ } else {
+ unsigned short extst = snd_ac97_read_cache(ac97, AC97_EXTENDED_STATUS);
+ snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); /* turn off */
+
+ change |= snd_ac97_update_bits_nolock(ac97, AC97_SPDIF, 0x3fff, val);
+ if (extst & AC97_EA_SPDIF) {
+ snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF); /* turn on again */
+ }
+ }
+ up(&ac97->reg_mutex);
+
+ return change;
+}
+
+static int snd_ac97_put_spsa(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int reg = kcontrol->private_value & 0xff;
+ int shift = (kcontrol->private_value >> 8) & 0xff;
+ int mask = (kcontrol->private_value >> 16) & 0xff;
+ // int invert = (kcontrol->private_value >> 24) & 0xff;
+ unsigned short value, old, new;
+ int change;
+
+ value = (ucontrol->value.integer.value[0] & mask);
+
+ down(&ac97->reg_mutex);
+ mask <<= shift;
+ value <<= shift;
+ old = snd_ac97_read_cache(ac97, reg);
+ new = (old & ~mask) | value;
+ change = old != new;
+
+ if (change) {
+ unsigned short extst = snd_ac97_read_cache(ac97, AC97_EXTENDED_STATUS);
+ snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0); /* turn off */
+ change = snd_ac97_update_bits_nolock(ac97, reg, mask, value);
+ if (extst & AC97_EA_SPDIF)
+ snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF); /* turn on again */
+ }
+ up(&ac97->reg_mutex);
+ return change;
+}
+
+const snd_kcontrol_new_t snd_ac97_controls_spdif[5] = {
+ {
+ .access = SNDRV_CTL_ELEM_ACCESS_READ,
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
+ .info = snd_ac97_spdif_mask_info,
+ .get = snd_ac97_spdif_cmask_get,
+ },
+ {
+ .access = SNDRV_CTL_ELEM_ACCESS_READ,
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
+ .info = snd_ac97_spdif_mask_info,
+ .get = snd_ac97_spdif_pmask_get,
+ },
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
+ .info = snd_ac97_spdif_mask_info,
+ .get = snd_ac97_spdif_default_get,
+ .put = snd_ac97_spdif_default_put,
+ },
+
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH),AC97_EXTENDED_STATUS, 2, 1, 0),
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "AC97-SPSA",
+ .info = snd_ac97_info_volsw,
+ .get = snd_ac97_get_volsw,
+ .put = snd_ac97_put_spsa,
+ .private_value = AC97_SINGLE_VALUE(AC97_EXTENDED_STATUS, 4, 3, 0)
+ },
+};
+
+#define AD18XX_PCM_BITS(xname, codec, lshift, rshift, mask) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ac97_ad18xx_pcm_info_bits, \
+ .get = snd_ac97_ad18xx_pcm_get_bits, .put = snd_ac97_ad18xx_pcm_put_bits, \
+ .private_value = (codec) | ((lshift) << 8) | ((rshift) << 12) | ((mask) << 16) }
+
+static int snd_ac97_ad18xx_pcm_info_bits(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int mask = (kcontrol->private_value >> 16) & 0x0f;
+ int lshift = (kcontrol->private_value >> 8) & 0x0f;
+ int rshift = (kcontrol->private_value >> 12) & 0x0f;
+
+ uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
+ if (lshift != rshift && (ac97->flags & AC97_STEREO_MUTES))
+ uinfo->count = 2;
+ else
+ uinfo->count = 1;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = mask;
+ return 0;
+}
+
+static int snd_ac97_ad18xx_pcm_get_bits(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int codec = kcontrol->private_value & 3;
+ int lshift = (kcontrol->private_value >> 8) & 0x0f;
+ int rshift = (kcontrol->private_value >> 12) & 0x0f;
+ int mask = (kcontrol->private_value >> 16) & 0xff;
+
+ ucontrol->value.integer.value[0] = mask - ((ac97->spec.ad18xx.pcmreg[codec] >> lshift) & mask);
+ if (lshift != rshift && (ac97->flags & AC97_STEREO_MUTES))
+ ucontrol->value.integer.value[1] = mask - ((ac97->spec.ad18xx.pcmreg[codec] >> rshift) & mask);
+ return 0;
+}
+
+static int snd_ac97_ad18xx_pcm_put_bits(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int codec = kcontrol->private_value & 3;
+ int lshift = (kcontrol->private_value >> 8) & 0x0f;
+ int rshift = (kcontrol->private_value >> 12) & 0x0f;
+ int mask = (kcontrol->private_value >> 16) & 0xff;
+ unsigned short val, valmask;
+
+ val = (mask - (ucontrol->value.integer.value[0] & mask)) << lshift;
+ valmask = mask << lshift;
+ if (lshift != rshift && (ac97->flags & AC97_STEREO_MUTES)) {
+ val |= (mask - (ucontrol->value.integer.value[1] & mask)) << rshift;
+ valmask |= mask << rshift;
+ }
+ return snd_ac97_ad18xx_update_pcm_bits(ac97, codec, valmask, val);
+}
+
+#define AD18XX_PCM_VOLUME(xname, codec) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ac97_ad18xx_pcm_info_volume, \
+ .get = snd_ac97_ad18xx_pcm_get_volume, .put = snd_ac97_ad18xx_pcm_put_volume, \
+ .private_value = codec }
+
+static int snd_ac97_ad18xx_pcm_info_volume(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 2;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = 31;
+ return 0;
+}
+
+static int snd_ac97_ad18xx_pcm_get_volume(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int codec = kcontrol->private_value & 3;
+
+ down(&ac97->page_mutex);
+ ucontrol->value.integer.value[0] = 31 - ((ac97->spec.ad18xx.pcmreg[codec] >> 0) & 31);
+ ucontrol->value.integer.value[1] = 31 - ((ac97->spec.ad18xx.pcmreg[codec] >> 8) & 31);
+ up(&ac97->page_mutex);
+ return 0;
+}
+
+static int snd_ac97_ad18xx_pcm_put_volume(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int codec = kcontrol->private_value & 3;
+ unsigned short val1, val2;
+
+ val1 = 31 - (ucontrol->value.integer.value[0] & 31);
+ val2 = 31 - (ucontrol->value.integer.value[1] & 31);
+ return snd_ac97_ad18xx_update_pcm_bits(ac97, codec, 0x1f1f, (val1 << 8) | val2);
+}
+
+static const snd_kcontrol_new_t snd_ac97_controls_ad18xx_pcm[2] = {
+AD18XX_PCM_BITS("PCM Playback Switch", 0, 15, 7, 1),
+AD18XX_PCM_VOLUME("PCM Playback Volume", 0)
+};
+
+static const snd_kcontrol_new_t snd_ac97_controls_ad18xx_surround[2] = {
+AD18XX_PCM_BITS("Surround Playback Switch", 1, 15, 7, 1),
+AD18XX_PCM_VOLUME("Surround Playback Volume", 1)
+};
+
+static const snd_kcontrol_new_t snd_ac97_controls_ad18xx_center[2] = {
+AD18XX_PCM_BITS("Center Playback Switch", 2, 15, 15, 1),
+AD18XX_PCM_BITS("Center Playback Volume", 2, 8, 8, 31)
+};
+
+static const snd_kcontrol_new_t snd_ac97_controls_ad18xx_lfe[2] = {
+AD18XX_PCM_BITS("LFE Playback Switch", 2, 7, 7, 1),
+AD18XX_PCM_BITS("LFE Playback Volume", 2, 0, 0, 31)
+};
+
+/*
+ *
+ */
+
+static void snd_ac97_powerdown(ac97_t *ac97);
+
+static int snd_ac97_bus_free(ac97_bus_t *bus)
+{
+ if (bus) {
+ snd_ac97_bus_proc_done(bus);
+ kfree(bus->pcms);
+ if (bus->private_free)
+ bus->private_free(bus);
+ kfree(bus);
+ }
+ return 0;
+}
+
+static int snd_ac97_bus_dev_free(snd_device_t *device)
+{
+ ac97_bus_t *bus = device->device_data;
+ return snd_ac97_bus_free(bus);
+}
+
+static int snd_ac97_free(ac97_t *ac97)
+{
+ if (ac97) {
+ snd_ac97_proc_done(ac97);
+ if (ac97->bus) {
+ ac97->bus->codec[ac97->num] = NULL;
+ if (ac97->bus->shared_type) {
+ down(&shared_codec_mutex);
+ shared_codec[ac97->bus->shared_type-1][ac97->num] = NULL;
+ up(&shared_codec_mutex);
+ }
+ }
+ if (ac97->private_free)
+ ac97->private_free(ac97);
+ kfree(ac97);
+ }
+ return 0;
+}
+
+static int snd_ac97_dev_free(snd_device_t *device)
+{
+ ac97_t *ac97 = device->device_data;
+ snd_ac97_powerdown(ac97); /* for avoiding click noises during shut down */
+ return snd_ac97_free(ac97);
+}
+
+static int snd_ac97_try_volume_mix(ac97_t * ac97, int reg)
+{
+ unsigned short val, mask = 0x8000;
+
+ if (! snd_ac97_valid_reg(ac97, reg))
+ return 0;
+
+ switch (reg) {
+ case AC97_MASTER_TONE:
+ return ac97->caps & 0x04 ? 1 : 0;
+ case AC97_HEADPHONE:
+ return ac97->caps & 0x10 ? 1 : 0;
+ case AC97_REC_GAIN_MIC:
+ return ac97->caps & 0x01 ? 1 : 0;
+ case AC97_3D_CONTROL:
+ if (ac97->caps & 0x7c00) {
+ val = snd_ac97_read(ac97, reg);
+ /* if nonzero - fixed and we can't set it */
+ return val == 0;
+ }
+ return 0;
+ case AC97_CENTER_LFE_MASTER: /* center */
+ if ((ac97->ext_id & AC97_EI_CDAC) == 0)
+ return 0;
+ break;
+ case AC97_CENTER_LFE_MASTER+1: /* lfe */
+ if ((ac97->ext_id & AC97_EI_LDAC) == 0)
+ return 0;
+ reg = AC97_CENTER_LFE_MASTER;
+ mask = 0x0080;
+ break;
+ case AC97_SURROUND_MASTER:
+ if ((ac97->ext_id & AC97_EI_SDAC) == 0)
+ return 0;
+ break;
+ }
+
+ if (ac97->limited_regs && test_bit(reg, ac97->reg_accessed))
+ return 1; /* allow without check */
+
+ val = snd_ac97_read(ac97, reg);
+ if (!(val & mask)) {
+ /* nothing seems to be here - mute flag is not set */
+ /* try another test */
+ snd_ac97_write_cache(ac97, reg, val | mask);
+ val = snd_ac97_read(ac97, reg);
+ if (!(val & mask))
+ return 0; /* nothing here */
+ }
+ return 1; /* success, useable */
+}
+
+static void check_volume_resolution(ac97_t *ac97, int reg, unsigned char *lo_max, unsigned char *hi_max)
+{
+ unsigned short cbit[3] = { 0x20, 0x10, 0x01 };
+ unsigned char max[3] = { 63, 31, 15 };
+ int i;
+
+ *lo_max = *hi_max = 0;
+ for (i = 0 ; i < ARRAY_SIZE(cbit); i++) {
+ unsigned short val;
+ snd_ac97_write(ac97, reg, 0x8080 | cbit[i] | (cbit[i] << 8));
+ val = snd_ac97_read(ac97, reg);
+ if (! *lo_max && (val & cbit[i]))
+ *lo_max = max[i];
+ if (! *hi_max && (val & (cbit[i] << 8)))
+ *hi_max = max[i];
+ if (*lo_max && *hi_max)
+ break;
+ }
+}
+
+int snd_ac97_try_bit(ac97_t * ac97, int reg, int bit)
+{
+ unsigned short mask, val, orig, res;
+
+ mask = 1 << bit;
+ orig = snd_ac97_read(ac97, reg);
+ val = orig ^ mask;
+ snd_ac97_write(ac97, reg, val);
+ res = snd_ac97_read(ac97, reg);
+ snd_ac97_write_cache(ac97, reg, orig);
+ return res == val;
+}
+
+/* check the volume resolution of center/lfe */
+static void snd_ac97_change_volume_params2(ac97_t * ac97, int reg, int shift, unsigned char *max)
+{
+ unsigned short val, val1;
+
+ *max = 63;
+ val = 0x8080 | (0x20 << shift);
+ snd_ac97_write(ac97, reg, val);
+ val1 = snd_ac97_read(ac97, reg);
+ if (val != val1) {
+ *max = 31;
+ }
+ /* reset volume to zero */
+ snd_ac97_write_cache(ac97, reg, 0x8080);
+}
+
+static inline int printable(unsigned int x)
+{
+ x &= 0xff;
+ if (x < ' ' || x >= 0x71) {
+ if (x <= 0x89)
+ return x - 0x71 + 'A';
+ return '?';
+ }
+ return x;
+}
+
+snd_kcontrol_t *snd_ac97_cnew(const snd_kcontrol_new_t *_template, ac97_t * ac97)
+{
+ snd_kcontrol_new_t template;
+ memcpy(&template, _template, sizeof(template));
+ snd_runtime_check(!template.index, return NULL);
+ template.index = ac97->num;
+ return snd_ctl_new1(&template, ac97);
+}
+
+/*
+ * create mute switch(es) for normal stereo controls
+ */
+static int snd_ac97_cmute_new_stereo(snd_card_t *card, char *name, int reg, int check_stereo, ac97_t *ac97)
+{
+ snd_kcontrol_t *kctl;
+ int err;
+ unsigned short val, val1, mute_mask;
+
+ if (! snd_ac97_valid_reg(ac97, reg))
+ return 0;
+
+ mute_mask = 0x8000;
+ val = snd_ac97_read(ac97, reg);
+ if (check_stereo || (ac97->flags & AC97_STEREO_MUTES)) {
+ /* check whether both mute bits work */
+ val1 = val | 0x8080;
+ snd_ac97_write(ac97, reg, val1);
+ if (val1 == snd_ac97_read(ac97, reg))
+ mute_mask = 0x8080;
+ }
+ if (mute_mask == 0x8080) {
+ snd_kcontrol_new_t tmp = AC97_DOUBLE(name, reg, 15, 7, 1, 1);
+ tmp.index = ac97->num;
+ kctl = snd_ctl_new1(&tmp, ac97);
+ } else {
+ snd_kcontrol_new_t tmp = AC97_SINGLE(name, reg, 15, 1, 1);
+ tmp.index = ac97->num;
+ kctl = snd_ctl_new1(&tmp, ac97);
+ }
+ err = snd_ctl_add(card, kctl);
+ if (err < 0)
+ return err;
+ /* mute as default */
+ snd_ac97_write_cache(ac97, reg, val | mute_mask);
+ return 0;
+}
+
+/*
+ * create a volume for normal stereo/mono controls
+ */
+static int snd_ac97_cvol_new(snd_card_t *card, char *name, int reg, unsigned int lo_max,
+ unsigned int hi_max, ac97_t *ac97)
+{
+ int err;
+ snd_kcontrol_t *kctl;
+
+ if (! snd_ac97_valid_reg(ac97, reg))
+ return 0;
+ if (hi_max) {
+ /* invert */
+ snd_kcontrol_new_t tmp = AC97_DOUBLE(name, reg, 8, 0, lo_max, 1);
+ tmp.index = ac97->num;
+ kctl = snd_ctl_new1(&tmp, ac97);
+ } else {
+ /* invert */
+ snd_kcontrol_new_t tmp = AC97_SINGLE(name, reg, 0, lo_max, 1);
+ tmp.index = ac97->num;
+ kctl = snd_ctl_new1(&tmp, ac97);
+ }
+ err = snd_ctl_add(card, kctl);
+ if (err < 0)
+ return err;
+ snd_ac97_write_cache(ac97, reg,
+ (snd_ac97_read(ac97, reg) & 0x8080) |
+ lo_max | (hi_max << 8));
+ return 0;
+}
+
+/*
+ * create a mute-switch and a volume for normal stereo/mono controls
+ */
+static int snd_ac97_cmix_new_stereo(snd_card_t *card, const char *pfx, int reg, int check_stereo, ac97_t *ac97)
+{
+ int err;
+ char name[44];
+ unsigned char lo_max, hi_max;
+
+ if (! snd_ac97_valid_reg(ac97, reg))
+ return 0;
+
+ if (snd_ac97_try_bit(ac97, reg, 15)) {
+ sprintf(name, "%s Switch", pfx);
+ if ((err = snd_ac97_cmute_new_stereo(card, name, reg, check_stereo, ac97)) < 0)
+ return err;
+ }
+ check_volume_resolution(ac97, reg, &lo_max, &hi_max);
+ if (lo_max) {
+ sprintf(name, "%s Volume", pfx);
+ if ((err = snd_ac97_cvol_new(card, name, reg, lo_max, hi_max, ac97)) < 0)
+ return err;
+ }
+ return 0;
+}
+
+#define snd_ac97_cmix_new(card, pfx, reg, ac97) snd_ac97_cmix_new_stereo(card, pfx, reg, 0, ac97)
+#define snd_ac97_cmute_new(card, name, reg, ac97) snd_ac97_cmute_new_stereo(card, name, reg, 0, ac97)
+
+static unsigned int snd_ac97_determine_spdif_rates(ac97_t *ac97);
+
+static int snd_ac97_mixer_build(ac97_t * ac97)
+{
+ snd_card_t *card = ac97->bus->card;
+ snd_kcontrol_t *kctl;
+ int err;
+ unsigned int idx;
+ unsigned char max;
+
+ /* build master controls */
+ /* AD claims to remove this control from AD1887, although spec v2.2 does not allow this */
+ if (snd_ac97_try_volume_mix(ac97, AC97_MASTER)) {
+ if (ac97->flags & AC97_HAS_NO_MASTER_VOL)
+ err = snd_ac97_cmute_new(card, "Master Playback Switch", AC97_MASTER, ac97);
+ else
+ err = snd_ac97_cmix_new(card, "Master Playback", AC97_MASTER, ac97);
+ if (err < 0)
+ return err;
+ }
+
+ ac97->regs[AC97_CENTER_LFE_MASTER] = 0x8080;
+
+ /* build center controls */
+ if (snd_ac97_try_volume_mix(ac97, AC97_CENTER_LFE_MASTER)) {
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_center[0], ac97))) < 0)
+ return err;
+ if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_center[1], ac97))) < 0)
+ return err;
+ snd_ac97_change_volume_params2(ac97, AC97_CENTER_LFE_MASTER, 0, &max);
+ kctl->private_value &= ~(0xff << 16);
+ kctl->private_value |= (int)max << 16;
+ snd_ac97_write_cache(ac97, AC97_CENTER_LFE_MASTER, ac97->regs[AC97_CENTER_LFE_MASTER] | max);
+ }
+
+ /* build LFE controls */
+ if (snd_ac97_try_volume_mix(ac97, AC97_CENTER_LFE_MASTER+1)) {
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_lfe[0], ac97))) < 0)
+ return err;
+ if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_lfe[1], ac97))) < 0)
+ return err;
+ snd_ac97_change_volume_params2(ac97, AC97_CENTER_LFE_MASTER, 8, &max);
+ kctl->private_value &= ~(0xff << 16);
+ kctl->private_value |= (int)max << 16;
+ snd_ac97_write_cache(ac97, AC97_CENTER_LFE_MASTER, ac97->regs[AC97_CENTER_LFE_MASTER] | max << 8);
+ }
+
+ /* build surround controls */
+ if (snd_ac97_try_volume_mix(ac97, AC97_SURROUND_MASTER)) {
+ /* Surround Master (0x38) is with stereo mutes */
+ if ((err = snd_ac97_cmix_new_stereo(card, "Surround Playback", AC97_SURROUND_MASTER, 1, ac97)) < 0)
+ return err;
+ }
+
+ /* build headphone controls */
+ if (snd_ac97_try_volume_mix(ac97, AC97_HEADPHONE)) {
+ if ((err = snd_ac97_cmix_new(card, "Headphone Playback", AC97_HEADPHONE, ac97)) < 0)
+ return err;
+ }
+
+ /* build master mono controls */
+ if (snd_ac97_try_volume_mix(ac97, AC97_MASTER_MONO)) {
+ if ((err = snd_ac97_cmix_new(card, "Master Mono Playback", AC97_MASTER_MONO, ac97)) < 0)
+ return err;
+ }
+
+ /* build master tone controls */
+ if (snd_ac97_try_volume_mix(ac97, AC97_MASTER_TONE)) {
+ for (idx = 0; idx < 2; idx++) {
+ if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_tone[idx], ac97))) < 0)
+ return err;
+ if (ac97->id == AC97_ID_YMF753) {
+ kctl->private_value &= ~(0xff << 16);
+ kctl->private_value |= 7 << 16;
+ }
+ }
+ snd_ac97_write_cache(ac97, AC97_MASTER_TONE, 0x0f0f);
+ }
+
+ /* build PC Speaker controls */
+ if (!(ac97->flags & AC97_HAS_NO_PC_BEEP) &&
+ ((ac97->flags & AC97_HAS_PC_BEEP) ||
+ snd_ac97_try_volume_mix(ac97, AC97_PC_BEEP))) {
+ for (idx = 0; idx < 2; idx++)
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_pc_beep[idx], ac97))) < 0)
+ return err;
+ snd_ac97_write_cache(ac97, AC97_PC_BEEP,
+ snd_ac97_read(ac97, AC97_PC_BEEP) | 0x801e);
+ }
+
+ /* build Phone controls */
+ if (!(ac97->flags & AC97_HAS_NO_PHONE)) {
+ if (snd_ac97_try_volume_mix(ac97, AC97_PHONE)) {
+ if ((err = snd_ac97_cmix_new(card, "Phone Playback", AC97_PHONE, ac97)) < 0)
+ return err;
+ }
+ }
+
+ /* build MIC controls */
+ if (snd_ac97_try_volume_mix(ac97, AC97_MIC)) {
+ if ((err = snd_ac97_cmix_new(card, "Mic Playback", AC97_MIC, ac97)) < 0)
+ return err;
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_mic_boost, ac97))) < 0)
+ return err;
+ }
+
+ /* build Line controls */
+ if (snd_ac97_try_volume_mix(ac97, AC97_LINE)) {
+ if ((err = snd_ac97_cmix_new(card, "Line Playback", AC97_LINE, ac97)) < 0)
+ return err;
+ }
+
+ /* build CD controls */
+ if (!(ac97->flags & AC97_HAS_NO_CD)) {
+ if (snd_ac97_try_volume_mix(ac97, AC97_CD)) {
+ if ((err = snd_ac97_cmix_new(card, "CD Playback", AC97_CD, ac97)) < 0)
+ return err;
+ }
+ }
+
+ /* build Video controls */
+ if (!(ac97->flags & AC97_HAS_NO_VIDEO)) {
+ if (snd_ac97_try_volume_mix(ac97, AC97_VIDEO)) {
+ if ((err = snd_ac97_cmix_new(card, "Video Playback", AC97_VIDEO, ac97)) < 0)
+ return err;
+ }
+ }
+
+ /* build Aux controls */
+ if (snd_ac97_try_volume_mix(ac97, AC97_AUX)) {
+ if ((err = snd_ac97_cmix_new(card, "Aux Playback", AC97_AUX, ac97)) < 0)
+ return err;
+ }
+
+ /* build PCM controls */
+ if (ac97->flags & AC97_AD_MULTI) {
+ unsigned short init_val;
+ if (ac97->flags & AC97_STEREO_MUTES)
+ init_val = 0x9f9f;
+ else
+ init_val = 0x9f1f;
+ for (idx = 0; idx < 2; idx++)
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_ad18xx_pcm[idx], ac97))) < 0)
+ return err;
+ ac97->spec.ad18xx.pcmreg[0] = init_val;
+ if (ac97->scaps & AC97_SCAP_SURROUND_DAC) {
+ for (idx = 0; idx < 2; idx++)
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_ad18xx_surround[idx], ac97))) < 0)
+ return err;
+ ac97->spec.ad18xx.pcmreg[1] = init_val;
+ }
+ if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC) {
+ for (idx = 0; idx < 2; idx++)
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_ad18xx_center[idx], ac97))) < 0)
+ return err;
+ for (idx = 0; idx < 2; idx++)
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_ad18xx_lfe[idx], ac97))) < 0)
+ return err;
+ ac97->spec.ad18xx.pcmreg[2] = init_val;
+ }
+ snd_ac97_write_cache(ac97, AC97_PCM, init_val);
+ } else {
+ if (ac97->flags & AC97_HAS_NO_PCM_VOL)
+ err = snd_ac97_cmute_new(card, "PCM Playback Switch", AC97_PCM, ac97);
+ else
+ err = snd_ac97_cmix_new(card, "PCM Playback", AC97_PCM, ac97);
+ if (err < 0)
+ return err;
+ }
+
+ /* build Capture controls */
+ if (!(ac97->flags & AC97_HAS_NO_REC_GAIN)) {
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_control_capture_src, ac97))) < 0)
+ return err;
+ if (snd_ac97_try_bit(ac97, AC97_REC_GAIN, 15)) {
+ if ((err = snd_ac97_cmute_new(card, "Capture Switch", AC97_REC_GAIN, ac97)) < 0)
+ return err;
+ }
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_control_capture_vol, ac97))) < 0)
+ return err;
+ snd_ac97_write_cache(ac97, AC97_REC_SEL, 0x0000);
+ snd_ac97_write_cache(ac97, AC97_REC_GAIN, 0x0000);
+ }
+ /* build MIC Capture controls */
+ if (snd_ac97_try_volume_mix(ac97, AC97_REC_GAIN_MIC)) {
+ for (idx = 0; idx < 2; idx++)
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_mic_capture[idx], ac97))) < 0)
+ return err;
+ snd_ac97_write_cache(ac97, AC97_REC_GAIN_MIC, 0x0000);
+ }
+
+ /* build PCM out path & mute control */
+ if (snd_ac97_try_bit(ac97, AC97_GENERAL_PURPOSE, 15)) {
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_PCM_OUT], ac97))) < 0)
+ return err;
+ }
+
+ /* build Simulated Stereo Enhancement control */
+ if (ac97->caps & 0x0008) {
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_STEREO_ENHANCEMENT], ac97))) < 0)
+ return err;
+ }
+
+ /* build 3D Stereo Enhancement control */
+ if (snd_ac97_try_bit(ac97, AC97_GENERAL_PURPOSE, 13)) {
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_3D], ac97))) < 0)
+ return err;
+ }
+
+ /* build Loudness control */
+ if (ac97->caps & 0x0020) {
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_LOUDNESS], ac97))) < 0)
+ return err;
+ }
+
+ /* build Mono output select control */
+ if (snd_ac97_try_bit(ac97, AC97_GENERAL_PURPOSE, 9)) {
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_MONO], ac97))) < 0)
+ return err;
+ }
+
+ /* build Mic select control */
+ if (snd_ac97_try_bit(ac97, AC97_GENERAL_PURPOSE, 8)) {
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_MIC], ac97))) < 0)
+ return err;
+ }
+
+ /* build ADC/DAC loopback control */
+ if (enable_loopback && snd_ac97_try_bit(ac97, AC97_GENERAL_PURPOSE, 7)) {
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_general[AC97_GENERAL_LOOPBACK], ac97))) < 0)
+ return err;
+ }
+
+ snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, ~AC97_GP_DRSS_MASK, 0x0000);
+
+ /* build 3D controls */
+ if (ac97->build_ops->build_3d) {
+ ac97->build_ops->build_3d(ac97);
+ } else {
+ if (snd_ac97_try_volume_mix(ac97, AC97_3D_CONTROL)) {
+ unsigned short val;
+ val = 0x0707;
+ snd_ac97_write(ac97, AC97_3D_CONTROL, val);
+ val = snd_ac97_read(ac97, AC97_3D_CONTROL);
+ val = val == 0x0606;
+ if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
+ return err;
+ if (val)
+ kctl->private_value = AC97_3D_CONTROL | (9 << 8) | (7 << 16);
+ if ((err = snd_ctl_add(card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[1], ac97))) < 0)
+ return err;
+ if (val)
+ kctl->private_value = AC97_3D_CONTROL | (1 << 8) | (7 << 16);
+ snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
+ }
+ }
+
+ /* build S/PDIF controls */
+ if ((ac97->ext_id & AC97_EI_SPDIF) && !(ac97->scaps & AC97_SCAP_NO_SPDIF)) {
+ if (ac97->build_ops->build_spdif) {
+ if ((err = ac97->build_ops->build_spdif(ac97)) < 0)
+ return err;
+ } else {
+ for (idx = 0; idx < 5; idx++)
+ if ((err = snd_ctl_add(card, snd_ac97_cnew(&snd_ac97_controls_spdif[idx], ac97))) < 0)
+ return err;
+ if (ac97->build_ops->build_post_spdif) {
+ if ((err = ac97->build_ops->build_post_spdif(ac97)) < 0)
+ return err;
+ }
+ /* set default PCM S/PDIF params */
+ /* consumer,PCM audio,no copyright,no preemphasis,PCM coder,original,48000Hz */
+ snd_ac97_write_cache(ac97, AC97_SPDIF, 0x2a20);
+ ac97->rates[AC97_RATES_SPDIF] = snd_ac97_determine_spdif_rates(ac97);
+ }
+ ac97->spdif_status = SNDRV_PCM_DEFAULT_CON_SPDIF;
+ }
+
+ /* build chip specific controls */
+ if (ac97->build_ops->build_specific)
+ if ((err = ac97->build_ops->build_specific(ac97)) < 0)
+ return err;
+
+ if (snd_ac97_try_bit(ac97, AC97_POWERDOWN, 15)) {
+ kctl = snd_ac97_cnew(&snd_ac97_control_eapd, ac97);
+ if (! kctl)
+ return -ENOMEM;
+ if (ac97->scaps & AC97_SCAP_INV_EAPD)
+ set_inv_eapd(ac97, kctl);
+ if ((err = snd_ctl_add(card, kctl)) < 0)
+ return err;
+ }
+
+ return 0;
+}
+
+static int snd_ac97_modem_build(snd_card_t * card, ac97_t * ac97)
+{
+ /* TODO */
+ //printk("AC97_GPIO_CFG = %x\n",snd_ac97_read(ac97,AC97_GPIO_CFG));
+ snd_ac97_write(ac97, AC97_GPIO_CFG, 0xffff & ~(AC97_GPIO_LINE1_OH));
+ snd_ac97_write(ac97, AC97_GPIO_POLARITY, 0xffff & ~(AC97_GPIO_LINE1_OH));
+ snd_ac97_write(ac97, AC97_GPIO_STICKY, 0xffff);
+ snd_ac97_write(ac97, AC97_GPIO_WAKEUP, 0x0);
+ snd_ac97_write(ac97, AC97_MISC_AFE, 0x0);
+ return 0;
+}
+
+static int snd_ac97_test_rate(ac97_t *ac97, int reg, int shadow_reg, int rate)
+{
+ unsigned short val;
+ unsigned int tmp;
+
+ tmp = ((unsigned int)rate * ac97->bus->clock) / 48000;
+ snd_ac97_write_cache(ac97, reg, tmp & 0xffff);
+ if (shadow_reg)
+ snd_ac97_write_cache(ac97, shadow_reg, tmp & 0xffff);
+ val = snd_ac97_read(ac97, reg);
+ return val == (tmp & 0xffff);
+}
+
+static void snd_ac97_determine_rates(ac97_t *ac97, int reg, int shadow_reg, unsigned int *r_result)
+{
+ unsigned int result = 0;
+ unsigned short saved;
+
+ if (ac97->bus->no_vra) {
+ *r_result = SNDRV_PCM_RATE_48000;
+ if ((ac97->flags & AC97_DOUBLE_RATE) &&
+ reg == AC97_PCM_FRONT_DAC_RATE)
+ *r_result |= SNDRV_PCM_RATE_96000;
+ return;
+ }
+
+ saved = snd_ac97_read(ac97, reg);
+ if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE)
+ snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
+ AC97_EA_DRA, 0);
+ /* test a non-standard rate */
+ if (snd_ac97_test_rate(ac97, reg, shadow_reg, 11000))
+ result |= SNDRV_PCM_RATE_CONTINUOUS;
+ /* let's try to obtain standard rates */
+ if (snd_ac97_test_rate(ac97, reg, shadow_reg, 8000))
+ result |= SNDRV_PCM_RATE_8000;
+ if (snd_ac97_test_rate(ac97, reg, shadow_reg, 11025))
+ result |= SNDRV_PCM_RATE_11025;
+ if (snd_ac97_test_rate(ac97, reg, shadow_reg, 16000))
+ result |= SNDRV_PCM_RATE_16000;
+ if (snd_ac97_test_rate(ac97, reg, shadow_reg, 22050))
+ result |= SNDRV_PCM_RATE_22050;
+ if (snd_ac97_test_rate(ac97, reg, shadow_reg, 32000))
+ result |= SNDRV_PCM_RATE_32000;
+ if (snd_ac97_test_rate(ac97, reg, shadow_reg, 44100))
+ result |= SNDRV_PCM_RATE_44100;
+ if (snd_ac97_test_rate(ac97, reg, shadow_reg, 48000))
+ result |= SNDRV_PCM_RATE_48000;
+ if ((ac97->flags & AC97_DOUBLE_RATE) &&
+ reg == AC97_PCM_FRONT_DAC_RATE) {
+ /* test standard double rates */
+ snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
+ AC97_EA_DRA, AC97_EA_DRA);
+ if (snd_ac97_test_rate(ac97, reg, shadow_reg, 64000 / 2))
+ result |= SNDRV_PCM_RATE_64000;
+ if (snd_ac97_test_rate(ac97, reg, shadow_reg, 88200 / 2))
+ result |= SNDRV_PCM_RATE_88200;
+ if (snd_ac97_test_rate(ac97, reg, shadow_reg, 96000 / 2))
+ result |= SNDRV_PCM_RATE_96000;
+ /* some codecs don't support variable double rates */
+ if (!snd_ac97_test_rate(ac97, reg, shadow_reg, 76100 / 2))
+ result &= ~SNDRV_PCM_RATE_CONTINUOUS;
+ snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
+ AC97_EA_DRA, 0);
+ }
+ /* restore the default value */
+ snd_ac97_write_cache(ac97, reg, saved);
+ if (shadow_reg)
+ snd_ac97_write_cache(ac97, shadow_reg, saved);
+ *r_result = result;
+}
+
+/* check AC97_SPDIF register to accept which sample rates */
+static unsigned int snd_ac97_determine_spdif_rates(ac97_t *ac97)
+{
+ unsigned int result = 0;
+ int i;
+ static unsigned short ctl_bits[] = {
+ AC97_SC_SPSR_44K, AC97_SC_SPSR_32K, AC97_SC_SPSR_48K
+ };
+ static unsigned int rate_bits[] = {
+ SNDRV_PCM_RATE_44100, SNDRV_PCM_RATE_32000, SNDRV_PCM_RATE_48000
+ };
+
+ for (i = 0; i < (int)ARRAY_SIZE(ctl_bits); i++) {
+ snd_ac97_update_bits(ac97, AC97_SPDIF, AC97_SC_SPSR_MASK, ctl_bits[i]);
+ if ((snd_ac97_read(ac97, AC97_SPDIF) & AC97_SC_SPSR_MASK) == ctl_bits[i])
+ result |= rate_bits[i];
+ }
+ return result;
+}
+
+/* look for the codec id table matching with the given id */
+static const ac97_codec_id_t *look_for_codec_id(const ac97_codec_id_t *table,
+ unsigned int id)
+{
+ const ac97_codec_id_t *pid;
+
+ for (pid = table; pid->id; pid++)
+ if (pid->id == (id & pid->mask))
+ return pid;
+ return NULL;
+}
+
+void snd_ac97_get_name(ac97_t *ac97, unsigned int id, char *name, int modem)
+{
+ const ac97_codec_id_t *pid;
+
+ sprintf(name, "0x%x %c%c%c", id,
+ printable(id >> 24),
+ printable(id >> 16),
+ printable(id >> 8));
+ pid = look_for_codec_id(snd_ac97_codec_id_vendors, id);
+ if (! pid)
+ return;
+
+ strcpy(name, pid->name);
+ if (ac97 && pid->patch) {
+ if ((modem && (pid->flags & AC97_MODEM_PATCH)) ||
+ (! modem && ! (pid->flags & AC97_MODEM_PATCH)))
+ pid->patch(ac97);
+ }
+
+ pid = look_for_codec_id(snd_ac97_codec_ids, id);
+ if (pid) {
+ strcat(name, " ");
+ strcat(name, pid->name);
+ if (pid->mask != 0xffffffff)
+ sprintf(name + strlen(name), " rev %d", id & ~pid->mask);
+ if (ac97 && pid->patch) {
+ if ((modem && (pid->flags & AC97_MODEM_PATCH)) ||
+ (! modem && ! (pid->flags & AC97_MODEM_PATCH)))
+ pid->patch(ac97);
+ }
+ } else
+ sprintf(name + strlen(name), " id %x", id & 0xff);
+}
+
+/**
+ * snd_ac97_get_short_name - retrieve codec name
+ * @ac97: the codec instance
+ *
+ * Returns the short identifying name of the codec.
+ */
+const char *snd_ac97_get_short_name(ac97_t *ac97)
+{
+ const ac97_codec_id_t *pid;
+
+ for (pid = snd_ac97_codec_ids; pid->id; pid++)
+ if (pid->id == (ac97->id & pid->mask))
+ return pid->name;
+ return "unknown codec";
+}
+
+
+/* wait for a while until registers are accessible after RESET
+ * return 0 if ok, negative not ready
+ */
+static int ac97_reset_wait(ac97_t *ac97, int timeout, int with_modem)
+{
+ unsigned long end_time;
+ unsigned short val;
+
+ end_time = jiffies + timeout;
+ do {
+
+ /* use preliminary reads to settle the communication */
+ snd_ac97_read(ac97, AC97_RESET);
+ snd_ac97_read(ac97, AC97_VENDOR_ID1);
+ snd_ac97_read(ac97, AC97_VENDOR_ID2);
+ /* modem? */
+ if (with_modem) {
+ val = snd_ac97_read(ac97, AC97_EXTENDED_MID);
+ if (val != 0xffff && (val & 1) != 0)
+ return 0;
+ }
+ if (ac97->scaps & AC97_SCAP_DETECT_BY_VENDOR) {
+ /* probably only Xbox issue - all registers are read as zero */
+ val = snd_ac97_read(ac97, AC97_VENDOR_ID1);
+ if (val != 0 && val != 0xffff)
+ return 0;
+ } else {
+ /* because the PCM or MASTER volume registers can be modified,
+ * the REC_GAIN register is used for tests
+ */
+ /* test if we can write to the record gain volume register */
+ snd_ac97_write_cache(ac97, AC97_REC_GAIN, 0x8a05);
+ if ((snd_ac97_read(ac97, AC97_REC_GAIN) & 0x7fff) == 0x0a05)
+ return 0;
+ }
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(1);
+ } while (time_after_eq(end_time, jiffies));
+ return -ENODEV;
+}
+
+/**
+ * snd_ac97_bus - create an AC97 bus component
+ * @card: the card instance
+ * @num: the bus number
+ * @ops: the bus callbacks table
+ * @private_data: private data pointer for the new instance
+ * @rbus: the pointer to store the new AC97 bus instance.
+ *
+ * Creates an AC97 bus component. An ac97_bus_t instance is newly
+ * allocated and initialized.
+ *
+ * The ops table must include valid callbacks (at least read and
+ * write). The other callbacks, wait and reset, are not mandatory.
+ *
+ * The clock is set to 48000. If another clock is needed, set
+ * (*rbus)->clock manually.
+ *
+ * The AC97 bus instance is registered as a low-level device, so you don't
+ * have to release it manually.
+ *
+ * Returns zero if successful, or a negative error code on failure.
+ */
+int snd_ac97_bus(snd_card_t *card, int num, ac97_bus_ops_t *ops,
+ void *private_data, ac97_bus_t **rbus)
+{
+ int err;
+ ac97_bus_t *bus;
+ static snd_device_ops_t dev_ops = {
+ .dev_free = snd_ac97_bus_dev_free,
+ };
+
+ snd_assert(card != NULL, return -EINVAL);
+ snd_assert(rbus != NULL, return -EINVAL);
+ bus = kcalloc(1, sizeof(*bus), GFP_KERNEL);
+ if (bus == NULL)
+ return -ENOMEM;
+ bus->card = card;
+ bus->num = num;
+ bus->ops = ops;
+ bus->private_data = private_data;
+ bus->clock = 48000;
+ spin_lock_init(&bus->bus_lock);
+ snd_ac97_bus_proc_init(bus);
+ if ((err = snd_device_new(card, SNDRV_DEV_BUS, bus, &dev_ops)) < 0) {
+ snd_ac97_bus_free(bus);
+ return err;
+ }
+ *rbus = bus;
+ return 0;
+}
+
+/* build_ops to do nothing */
+static struct snd_ac97_build_ops null_build_ops;
+
+/**
+ * snd_ac97_mixer - create an Codec97 component
+ * @bus: the AC97 bus which codec is attached to
+ * @template: the template of ac97, including index, callbacks and
+ * the private data.
+ * @rac97: the pointer to store the new ac97 instance.
+ *
+ * Creates an Codec97 component. An ac97_t instance is newly
+ * allocated and initialized from the template. The codec
+ * is then initialized by the standard procedure.
+ *
+ * The template must include the codec number (num) and address (addr),
+ * and the private data (private_data).
+ *
+ * The ac97 instance is registered as a low-level device, so you don't
+ * have to release it manually.
+ *
+ * Returns zero if successful, or a negative error code on failure.
+ */
+int snd_ac97_mixer(ac97_bus_t *bus, ac97_template_t *template, ac97_t **rac97)
+{
+ int err;
+ ac97_t *ac97;
+ snd_card_t *card;
+ char name[64];
+ unsigned long end_time;
+ unsigned int reg;
+ const ac97_codec_id_t *pid;
+ static snd_device_ops_t ops = {
+ .dev_free = snd_ac97_dev_free,
+ };
+
+ snd_assert(rac97 != NULL, return -EINVAL);
+ *rac97 = NULL;
+ snd_assert(bus != NULL && template != NULL, return -EINVAL);
+ snd_assert(template->num < 4 && bus->codec[template->num] == NULL, return -EINVAL);
+
+ snd_assert(bus->shared_type <= AC97_SHARED_TYPES, return -EINVAL);
+ if (bus->shared_type) {
+ /* already shared? */
+ down(&shared_codec_mutex);
+ ac97 = shared_codec[bus->shared_type-1][template->num];
+ if (ac97) {
+ if ((ac97_is_audio(ac97) && (template->scaps & AC97_SCAP_SKIP_AUDIO)) ||
+ (ac97_is_modem(ac97) && (template->scaps & AC97_SCAP_SKIP_MODEM))) {
+ up(&shared_codec_mutex);
+ return -EACCES; /* skip this */
+ }
+ }
+ up(&shared_codec_mutex);
+ }
+
+ card = bus->card;
+ ac97 = kcalloc(1, sizeof(*ac97), GFP_KERNEL);
+ if (ac97 == NULL)
+ return -ENOMEM;
+ ac97->private_data = template->private_data;
+ ac97->private_free = template->private_free;
+ ac97->bus = bus;
+ ac97->pci = template->pci;
+ ac97->num = template->num;
+ ac97->addr = template->addr;
+ ac97->scaps = template->scaps;
+ ac97->limited_regs = template->limited_regs;
+ memcpy(ac97->reg_accessed, template->reg_accessed, sizeof(ac97->reg_accessed));
+ bus->codec[ac97->num] = ac97;
+ init_MUTEX(&ac97->reg_mutex);
+ init_MUTEX(&ac97->page_mutex);
+
+ if (ac97->pci) {
+ pci_read_config_word(ac97->pci, PCI_SUBSYSTEM_VENDOR_ID, &ac97->subsystem_vendor);
+ pci_read_config_word(ac97->pci, PCI_SUBSYSTEM_ID, &ac97->subsystem_device);
+ }
+ if (bus->ops->reset) {
+ bus->ops->reset(ac97);
+ goto __access_ok;
+ }
+
+ ac97->id = snd_ac97_read(ac97, AC97_VENDOR_ID1) << 16;
+ ac97->id |= snd_ac97_read(ac97, AC97_VENDOR_ID2);
+ if (ac97->id && ac97->id != (unsigned int)-1) {
+ pid = look_for_codec_id(snd_ac97_codec_ids, ac97->id);
+ if (pid && (pid->flags & AC97_DEFAULT_POWER_OFF))
+ goto __access_ok;
+ }
+
+ snd_ac97_write(ac97, AC97_RESET, 0); /* reset to defaults */
+ if (bus->ops->wait)
+ bus->ops->wait(ac97);
+ else {
+ udelay(50);
+ if (ac97->scaps & AC97_SCAP_SKIP_AUDIO)
+ err = ac97_reset_wait(ac97, HZ/2, 1);
+ else {
+ err = ac97_reset_wait(ac97, HZ/2, 0);
+ if (err < 0)
+ err = ac97_reset_wait(ac97, HZ/2, 1);
+ }
+ if (err < 0) {
+ snd_printk(KERN_WARNING "AC'97 %d does not respond - RESET\n", ac97->num);
+ /* proceed anyway - it's often non-critical */
+ }
+ }
+ __access_ok:
+ ac97->id = snd_ac97_read(ac97, AC97_VENDOR_ID1) << 16;
+ ac97->id |= snd_ac97_read(ac97, AC97_VENDOR_ID2);
+ if (! (ac97->scaps & AC97_SCAP_DETECT_BY_VENDOR) &&
+ (ac97->id == 0x00000000 || ac97->id == 0xffffffff)) {
+ snd_printk(KERN_ERR "AC'97 %d access is not valid [0x%x], removing mixer.\n", ac97->num, ac97->id);
+ snd_ac97_free(ac97);
+ return -EIO;
+ }
+ pid = look_for_codec_id(snd_ac97_codec_ids, ac97->id);
+ if (pid)
+ ac97->flags |= pid->flags;
+
+ /* test for AC'97 */
+ if (!(ac97->scaps & AC97_SCAP_SKIP_AUDIO) && !(ac97->scaps & AC97_SCAP_AUDIO)) {
+ /* test if we can write to the record gain volume register */
+ snd_ac97_write_cache(ac97, AC97_REC_GAIN, 0x8a06);
+ if (((err = snd_ac97_read(ac97, AC97_REC_GAIN)) & 0x7fff) == 0x0a06)
+ ac97->scaps |= AC97_SCAP_AUDIO;
+ }
+ if (ac97->scaps & AC97_SCAP_AUDIO) {
+ ac97->caps = snd_ac97_read(ac97, AC97_RESET);
+ ac97->ext_id = snd_ac97_read(ac97, AC97_EXTENDED_ID);
+ if (ac97->ext_id == 0xffff) /* invalid combination */
+ ac97->ext_id = 0;
+ }
+
+ /* test for MC'97 */
+ if (!(ac97->scaps & AC97_SCAP_SKIP_MODEM) && !(ac97->scaps & AC97_SCAP_MODEM)) {
+ ac97->ext_mid = snd_ac97_read(ac97, AC97_EXTENDED_MID);
+ if (ac97->ext_mid == 0xffff) /* invalid combination */
+ ac97->ext_mid = 0;
+ if (ac97->ext_mid & 1)
+ ac97->scaps |= AC97_SCAP_MODEM;
+ }
+
+ if (!ac97_is_audio(ac97) && !ac97_is_modem(ac97)) {
+ if (!(ac97->scaps & (AC97_SCAP_SKIP_AUDIO|AC97_SCAP_SKIP_MODEM)))
+ snd_printk(KERN_ERR "AC'97 %d access error (not audio or modem codec)\n", ac97->num);
+ snd_ac97_free(ac97);
+ return -EACCES;
+ }
+
+ if (bus->ops->reset) // FIXME: always skipping?
+ goto __ready_ok;
+
+ /* FIXME: add powerdown control */
+ if (ac97_is_audio(ac97)) {
+ /* nothing should be in powerdown mode */
+ snd_ac97_write_cache(ac97, AC97_POWERDOWN, 0);
+ if (! (ac97->flags & AC97_DEFAULT_POWER_OFF)) {
+ snd_ac97_write_cache(ac97, AC97_RESET, 0); /* reset to defaults */
+ udelay(100);
+ snd_ac97_write_cache(ac97, AC97_POWERDOWN, 0);
+ }
+ /* nothing should be in powerdown mode */
+ snd_ac97_write_cache(ac97, AC97_GENERAL_PURPOSE, 0);
+ end_time = jiffies + (HZ / 10);
+ do {
+ if ((snd_ac97_read(ac97, AC97_POWERDOWN) & 0x0f) == 0x0f)
+ goto __ready_ok;
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(1);
+ } while (time_after_eq(end_time, jiffies));
+ snd_printk(KERN_WARNING "AC'97 %d analog subsections not ready\n", ac97->num);
+ }
+
+ /* FIXME: add powerdown control */
+ if (ac97_is_modem(ac97)) {
+ unsigned char tmp;
+
+ /* nothing should be in powerdown mode */
+ /* note: it's important to set the rate at first */
+ tmp = AC97_MEA_GPIO;
+ if (ac97->ext_mid & AC97_MEI_LINE1) {
+ snd_ac97_write_cache(ac97, AC97_LINE1_RATE, 12000);
+ tmp |= AC97_MEA_ADC1 | AC97_MEA_DAC1;
+ }
+ if (ac97->ext_mid & AC97_MEI_LINE2) {
+ snd_ac97_write_cache(ac97, AC97_LINE2_RATE, 12000);
+ tmp |= AC97_MEA_ADC2 | AC97_MEA_DAC2;
+ }
+ if (ac97->ext_mid & AC97_MEI_HANDSET) {
+ snd_ac97_write_cache(ac97, AC97_HANDSET_RATE, 12000);
+ tmp |= AC97_MEA_HADC | AC97_MEA_HDAC;
+ }
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_MSTATUS, 0xff00 & ~(tmp << 8));
+ udelay(100);
+ /* nothing should be in powerdown mode */
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_MSTATUS, 0xff00 & ~(tmp << 8));
+ end_time = jiffies + (HZ / 10);
+ do {
+ if ((snd_ac97_read(ac97, AC97_EXTENDED_MSTATUS) & tmp) == tmp)
+ goto __ready_ok;
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(1);
+ } while (time_after_eq(end_time, jiffies));
+ snd_printk(KERN_WARNING "MC'97 %d converters and GPIO not ready (0x%x)\n", ac97->num, snd_ac97_read(ac97, AC97_EXTENDED_MSTATUS));
+ }
+
+ __ready_ok:
+ if (ac97_is_audio(ac97))
+ ac97->addr = (ac97->ext_id & AC97_EI_ADDR_MASK) >> AC97_EI_ADDR_SHIFT;
+ else
+ ac97->addr = (ac97->ext_mid & AC97_MEI_ADDR_MASK) >> AC97_MEI_ADDR_SHIFT;
+ if (ac97->ext_id & 0x01c9) { /* L/R, MIC, SDAC, LDAC VRA support */
+ reg = snd_ac97_read(ac97, AC97_EXTENDED_STATUS);
+ reg |= ac97->ext_id & 0x01c0; /* LDAC/SDAC/CDAC */
+ if (! bus->no_vra)
+ reg |= ac97->ext_id & 0x0009; /* VRA/VRM */
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_STATUS, reg);
+ }
+ if ((ac97->ext_id & AC97_EI_DRA) && bus->dra) {
+ /* Intel controllers require double rate data to be put in
+ * slots 7+8, so let's hope the codec supports it. */
+ snd_ac97_update_bits(ac97, AC97_GENERAL_PURPOSE, AC97_GP_DRSS_MASK, AC97_GP_DRSS_78);
+ if ((snd_ac97_read(ac97, AC97_GENERAL_PURPOSE) & AC97_GP_DRSS_MASK) == AC97_GP_DRSS_78)
+ ac97->flags |= AC97_DOUBLE_RATE;
+ }
+ if (ac97->ext_id & AC97_EI_VRA) { /* VRA support */
+ snd_ac97_determine_rates(ac97, AC97_PCM_FRONT_DAC_RATE, 0, &ac97->rates[AC97_RATES_FRONT_DAC]);
+ snd_ac97_determine_rates(ac97, AC97_PCM_LR_ADC_RATE, 0, &ac97->rates[AC97_RATES_ADC]);
+ } else {
+ ac97->rates[AC97_RATES_FRONT_DAC] = SNDRV_PCM_RATE_48000;
+ if (ac97->flags & AC97_DOUBLE_RATE)
+ ac97->rates[AC97_RATES_FRONT_DAC] |= SNDRV_PCM_RATE_96000;
+ ac97->rates[AC97_RATES_ADC] = SNDRV_PCM_RATE_48000;
+ }
+ if (ac97->ext_id & AC97_EI_SPDIF) {
+ /* codec specific code (patch) should override these values */
+ ac97->rates[AC97_RATES_SPDIF] = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_32000;
+ }
+ if (ac97->ext_id & AC97_EI_VRM) { /* MIC VRA support */
+ snd_ac97_determine_rates(ac97, AC97_PCM_MIC_ADC_RATE, 0, &ac97->rates[AC97_RATES_MIC_ADC]);
+ } else {
+ ac97->rates[AC97_RATES_MIC_ADC] = SNDRV_PCM_RATE_48000;
+ }
+ if (ac97->ext_id & AC97_EI_SDAC) { /* SDAC support */
+ snd_ac97_determine_rates(ac97, AC97_PCM_SURR_DAC_RATE, AC97_PCM_FRONT_DAC_RATE, &ac97->rates[AC97_RATES_SURR_DAC]);
+ ac97->scaps |= AC97_SCAP_SURROUND_DAC;
+ }
+ if (ac97->ext_id & AC97_EI_LDAC) { /* LDAC support */
+ snd_ac97_determine_rates(ac97, AC97_PCM_LFE_DAC_RATE, AC97_PCM_FRONT_DAC_RATE, &ac97->rates[AC97_RATES_LFE_DAC]);
+ ac97->scaps |= AC97_SCAP_CENTER_LFE_DAC;
+ }
+ /* additional initializations */
+ if (bus->ops->init)
+ bus->ops->init(ac97);
+ snd_ac97_get_name(ac97, ac97->id, name, !ac97_is_audio(ac97));
+ snd_ac97_get_name(NULL, ac97->id, name, !ac97_is_audio(ac97)); // ac97->id might be changed in the special setup code
+ if (! ac97->build_ops)
+ ac97->build_ops = &null_build_ops;
+
+ if (ac97_is_audio(ac97)) {
+ char comp[16];
+ if (card->mixername[0] == '\0') {
+ strcpy(card->mixername, name);
+ } else {
+ if (strlen(card->mixername) + 1 + strlen(name) + 1 <= sizeof(card->mixername)) {
+ strcat(card->mixername, ",");
+ strcat(card->mixername, name);
+ }
+ }
+ sprintf(comp, "AC97a:%08x", ac97->id);
+ if ((err = snd_component_add(card, comp)) < 0) {
+ snd_ac97_free(ac97);
+ return err;
+ }
+ if (snd_ac97_mixer_build(ac97) < 0) {
+ snd_ac97_free(ac97);
+ return -ENOMEM;
+ }
+ }
+ if (ac97_is_modem(ac97)) {
+ char comp[16];
+ if (card->mixername[0] == '\0') {
+ strcpy(card->mixername, name);
+ } else {
+ if (strlen(card->mixername) + 1 + strlen(name) + 1 <= sizeof(card->mixername)) {
+ strcat(card->mixername, ",");
+ strcat(card->mixername, name);
+ }
+ }
+ sprintf(comp, "AC97m:%08x", ac97->id);
+ if ((err = snd_component_add(card, comp)) < 0) {
+ snd_ac97_free(ac97);
+ return err;
+ }
+ if (snd_ac97_modem_build(card, ac97) < 0) {
+ snd_ac97_free(ac97);
+ return -ENOMEM;
+ }
+ }
+ /* make sure the proper powerdown bits are cleared */
+ if (ac97->scaps) {
+ reg = snd_ac97_read(ac97, AC97_EXTENDED_STATUS);
+ if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
+ reg &= ~AC97_EA_PRJ;
+ if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
+ reg &= ~(AC97_EA_PRI | AC97_EA_PRK);
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_STATUS, reg);
+ }
+ snd_ac97_proc_init(ac97);
+ if ((err = snd_device_new(card, SNDRV_DEV_CODEC, ac97, &ops)) < 0) {
+ snd_ac97_free(ac97);
+ return err;
+ }
+ *rac97 = ac97;
+
+ if (bus->shared_type) {
+ down(&shared_codec_mutex);
+ shared_codec[bus->shared_type-1][ac97->num] = ac97;
+ up(&shared_codec_mutex);
+ }
+
+ return 0;
+}
+
+
+/*
+ * Power down the chip.
+ *
+ * MASTER and HEADPHONE registers are muted but the register cache values
+ * are not changed, so that the values can be restored in snd_ac97_resume().
+ */
+static void snd_ac97_powerdown(ac97_t *ac97)
+{
+ unsigned short power;
+
+ if (ac97_is_audio(ac97)) {
+ /* some codecs have stereo mute bits */
+ snd_ac97_write(ac97, AC97_MASTER, 0x9f9f);
+ snd_ac97_write(ac97, AC97_HEADPHONE, 0x9f9f);
+ }
+
+ power = ac97->regs[AC97_POWERDOWN] | 0x8000; /* EAPD */
+ power |= 0x4000; /* Headphone amplifier powerdown */
+ power |= 0x0300; /* ADC & DAC powerdown */
+ snd_ac97_write(ac97, AC97_POWERDOWN, power);
+ udelay(100);
+ power |= 0x0400; /* Analog Mixer powerdown (Vref on) */
+ snd_ac97_write(ac97, AC97_POWERDOWN, power);
+ udelay(100);
+#if 0
+ /* FIXME: this causes click noises on some boards at resume */
+ power |= 0x3800; /* AC-link powerdown, internal Clk disable */
+ snd_ac97_write(ac97, AC97_POWERDOWN, power);
+#endif
+}
+
+
+#ifdef CONFIG_PM
+/**
+ * snd_ac97_suspend - General suspend function for AC97 codec
+ * @ac97: the ac97 instance
+ *
+ * Suspends the codec, power down the chip.
+ */
+void snd_ac97_suspend(ac97_t *ac97)
+{
+ if (ac97->build_ops->suspend)
+ ac97->build_ops->suspend(ac97);
+ snd_ac97_powerdown(ac97);
+}
+
+/*
+ * restore ac97 status
+ */
+void snd_ac97_restore_status(ac97_t *ac97)
+{
+ int i;
+
+ for (i = 2; i < 0x7c ; i += 2) {
+ if (i == AC97_POWERDOWN || i == AC97_EXTENDED_ID)
+ continue;
+ /* restore only accessible registers
+ * some chip (e.g. nm256) may hang up when unsupported registers
+ * are accessed..!
+ */
+ if (test_bit(i, ac97->reg_accessed)) {
+ snd_ac97_write(ac97, i, ac97->regs[i]);
+ snd_ac97_read(ac97, i);
+ }
+ }
+}
+
+/*
+ * restore IEC958 status
+ */
+void snd_ac97_restore_iec958(ac97_t *ac97)
+{
+ if (ac97->ext_id & AC97_EI_SPDIF) {
+ if (ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_SPDIF) {
+ /* reset spdif status */
+ snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
+ snd_ac97_write(ac97, AC97_EXTENDED_STATUS, ac97->regs[AC97_EXTENDED_STATUS]);
+ if (ac97->flags & AC97_CS_SPDIF)
+ snd_ac97_write(ac97, AC97_CSR_SPDIF, ac97->regs[AC97_CSR_SPDIF]);
+ else
+ snd_ac97_write(ac97, AC97_SPDIF, ac97->regs[AC97_SPDIF]);
+ snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF); /* turn on again */
+ }
+ }
+}
+
+/**
+ * snd_ac97_resume - General resume function for AC97 codec
+ * @ac97: the ac97 instance
+ *
+ * Do the standard resume procedure, power up and restoring the
+ * old register values.
+ */
+void snd_ac97_resume(ac97_t *ac97)
+{
+ int i;
+
+ if (ac97->bus->ops->reset) {
+ ac97->bus->ops->reset(ac97);
+ goto __reset_ready;
+ }
+
+ snd_ac97_write(ac97, AC97_POWERDOWN, 0);
+ if (! (ac97->flags & AC97_DEFAULT_POWER_OFF)) {
+ snd_ac97_write(ac97, AC97_RESET, 0);
+ udelay(100);
+ snd_ac97_write(ac97, AC97_POWERDOWN, 0);
+ }
+ snd_ac97_write(ac97, AC97_GENERAL_PURPOSE, 0);
+
+ snd_ac97_write(ac97, AC97_POWERDOWN, ac97->regs[AC97_POWERDOWN]);
+ if (ac97_is_audio(ac97)) {
+ ac97->bus->ops->write(ac97, AC97_MASTER, 0x8101);
+ for (i = HZ/10; i >= 0; i--) {
+ if (snd_ac97_read(ac97, AC97_MASTER) == 0x8101)
+ break;
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(1);
+ }
+ /* FIXME: extra delay */
+ ac97->bus->ops->write(ac97, AC97_MASTER, 0x8000);
+ if (snd_ac97_read(ac97, AC97_MASTER) != 0x8000) {
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(HZ/4);
+ }
+ } else {
+ for (i = HZ/10; i >= 0; i--) {
+ unsigned short val = snd_ac97_read(ac97, AC97_EXTENDED_MID);
+ if (val != 0xffff && (val & 1) != 0)
+ break;
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(1);
+ }
+ }
+__reset_ready:
+
+ if (ac97->bus->ops->init)
+ ac97->bus->ops->init(ac97);
+
+ if (ac97->build_ops->resume)
+ ac97->build_ops->resume(ac97);
+ else {
+ snd_ac97_restore_status(ac97);
+ snd_ac97_restore_iec958(ac97);
+ }
+}
+#endif
+
+
+/*
+ * Hardware tuning
+ */
+static void set_ctl_name(char *dst, const char *src, const char *suffix)
+{
+ if (suffix)
+ sprintf(dst, "%s %s", src, suffix);
+ else
+ strcpy(dst, src);
+}
+
+/* remove the control with the given name and optional suffix */
+int snd_ac97_remove_ctl(ac97_t *ac97, const char *name, const char *suffix)
+{
+ snd_ctl_elem_id_t id;
+ memset(&id, 0, sizeof(id));
+ set_ctl_name(id.name, name, suffix);
+ id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
+ return snd_ctl_remove_id(ac97->bus->card, &id);
+}
+
+static snd_kcontrol_t *ctl_find(ac97_t *ac97, const char *name, const char *suffix)
+{
+ snd_ctl_elem_id_t sid;
+ memset(&sid, 0, sizeof(sid));
+ set_ctl_name(sid.name, name, suffix);
+ sid.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
+ return snd_ctl_find_id(ac97->bus->card, &sid);
+}
+
+/* rename the control with the given name and optional suffix */
+int snd_ac97_rename_ctl(ac97_t *ac97, const char *src, const char *dst, const char *suffix)
+{
+ snd_kcontrol_t *kctl = ctl_find(ac97, src, suffix);
+ if (kctl) {
+ set_ctl_name(kctl->id.name, dst, suffix);
+ return 0;
+ }
+ return -ENOENT;
+}
+
+/* rename both Volume and Switch controls - don't check the return value */
+void snd_ac97_rename_vol_ctl(ac97_t *ac97, const char *src, const char *dst)
+{
+ snd_ac97_rename_ctl(ac97, src, dst, "Switch");
+ snd_ac97_rename_ctl(ac97, src, dst, "Volume");
+}
+
+/* swap controls */
+int snd_ac97_swap_ctl(ac97_t *ac97, const char *s1, const char *s2, const char *suffix)
+{
+ snd_kcontrol_t *kctl1, *kctl2;
+ kctl1 = ctl_find(ac97, s1, suffix);
+ kctl2 = ctl_find(ac97, s2, suffix);
+ if (kctl1 && kctl2) {
+ set_ctl_name(kctl1->id.name, s2, suffix);
+ set_ctl_name(kctl2->id.name, s1, suffix);
+ return 0;
+ }
+ return -ENOENT;
+}
+
+#if 1
+/* bind hp and master controls instead of using only hp control */
+static int bind_hp_volsw_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
+{
+ int err = snd_ac97_put_volsw(kcontrol, ucontrol);
+ if (err > 0) {
+ unsigned long priv_saved = kcontrol->private_value;
+ kcontrol->private_value = (kcontrol->private_value & ~0xff) | AC97_HEADPHONE;
+ snd_ac97_put_volsw(kcontrol, ucontrol);
+ kcontrol->private_value = priv_saved;
+ }
+ return err;
+}
+
+/* ac97 tune: bind Master and Headphone controls */
+static int tune_hp_only(ac97_t *ac97)
+{
+ snd_kcontrol_t *msw = ctl_find(ac97, "Master Playback Switch", NULL);
+ snd_kcontrol_t *mvol = ctl_find(ac97, "Master Playback Volume", NULL);
+ if (! msw || ! mvol)
+ return -ENOENT;
+ msw->put = bind_hp_volsw_put;
+ mvol->put = bind_hp_volsw_put;
+ snd_ac97_remove_ctl(ac97, "Headphone Playback", "Switch");
+ snd_ac97_remove_ctl(ac97, "Headphone Playback", "Volume");
+ return 0;
+}
+
+#else
+/* ac97 tune: use Headphone control as master */
+static int tune_hp_only(ac97_t *ac97)
+{
+ if (ctl_find(ac97, "Headphone Playback Switch", NULL) == NULL)
+ return -ENOENT;
+ snd_ac97_remove_ctl(ac97, "Master Playback", "Switch");
+ snd_ac97_remove_ctl(ac97, "Master Playback", "Volume");
+ snd_ac97_rename_vol_ctl(ac97, "Headphone Playback", "Master Playback");
+ return 0;
+}
+#endif
+
+/* ac97 tune: swap Headphone and Master controls */
+static int tune_swap_hp(ac97_t *ac97)
+{
+ if (ctl_find(ac97, "Headphone Playback Switch", NULL) == NULL)
+ return -ENOENT;
+ snd_ac97_rename_vol_ctl(ac97, "Master Playback", "Line-Out Playback");
+ snd_ac97_rename_vol_ctl(ac97, "Headphone Playback", "Master Playback");
+ return 0;
+}
+
+/* ac97 tune: swap Surround and Master controls */
+static int tune_swap_surround(ac97_t *ac97)
+{
+ if (snd_ac97_swap_ctl(ac97, "Master Playback", "Surround Playback", "Switch") ||
+ snd_ac97_swap_ctl(ac97, "Master Playback", "Surround Playback", "Volume"))
+ return -ENOENT;
+ return 0;
+}
+
+/* ac97 tune: set up mic sharing for AD codecs */
+static int tune_ad_sharing(ac97_t *ac97)
+{
+ unsigned short scfg;
+ if ((ac97->id & 0xffffff00) != 0x41445300) {
+ snd_printk(KERN_ERR "ac97_quirk AD_SHARING is only for AD codecs\n");
+ return -EINVAL;
+ }
+ /* Turn on OMS bit to route microphone to back panel */
+ scfg = snd_ac97_read(ac97, AC97_AD_SERIAL_CFG);
+ snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, scfg | 0x0200);
+ return 0;
+}
+
+static const snd_kcontrol_new_t snd_ac97_alc_jack_detect =
+AC97_SINGLE("Jack Detect", AC97_ALC650_CLOCK, 5, 1, 0);
+
+/* ac97 tune: set up ALC jack-select */
+static int tune_alc_jack(ac97_t *ac97)
+{
+ if ((ac97->id & 0xffffff00) != 0x414c4700) {
+ snd_printk(KERN_ERR "ac97_quirk ALC_JACK is only for Realtek codecs\n");
+ return -EINVAL;
+ }
+ snd_ac97_update_bits(ac97, 0x7a, 0x20, 0x20); /* select jack detect function */
+ snd_ac97_update_bits(ac97, 0x7a, 0x01, 0x01); /* Line-out auto mute */
+ return snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&snd_ac97_alc_jack_detect, ac97));
+}
+
+/* ac97 tune: inversed EAPD bit */
+static int tune_inv_eapd(ac97_t *ac97)
+{
+ snd_kcontrol_t *kctl = ctl_find(ac97, "External Amplifier", NULL);
+ if (! kctl)
+ return -ENOENT;
+ set_inv_eapd(ac97, kctl);
+ return 0;
+}
+
+static int master_mute_sw_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
+{
+ int err = snd_ac97_put_volsw(kcontrol, ucontrol);
+ if (err > 0) {
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int shift = (kcontrol->private_value >> 8) & 0x0f;
+ int rshift = (kcontrol->private_value >> 12) & 0x0f;
+ unsigned short mask;
+ if (shift != rshift)
+ mask = 0x8080;
+ else
+ mask = 0x8000;
+ snd_ac97_update_bits(ac97, AC97_POWERDOWN, 0x8000,
+ (ac97->regs[AC97_MASTER] & mask) == mask ?
+ 0x8000 : 0);
+ }
+ return err;
+}
+
+/* ac97 tune: EAPD controls mute LED bound with the master mute */
+static int tune_mute_led(ac97_t *ac97)
+{
+ snd_kcontrol_t *msw = ctl_find(ac97, "Master Playback Switch", NULL);
+ if (! msw)
+ return -ENOENT;
+ msw->put = master_mute_sw_put;
+ snd_ac97_remove_ctl(ac97, "External Amplifier", NULL);
+ snd_ac97_update_bits(ac97, AC97_POWERDOWN, 0x8000, 0x8000); /* mute LED on */
+ return 0;
+}
+
+struct quirk_table {
+ const char *name;
+ int (*func)(ac97_t *);
+};
+
+static struct quirk_table applicable_quirks[] = {
+ { "none", NULL },
+ { "hp_only", tune_hp_only },
+ { "swap_hp", tune_swap_hp },
+ { "swap_surround", tune_swap_surround },
+ { "ad_sharing", tune_ad_sharing },
+ { "alc_jack", tune_alc_jack },
+ { "inv_eapd", tune_inv_eapd },
+ { "mute_led", tune_mute_led },
+};
+
+/* apply the quirk with the given type */
+static int apply_quirk(ac97_t *ac97, int type)
+{
+ if (type <= 0)
+ return 0;
+ else if (type >= ARRAY_SIZE(applicable_quirks))
+ return -EINVAL;
+ if (applicable_quirks[type].func)
+ return applicable_quirks[type].func(ac97);
+ return 0;
+}
+
+/* apply the quirk with the given name */
+static int apply_quirk_str(ac97_t *ac97, const char *typestr)
+{
+ int i;
+ struct quirk_table *q;
+
+ for (i = 0; i < ARRAY_SIZE(applicable_quirks); i++) {
+ q = &applicable_quirks[i];
+ if (q->name && ! strcmp(typestr, q->name))
+ return apply_quirk(ac97, i);
+ }
+ /* for compatibility, accept the numbers, too */
+ if (*typestr >= '0' && *typestr <= '9')
+ return apply_quirk(ac97, (int)simple_strtoul(typestr, NULL, 10));
+ return -EINVAL;
+}
+
+/**
+ * snd_ac97_tune_hardware - tune up the hardware
+ * @ac97: the ac97 instance
+ * @quirk: quirk list
+ * @override: explicit quirk value (overrides the list if non-NULL)
+ *
+ * Do some workaround for each pci device, such as renaming of the
+ * headphone (true line-out) control as "Master".
+ * The quirk-list must be terminated with a zero-filled entry.
+ *
+ * Returns zero if successful, or a negative error code on failure.
+ */
+
+int snd_ac97_tune_hardware(ac97_t *ac97, struct ac97_quirk *quirk, const char *override)
+{
+ int result;
+
+ snd_assert(quirk, return -EINVAL);
+
+ /* quirk overriden? */
+ if (override && strcmp(override, "-1") && strcmp(override, "default")) {
+ result = apply_quirk_str(ac97, override);
+ if (result < 0)
+ snd_printk(KERN_ERR "applying quirk type %s failed (%d)\n", override, result);
+ return result;
+ }
+
+ for (; quirk->vendor; quirk++) {
+ if (quirk->vendor != ac97->subsystem_vendor)
+ continue;
+ if ((! quirk->mask && quirk->device == ac97->subsystem_device) ||
+ quirk->device == (quirk->mask & ac97->subsystem_device)) {
+ if (quirk->codec_id && quirk->codec_id != ac97->id)
+ continue;
+ snd_printdd("ac97 quirk for %s (%04x:%04x)\n", quirk->name, ac97->subsystem_vendor, ac97->subsystem_device);
+ result = apply_quirk(ac97, quirk->type);
+ if (result < 0)
+ snd_printk(KERN_ERR "applying quirk type %d for %s failed (%d)\n", quirk->type, quirk->name, result);
+ return result;
+ }
+ }
+ return 0;
+}
+
+
+/*
+ * Exported symbols
+ */
+
+EXPORT_SYMBOL(snd_ac97_write);
+EXPORT_SYMBOL(snd_ac97_read);
+EXPORT_SYMBOL(snd_ac97_write_cache);
+EXPORT_SYMBOL(snd_ac97_update);
+EXPORT_SYMBOL(snd_ac97_update_bits);
+EXPORT_SYMBOL(snd_ac97_get_short_name);
+EXPORT_SYMBOL(snd_ac97_bus);
+EXPORT_SYMBOL(snd_ac97_mixer);
+EXPORT_SYMBOL(snd_ac97_pcm_assign);
+EXPORT_SYMBOL(snd_ac97_pcm_open);
+EXPORT_SYMBOL(snd_ac97_pcm_close);
+EXPORT_SYMBOL(snd_ac97_pcm_double_rate_rules);
+EXPORT_SYMBOL(snd_ac97_tune_hardware);
+EXPORT_SYMBOL(snd_ac97_set_rate);
+#ifdef CONFIG_PM
+EXPORT_SYMBOL(snd_ac97_resume);
+EXPORT_SYMBOL(snd_ac97_suspend);
+#endif
+
+/*
+ * INIT part
+ */
+
+static int __init alsa_ac97_init(void)
+{
+ return 0;
+}
+
+static void __exit alsa_ac97_exit(void)
+{
+}
+
+module_init(alsa_ac97_init)
+module_exit(alsa_ac97_exit)
diff --git a/sound/pci/ac97/ac97_id.h b/sound/pci/ac97/ac97_id.h
new file mode 100644
index 000000000000..dadf387ad0b8
--- /dev/null
+++ b/sound/pci/ac97/ac97_id.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
+ * Universal interface for Audio Codec '97
+ *
+ * For more details look to AC '97 component specification revision 2.2
+ * by Intel Corporation (http://developer.intel.com).
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#define AC97_ID_AK4540 0x414b4d00
+#define AC97_ID_AK4542 0x414b4d01
+#define AC97_ID_AD1819 0x41445303
+#define AC97_ID_AD1881 0x41445340
+#define AC97_ID_AD1881A 0x41445348
+#define AC97_ID_AD1885 0x41445360
+#define AC97_ID_AD1886 0x41445361
+#define AC97_ID_AD1887 0x41445362
+#define AC97_ID_AD1886A 0x41445363
+#define AC97_ID_AD1980 0x41445370
+#define AC97_ID_TR28028 0x54524108
+#define AC97_ID_STAC9700 0x83847600
+#define AC97_ID_STAC9704 0x83847604
+#define AC97_ID_STAC9705 0x83847605
+#define AC97_ID_STAC9708 0x83847608
+#define AC97_ID_STAC9721 0x83847609
+#define AC97_ID_STAC9744 0x83847644
+#define AC97_ID_STAC9756 0x83847656
+#define AC97_ID_CS4297A 0x43525910
+#define AC97_ID_CS4299 0x43525930
+#define AC97_ID_CS4201 0x43525948
+#define AC97_ID_CS4205 0x43525958
+#define AC97_ID_CS_MASK 0xfffffff8 /* bit 0-2: rev */
+#define AC97_ID_ALC100 0x414c4300
+#define AC97_ID_ALC650 0x414c4720
+#define AC97_ID_ALC650D 0x414c4721
+#define AC97_ID_ALC650E 0x414c4722
+#define AC97_ID_ALC650F 0x414c4723
+#define AC97_ID_ALC655 0x414c4760
+#define AC97_ID_ALC658 0x414c4780
+#define AC97_ID_ALC850 0x414c4790
+#define AC97_ID_YMF753 0x594d4803
+#define AC97_ID_VT1616 0x49434551
+#define AC97_ID_CM9738 0x434d4941
+#define AC97_ID_CM9739 0x434d4961
+#define AC97_ID_CM9761_78 0x434d4978
+#define AC97_ID_CM9761_82 0x434d4982
+#define AC97_ID_CM9761_83 0x434d4983
diff --git a/sound/pci/ac97/ac97_local.h b/sound/pci/ac97/ac97_local.h
new file mode 100644
index 000000000000..536a4d4793af
--- /dev/null
+++ b/sound/pci/ac97/ac97_local.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
+ * Universal interface for Audio Codec '97
+ *
+ * For more details look to AC '97 component specification revision 2.2
+ * by Intel Corporation (http://developer.intel.com).
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#define AC97_SINGLE_VALUE(reg,shift,mask,invert) ((reg) | ((shift) << 8) | ((shift) << 12) | ((mask) << 16) | ((invert) << 24))
+#define AC97_PAGE_SINGLE_VALUE(reg,shift,mask,invert,page) (AC97_SINGLE_VALUE(reg,shift,mask,invert) | (1<<25) | ((page) << 26))
+#define AC97_SINGLE(xname, reg, shift, mask, invert) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ac97_info_volsw, \
+ .get = snd_ac97_get_volsw, .put = snd_ac97_put_volsw, \
+ .private_value = AC97_SINGLE_VALUE(reg, shift, mask, invert) }
+#define AC97_PAGE_SINGLE(xname, reg, shift, mask, invert, page) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ac97_info_volsw, \
+ .get = snd_ac97_get_volsw, .put = snd_ac97_put_volsw, \
+ .private_value = AC97_PAGE_SINGLE_VALUE(reg, shift, mask, invert, page) }
+#define AC97_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_ac97_info_volsw, \
+ .get = snd_ac97_get_volsw, .put = snd_ac97_put_volsw, \
+ .private_value = (reg) | ((shift_left) << 8) | ((shift_right) << 12) | ((mask) << 16) | ((invert) << 24) }
+#define AC97_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xtexts) \
+{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
+ .mask = xmask, .texts = xtexts }
+#define AC97_ENUM_SINGLE(xreg, xshift, xmask, xtexts) \
+ AC97_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xtexts)
+#define AC97_ENUM(xname, xenum) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_ac97_info_enum_double, \
+ .get = snd_ac97_get_enum_double, .put = snd_ac97_put_enum_double, \
+ .private_value = (unsigned long)&xenum }
+
+/* ac97_codec.c */
+extern const char *snd_ac97_stereo_enhancements[];
+extern const snd_kcontrol_new_t snd_ac97_controls_3d[];
+extern const snd_kcontrol_new_t snd_ac97_controls_spdif[];
+snd_kcontrol_t *snd_ac97_cnew(const snd_kcontrol_new_t *_template, ac97_t * ac97);
+void snd_ac97_get_name(ac97_t *ac97, unsigned int id, char *name, int modem);
+int snd_ac97_info_volsw(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo);
+int snd_ac97_get_volsw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol);
+int snd_ac97_put_volsw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol);
+int snd_ac97_try_bit(ac97_t * ac97, int reg, int bit);
+int snd_ac97_remove_ctl(ac97_t *ac97, const char *name, const char *suffix);
+int snd_ac97_rename_ctl(ac97_t *ac97, const char *src, const char *dst, const char *suffix);
+int snd_ac97_swap_ctl(ac97_t *ac97, const char *s1, const char *s2, const char *suffix);
+void snd_ac97_rename_vol_ctl(ac97_t *ac97, const char *src, const char *dst);
+void snd_ac97_restore_status(ac97_t *ac97);
+void snd_ac97_restore_iec958(ac97_t *ac97);
+int snd_ac97_info_enum_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo);
+int snd_ac97_get_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol);
+int snd_ac97_put_enum_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol);
+
+int snd_ac97_update_bits_nolock(ac97_t *ac97, unsigned short reg,
+ unsigned short mask, unsigned short value);
+
+/* ac97_proc.c */
+#ifdef CONFIG_PROC_FS
+void snd_ac97_bus_proc_init(ac97_bus_t * ac97);
+void snd_ac97_bus_proc_done(ac97_bus_t * ac97);
+void snd_ac97_proc_init(ac97_t * ac97);
+void snd_ac97_proc_done(ac97_t * ac97);
+#else
+#define snd_ac97_bus_proc_init(ac97_bus_t) do { } while (0)
+#define snd_ac97_bus_proc_done(ac97_bus_t) do { } while (0)
+#define snd_ac97_proc_init(ac97_t) do { } while (0)
+#define snd_ac97_proc_done(ac97_t) do { } while (0)
+#endif
diff --git a/sound/pci/ac97/ac97_patch.c b/sound/pci/ac97/ac97_patch.c
new file mode 100644
index 000000000000..13c34a5d8206
--- /dev/null
+++ b/sound/pci/ac97/ac97_patch.c
@@ -0,0 +1,2309 @@
+/*
+ * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
+ * Universal interface for Audio Codec '97
+ *
+ * For more details look to AC '97 component specification revision 2.2
+ * by Intel Corporation (http://developer.intel.com) and to datasheets
+ * for specific codecs.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <sound/driver.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/control.h>
+#include <sound/ac97_codec.h>
+#include "ac97_patch.h"
+#include "ac97_id.h"
+#include "ac97_local.h"
+
+/*
+ * Chip specific initialization
+ */
+
+static int patch_build_controls(ac97_t * ac97, const snd_kcontrol_new_t *controls, int count)
+{
+ int idx, err;
+
+ for (idx = 0; idx < count; idx++)
+ if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&controls[idx], ac97))) < 0)
+ return err;
+ return 0;
+}
+
+/* set to the page, update bits and restore the page */
+static int ac97_update_bits_page(ac97_t *ac97, unsigned short reg, unsigned short mask, unsigned short value, unsigned short page)
+{
+ unsigned short page_save;
+ int ret;
+
+ down(&ac97->page_mutex);
+ page_save = snd_ac97_read(ac97, AC97_INT_PAGING) & AC97_PAGE_MASK;
+ snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, page);
+ ret = snd_ac97_update_bits(ac97, reg, mask, value);
+ snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, page_save);
+ up(&ac97->page_mutex); /* unlock paging */
+ return ret;
+}
+
+/* The following snd_ac97_ymf753_... items added by David Shust (dshust@shustring.com) */
+
+/* It is possible to indicate to the Yamaha YMF753 the type of speakers being used. */
+static int snd_ac97_ymf753_info_speaker(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ static char *texts[3] = {
+ "Standard", "Small", "Smaller"
+ };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 3;
+ if (uinfo->value.enumerated.item > 2)
+ uinfo->value.enumerated.item = 2;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_ymf753_get_speaker(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_YMF753_3D_MODE_SEL];
+ val = (val >> 10) & 3;
+ if (val > 0) /* 0 = invalid */
+ val--;
+ ucontrol->value.enumerated.item[0] = val;
+ return 0;
+}
+
+static int snd_ac97_ymf753_put_speaker(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ if (ucontrol->value.enumerated.item[0] > 2)
+ return -EINVAL;
+ val = (ucontrol->value.enumerated.item[0] + 1) << 10;
+ return snd_ac97_update(ac97, AC97_YMF753_3D_MODE_SEL, val);
+}
+
+static const snd_kcontrol_new_t snd_ac97_ymf753_controls_speaker =
+{
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "3D Control - Speaker",
+ .info = snd_ac97_ymf753_info_speaker,
+ .get = snd_ac97_ymf753_get_speaker,
+ .put = snd_ac97_ymf753_put_speaker,
+};
+
+/* It is possible to indicate to the Yamaha YMF753 the source to direct to the S/PDIF output. */
+static int snd_ac97_ymf753_spdif_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ static char *texts[2] = { "AC-Link", "A/D Converter" };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 2;
+ if (uinfo->value.enumerated.item > 1)
+ uinfo->value.enumerated.item = 1;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_ymf753_spdif_source_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_YMF753_DIT_CTRL2];
+ ucontrol->value.enumerated.item[0] = (val >> 1) & 1;
+ return 0;
+}
+
+static int snd_ac97_ymf753_spdif_source_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ if (ucontrol->value.enumerated.item[0] > 1)
+ return -EINVAL;
+ val = ucontrol->value.enumerated.item[0] << 1;
+ return snd_ac97_update_bits(ac97, AC97_YMF753_DIT_CTRL2, 0x0002, val);
+}
+
+/* The AC'97 spec states that the S/PDIF signal is to be output at pin 48.
+ The YMF753 will output the S/PDIF signal to pin 43, 47 (EAPD), or 48.
+ By default, no output pin is selected, and the S/PDIF signal is not output.
+ There is also a bit to mute S/PDIF output in a vendor-specific register. */
+static int snd_ac97_ymf753_spdif_output_pin_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ static char *texts[3] = { "Disabled", "Pin 43", "Pin 48" };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 3;
+ if (uinfo->value.enumerated.item > 2)
+ uinfo->value.enumerated.item = 2;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_ymf753_spdif_output_pin_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_YMF753_DIT_CTRL2];
+ ucontrol->value.enumerated.item[0] = (val & 0x0008) ? 2 : (val & 0x0020) ? 1 : 0;
+ return 0;
+}
+
+static int snd_ac97_ymf753_spdif_output_pin_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ if (ucontrol->value.enumerated.item[0] > 2)
+ return -EINVAL;
+ val = (ucontrol->value.enumerated.item[0] == 2) ? 0x0008 :
+ (ucontrol->value.enumerated.item[0] == 1) ? 0x0020 : 0;
+ return snd_ac97_update_bits(ac97, AC97_YMF753_DIT_CTRL2, 0x0028, val);
+ /* The following can be used to direct S/PDIF output to pin 47 (EAPD).
+ snd_ac97_write_cache(ac97, 0x62, snd_ac97_read(ac97, 0x62) | 0x0008); */
+}
+
+static const snd_kcontrol_new_t snd_ac97_ymf753_controls_spdif[3] = {
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
+ .info = snd_ac97_ymf753_spdif_source_info,
+ .get = snd_ac97_ymf753_spdif_source_get,
+ .put = snd_ac97_ymf753_spdif_source_put,
+ },
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Output Pin",
+ .info = snd_ac97_ymf753_spdif_output_pin_info,
+ .get = snd_ac97_ymf753_spdif_output_pin_get,
+ .put = snd_ac97_ymf753_spdif_output_pin_put,
+ },
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",NONE,NONE) "Mute", AC97_YMF753_DIT_CTRL2, 2, 1, 1)
+};
+
+static int patch_yamaha_ymf753_3d(ac97_t * ac97)
+{
+ snd_kcontrol_t *kctl;
+ int err;
+
+ if ((err = snd_ctl_add(ac97->bus->card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
+ return err;
+ strcpy(kctl->id.name, "3D Control - Wide");
+ kctl->private_value = AC97_SINGLE_VALUE(AC97_3D_CONTROL, 9, 7, 0);
+ snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
+ if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&snd_ac97_ymf753_controls_speaker, ac97))) < 0)
+ return err;
+ snd_ac97_write_cache(ac97, AC97_YMF753_3D_MODE_SEL, 0x0c00);
+ return 0;
+}
+
+static int patch_yamaha_ymf753_post_spdif(ac97_t * ac97)
+{
+ int err;
+
+ if ((err = patch_build_controls(ac97, snd_ac97_ymf753_controls_spdif, ARRAY_SIZE(snd_ac97_ymf753_controls_spdif))) < 0)
+ return err;
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_yamaha_ymf753_ops = {
+ .build_3d = patch_yamaha_ymf753_3d,
+ .build_post_spdif = patch_yamaha_ymf753_post_spdif
+};
+
+int patch_yamaha_ymf753(ac97_t * ac97)
+{
+ /* Patch for Yamaha YMF753, Copyright (c) by David Shust, dshust@shustring.com.
+ This chip has nonstandard and extended behaviour with regard to its S/PDIF output.
+ The AC'97 spec states that the S/PDIF signal is to be output at pin 48.
+ The YMF753 will ouput the S/PDIF signal to pin 43, 47 (EAPD), or 48.
+ By default, no output pin is selected, and the S/PDIF signal is not output.
+ There is also a bit to mute S/PDIF output in a vendor-specific register.
+ */
+ ac97->build_ops = &patch_yamaha_ymf753_ops;
+ ac97->caps |= AC97_BC_BASS_TREBLE;
+ ac97->caps |= 0x04 << 10; /* Yamaha 3D enhancement */
+ return 0;
+}
+
+/*
+ * May 2, 2003 Liam Girdwood <liam.girdwood@wolfsonmicro.com>
+ * removed broken wolfson00 patch.
+ * added support for WM9705,WM9708,WM9709,WM9710,WM9711,WM9712 and WM9717.
+ */
+
+int patch_wolfson03(ac97_t * ac97)
+{
+ /* This is known to work for the ViewSonic ViewPad 1000
+ Randolph Bentson <bentson@holmsjoen.com> */
+
+ // WM9703/9707/9708/9717
+ snd_ac97_write_cache(ac97, AC97_WM97XX_FMIXER_VOL, 0x0808);
+ snd_ac97_write_cache(ac97, AC97_GENERAL_PURPOSE, 0x8000);
+ return 0;
+}
+
+int patch_wolfson04(ac97_t * ac97)
+{
+ // WM9704M/9704Q
+ // set front and rear mixer volume
+ snd_ac97_write_cache(ac97, AC97_WM97XX_FMIXER_VOL, 0x0808);
+ snd_ac97_write_cache(ac97, AC97_WM9704_RMIXER_VOL, 0x0808);
+
+ // patch for DVD noise
+ snd_ac97_write_cache(ac97, AC97_WM9704_TEST, 0x0200);
+
+ // init vol
+ snd_ac97_write_cache(ac97, AC97_WM9704_RPCM_VOL, 0x0808);
+
+ // set rear surround volume
+ snd_ac97_write_cache(ac97, AC97_SURROUND_MASTER, 0x0000);
+ return 0;
+}
+
+int patch_wolfson05(ac97_t * ac97)
+{
+ // WM9705, WM9710
+ // set front mixer volume
+ snd_ac97_write_cache(ac97, AC97_WM97XX_FMIXER_VOL, 0x0808);
+ return 0;
+}
+
+int patch_wolfson11(ac97_t * ac97)
+{
+ // WM9711, WM9712
+ // set out3 volume
+ snd_ac97_write_cache(ac97, AC97_WM9711_OUT3VOL, 0x0808);
+ return 0;
+}
+
+static const char* wm9713_mic_mixer[] = {"Stereo", "Mic1", "Mic2", "Mute"};
+static const char* wm9713_rec_mux[] = {"Stereo", "Left", "Right", "Mute"};
+static const char* wm9713_rec_src_l[] = {"Mic1", "Mic2", "Line L", "Mono In", "HP Mix L", "Spk Mix", "Mono Mix", "Zh"};
+static const char* wm9713_rec_src_r[] = {"Mic1", "Mic2", "Line R", "Mono In", "HP Mix R", "Spk Mix", "Mono Mix", "Zh"};
+
+static const struct ac97_enum wm9713_enum[] = {
+AC97_ENUM_SINGLE(AC97_LINE, 3, 4, wm9713_mic_mixer),
+AC97_ENUM_SINGLE(AC97_VIDEO, 14, 4, wm9713_rec_mux),
+AC97_ENUM_SINGLE(AC97_VIDEO, 9, 4, wm9713_rec_mux),
+AC97_ENUM_SINGLE(AC97_VIDEO, 3, 8, wm9713_rec_src_l),
+AC97_ENUM_SINGLE(AC97_VIDEO, 0, 8, wm9713_rec_src_r),
+};
+
+static const snd_kcontrol_new_t wm13_snd_ac97_controls_line_in[] = {
+AC97_DOUBLE("Line In Volume", AC97_PC_BEEP, 8, 0, 31, 1),
+AC97_SINGLE("Line In to Headphone Mute", AC97_PC_BEEP, 15, 1, 1),
+AC97_SINGLE("Line In to Speaker Mute", AC97_PC_BEEP, 14, 1, 1),
+AC97_SINGLE("Line In to Mono Mute", AC97_PC_BEEP, 13, 1, 1),
+};
+
+static const snd_kcontrol_new_t wm13_snd_ac97_controls_dac[] = {
+AC97_DOUBLE("DAC Volume", AC97_PHONE, 8, 0, 31, 1),
+AC97_SINGLE("DAC to Headphone Mute", AC97_PHONE, 15, 1, 1),
+AC97_SINGLE("DAC to Speaker Mute", AC97_PHONE, 14, 1, 1),
+AC97_SINGLE("DAC to Mono Mute", AC97_PHONE, 13, 1, 1),
+};
+
+static const snd_kcontrol_new_t wm13_snd_ac97_controls_mic[] = {
+AC97_SINGLE("MICA Volume", AC97_MIC, 8, 31, 1),
+AC97_SINGLE("MICB Volume", AC97_MIC, 0, 31, 1),
+AC97_SINGLE("MICA to Mono Mute", AC97_LINE, 7, 1, 1),
+AC97_SINGLE("MICB to Mono Mute", AC97_LINE, 6, 1, 1),
+AC97_SINGLE("MIC Boost (+20dB)", AC97_LINE, 5, 1, 1),
+AC97_ENUM("MIC Headphone Routing", wm9713_enum[0]),
+AC97_SINGLE("MIC Headphone Mixer Volume", AC97_LINE, 0, 7, 1)
+};
+
+static const snd_kcontrol_new_t wm13_snd_ac97_controls_adc[] = {
+AC97_SINGLE("ADC Mute", AC97_CD, 15, 1, 1),
+AC97_DOUBLE("Gain Step Size (1.5dB/0.75dB)", AC97_CD, 14, 6, 1, 1),
+AC97_DOUBLE("ADC Volume",AC97_CD, 8, 0, 15, 0),
+AC97_SINGLE("ADC Zero Cross", AC97_CD, 7, 1, 1),
+};
+
+static const snd_kcontrol_new_t wm13_snd_ac97_controls_recsel[] = {
+AC97_ENUM("Record to Headphone Path", wm9713_enum[1]),
+AC97_SINGLE("Record to Headphone Volume", AC97_VIDEO, 11, 7, 0),
+AC97_ENUM("Record to Mono Path", wm9713_enum[2]),
+AC97_SINGLE("Record to Mono Boost (+20dB)", AC97_VIDEO, 8, 1, 0),
+AC97_SINGLE("Record ADC Boost (+20dB)", AC97_VIDEO, 6, 1, 0),
+AC97_ENUM("Record Select Left", wm9713_enum[3]),
+AC97_ENUM("Record Select Right", wm9713_enum[4]),
+};
+
+static int patch_wolfson_wm9713_specific(ac97_t * ac97)
+{
+ int err, i;
+
+ for (i = 0; i < ARRAY_SIZE(wm13_snd_ac97_controls_line_in); i++) {
+ if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&wm13_snd_ac97_controls_line_in[i], ac97))) < 0)
+ return err;
+ }
+ snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x0808);
+
+ for (i = 0; i < ARRAY_SIZE(wm13_snd_ac97_controls_dac); i++) {
+ if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&wm13_snd_ac97_controls_dac[i], ac97))) < 0)
+ return err;
+ }
+ snd_ac97_write_cache(ac97, AC97_PHONE, 0x0808);
+
+ for (i = 0; i < ARRAY_SIZE(wm13_snd_ac97_controls_mic); i++) {
+ if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&wm13_snd_ac97_controls_mic[i], ac97))) < 0)
+ return err;
+ }
+ snd_ac97_write_cache(ac97, AC97_MIC, 0x0808);
+ snd_ac97_write_cache(ac97, AC97_LINE, 0x00da);
+
+ for (i = 0; i < ARRAY_SIZE(wm13_snd_ac97_controls_adc); i++) {
+ if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&wm13_snd_ac97_controls_adc[i], ac97))) < 0)
+ return err;
+ }
+ snd_ac97_write_cache(ac97, AC97_CD, 0x0808);
+
+ for (i = 0; i < ARRAY_SIZE(wm13_snd_ac97_controls_recsel); i++) {
+ if ((err = snd_ctl_add(ac97->bus->card, snd_ac97_cnew(&wm13_snd_ac97_controls_recsel[i], ac97))) < 0)
+ return err;
+ }
+ snd_ac97_write_cache(ac97, AC97_VIDEO, 0xd612);
+ snd_ac97_write_cache(ac97, AC97_REC_GAIN, 0x1ba0);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static void patch_wolfson_wm9713_suspend (ac97_t * ac97)
+{
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_MID, 0xfeff);
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_MSTATUS, 0xffff);
+}
+
+static void patch_wolfson_wm9713_resume (ac97_t * ac97)
+{
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_MID, 0xda00);
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_MSTATUS, 0x3810);
+ snd_ac97_write_cache(ac97, AC97_POWERDOWN, 0x0);
+}
+#endif
+
+static struct snd_ac97_build_ops patch_wolfson_wm9713_ops = {
+ .build_specific = patch_wolfson_wm9713_specific,
+#ifdef CONFIG_PM
+ .suspend = patch_wolfson_wm9713_suspend,
+ .resume = patch_wolfson_wm9713_resume
+#endif
+};
+
+int patch_wolfson13(ac97_t * ac97)
+{
+ ac97->build_ops = &patch_wolfson_wm9713_ops;
+
+ ac97->flags |= AC97_HAS_NO_REC_GAIN | AC97_STEREO_MUTES | AC97_HAS_NO_PHONE |
+ AC97_HAS_NO_PC_BEEP | AC97_HAS_NO_VIDEO | AC97_HAS_NO_CD;
+
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_MID, 0xda00);
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_MSTATUS, 0x3810);
+ snd_ac97_write_cache(ac97, AC97_POWERDOWN, 0x0);
+
+ return 0;
+}
+
+/*
+ * Tritech codec
+ */
+int patch_tritech_tr28028(ac97_t * ac97)
+{
+ snd_ac97_write_cache(ac97, 0x26, 0x0300);
+ snd_ac97_write_cache(ac97, 0x26, 0x0000);
+ snd_ac97_write_cache(ac97, AC97_SURROUND_MASTER, 0x0000);
+ snd_ac97_write_cache(ac97, AC97_SPDIF, 0x0000);
+ return 0;
+}
+
+/*
+ * Sigmatel STAC97xx codecs
+ */
+static int patch_sigmatel_stac9700_3d(ac97_t * ac97)
+{
+ snd_kcontrol_t *kctl;
+ int err;
+
+ if ((err = snd_ctl_add(ac97->bus->card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
+ return err;
+ strcpy(kctl->id.name, "3D Control Sigmatel - Depth");
+ kctl->private_value = AC97_SINGLE_VALUE(AC97_3D_CONTROL, 2, 3, 0);
+ snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
+ return 0;
+}
+
+static int patch_sigmatel_stac9708_3d(ac97_t * ac97)
+{
+ snd_kcontrol_t *kctl;
+ int err;
+
+ if ((err = snd_ctl_add(ac97->bus->card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
+ return err;
+ strcpy(kctl->id.name, "3D Control Sigmatel - Depth");
+ kctl->private_value = AC97_SINGLE_VALUE(AC97_3D_CONTROL, 0, 3, 0);
+ if ((err = snd_ctl_add(ac97->bus->card, kctl = snd_ac97_cnew(&snd_ac97_controls_3d[0], ac97))) < 0)
+ return err;
+ strcpy(kctl->id.name, "3D Control Sigmatel - Rear Depth");
+ kctl->private_value = AC97_SINGLE_VALUE(AC97_3D_CONTROL, 2, 3, 0);
+ snd_ac97_write_cache(ac97, AC97_3D_CONTROL, 0x0000);
+ return 0;
+}
+
+static const snd_kcontrol_new_t snd_ac97_sigmatel_4speaker =
+AC97_SINGLE("Sigmatel 4-Speaker Stereo Playback Switch", AC97_SIGMATEL_DAC2INVERT, 2, 1, 0);
+
+static const snd_kcontrol_new_t snd_ac97_sigmatel_phaseinvert =
+AC97_SINGLE("Sigmatel Surround Phase Inversion Playback Switch", AC97_SIGMATEL_DAC2INVERT, 3, 1, 0);
+
+static const snd_kcontrol_new_t snd_ac97_sigmatel_controls[] = {
+AC97_SINGLE("Sigmatel DAC 6dB Attenuate", AC97_SIGMATEL_ANALOG, 1, 1, 0),
+AC97_SINGLE("Sigmatel ADC 6dB Attenuate", AC97_SIGMATEL_ANALOG, 0, 1, 0)
+};
+
+static int patch_sigmatel_stac97xx_specific(ac97_t * ac97)
+{
+ int err;
+
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_ANALOG, snd_ac97_read(ac97, AC97_SIGMATEL_ANALOG) & ~0x0003);
+ if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_ANALOG, 1))
+ if ((err = patch_build_controls(ac97, &snd_ac97_sigmatel_controls[0], 1)) < 0)
+ return err;
+ if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_ANALOG, 0))
+ if ((err = patch_build_controls(ac97, &snd_ac97_sigmatel_controls[1], 1)) < 0)
+ return err;
+ if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_DAC2INVERT, 2))
+ if ((err = patch_build_controls(ac97, &snd_ac97_sigmatel_4speaker, 1)) < 0)
+ return err;
+ if (snd_ac97_try_bit(ac97, AC97_SIGMATEL_DAC2INVERT, 3))
+ if ((err = patch_build_controls(ac97, &snd_ac97_sigmatel_phaseinvert, 1)) < 0)
+ return err;
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_sigmatel_stac9700_ops = {
+ .build_3d = patch_sigmatel_stac9700_3d,
+ .build_specific = patch_sigmatel_stac97xx_specific
+};
+
+int patch_sigmatel_stac9700(ac97_t * ac97)
+{
+ ac97->build_ops = &patch_sigmatel_stac9700_ops;
+ return 0;
+}
+
+static int snd_ac97_stac9708_put_bias(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int err;
+
+ down(&ac97->page_mutex);
+ snd_ac97_write(ac97, AC97_SIGMATEL_BIAS1, 0xabba);
+ err = snd_ac97_update_bits(ac97, AC97_SIGMATEL_BIAS2, 0x0010,
+ (ucontrol->value.integer.value[0] & 1) << 4);
+ snd_ac97_write(ac97, AC97_SIGMATEL_BIAS1, 0);
+ up(&ac97->page_mutex);
+ return err;
+}
+
+static const snd_kcontrol_new_t snd_ac97_stac9708_bias_control = {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Sigmatel Output Bias Switch",
+ .info = snd_ac97_info_volsw,
+ .get = snd_ac97_get_volsw,
+ .put = snd_ac97_stac9708_put_bias,
+ .private_value = AC97_SINGLE_VALUE(AC97_SIGMATEL_BIAS2, 4, 1, 0),
+};
+
+static int patch_sigmatel_stac9708_specific(ac97_t *ac97)
+{
+ int err;
+
+ snd_ac97_rename_vol_ctl(ac97, "Headphone Playback", "Sigmatel Surround Playback");
+ if ((err = patch_build_controls(ac97, &snd_ac97_stac9708_bias_control, 1)) < 0)
+ return err;
+ return patch_sigmatel_stac97xx_specific(ac97);
+}
+
+static struct snd_ac97_build_ops patch_sigmatel_stac9708_ops = {
+ .build_3d = patch_sigmatel_stac9708_3d,
+ .build_specific = patch_sigmatel_stac9708_specific
+};
+
+int patch_sigmatel_stac9708(ac97_t * ac97)
+{
+ unsigned int codec72, codec6c;
+
+ ac97->build_ops = &patch_sigmatel_stac9708_ops;
+ ac97->caps |= 0x10; /* HP (sigmatel surround) support */
+
+ codec72 = snd_ac97_read(ac97, AC97_SIGMATEL_BIAS2) & 0x8000;
+ codec6c = snd_ac97_read(ac97, AC97_SIGMATEL_ANALOG);
+
+ if ((codec72==0) && (codec6c==0)) {
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC2, 0x1000);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS1, 0xabba);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS2, 0x0007);
+ } else if ((codec72==0x8000) && (codec6c==0)) {
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC2, 0x1001);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_DAC2INVERT, 0x0008);
+ } else if ((codec72==0x8000) && (codec6c==0x0080)) {
+ /* nothing */
+ }
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_MULTICHN, 0x0000);
+ return 0;
+}
+
+int patch_sigmatel_stac9721(ac97_t * ac97)
+{
+ ac97->build_ops = &patch_sigmatel_stac9700_ops;
+ if (snd_ac97_read(ac97, AC97_SIGMATEL_ANALOG) == 0) {
+ // patch for SigmaTel
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC2, 0x4000);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS1, 0xabba);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS2, 0x0002);
+ }
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_MULTICHN, 0x0000);
+ return 0;
+}
+
+int patch_sigmatel_stac9744(ac97_t * ac97)
+{
+ // patch for SigmaTel
+ ac97->build_ops = &patch_sigmatel_stac9700_ops;
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC2, 0x0000); /* is this correct? --jk */
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS1, 0xabba);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS2, 0x0002);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_MULTICHN, 0x0000);
+ return 0;
+}
+
+int patch_sigmatel_stac9756(ac97_t * ac97)
+{
+ // patch for SigmaTel
+ ac97->build_ops = &patch_sigmatel_stac9700_ops;
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC1, 0xabba);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_CIC2, 0x0000); /* is this correct? --jk */
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS1, 0xabba);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_BIAS2, 0x0002);
+ snd_ac97_write_cache(ac97, AC97_SIGMATEL_MULTICHN, 0x0000);
+ return 0;
+}
+
+static int snd_ac97_stac9758_output_jack_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
+{
+ static char *texts[5] = { "Input/Disabled", "Front Output",
+ "Rear Output", "Center/LFE Output", "Mixer Output" };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 5;
+ if (uinfo->value.enumerated.item > 4)
+ uinfo->value.enumerated.item = 4;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_stac9758_output_jack_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t* ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int shift = kcontrol->private_value;
+ unsigned short val;
+
+ val = ac97->regs[AC97_SIGMATEL_OUTSEL] >> shift;
+ if (!(val & 4))
+ ucontrol->value.enumerated.item[0] = 0;
+ else
+ ucontrol->value.enumerated.item[0] = 1 + (val & 3);
+ return 0;
+}
+
+static int snd_ac97_stac9758_output_jack_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int shift = kcontrol->private_value;
+ unsigned short val;
+
+ if (ucontrol->value.enumerated.item[0] > 4)
+ return -EINVAL;
+ if (ucontrol->value.enumerated.item[0] == 0)
+ val = 0;
+ else
+ val = 4 | (ucontrol->value.enumerated.item[0] - 1);
+ return ac97_update_bits_page(ac97, AC97_SIGMATEL_OUTSEL,
+ 7 << shift, val << shift, 0);
+}
+
+static int snd_ac97_stac9758_input_jack_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
+{
+ static char *texts[7] = { "Mic2 Jack", "Mic1 Jack", "Line In Jack",
+ "Front Jack", "Rear Jack", "Center/LFE Jack", "Mute" };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 7;
+ if (uinfo->value.enumerated.item > 6)
+ uinfo->value.enumerated.item = 6;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_stac9758_input_jack_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t* ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int shift = kcontrol->private_value;
+ unsigned short val;
+
+ val = ac97->regs[AC97_SIGMATEL_INSEL];
+ ucontrol->value.enumerated.item[0] = (val >> shift) & 7;
+ return 0;
+}
+
+static int snd_ac97_stac9758_input_jack_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int shift = kcontrol->private_value;
+
+ return ac97_update_bits_page(ac97, AC97_SIGMATEL_INSEL, 7 << shift,
+ ucontrol->value.enumerated.item[0] << shift, 0);
+}
+
+static int snd_ac97_stac9758_phonesel_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
+{
+ static char *texts[3] = { "None", "Front Jack", "Rear Jack" };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 3;
+ if (uinfo->value.enumerated.item > 2)
+ uinfo->value.enumerated.item = 2;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_stac9758_phonesel_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t* ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+
+ ucontrol->value.enumerated.item[0] = ac97->regs[AC97_SIGMATEL_IOMISC] & 3;
+ return 0;
+}
+
+static int snd_ac97_stac9758_phonesel_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+
+ return ac97_update_bits_page(ac97, AC97_SIGMATEL_IOMISC, 3,
+ ucontrol->value.enumerated.item[0], 0);
+}
+
+#define STAC9758_OUTPUT_JACK(xname, shift) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
+ .info = snd_ac97_stac9758_output_jack_info, \
+ .get = snd_ac97_stac9758_output_jack_get, \
+ .put = snd_ac97_stac9758_output_jack_put, \
+ .private_value = shift }
+#define STAC9758_INPUT_JACK(xname, shift) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
+ .info = snd_ac97_stac9758_input_jack_info, \
+ .get = snd_ac97_stac9758_input_jack_get, \
+ .put = snd_ac97_stac9758_input_jack_put, \
+ .private_value = shift }
+static const snd_kcontrol_new_t snd_ac97_sigmatel_stac9758_controls[] = {
+ STAC9758_OUTPUT_JACK("Mic1 Jack", 1),
+ STAC9758_OUTPUT_JACK("LineIn Jack", 4),
+ STAC9758_OUTPUT_JACK("Front Jack", 7),
+ STAC9758_OUTPUT_JACK("Rear Jack", 10),
+ STAC9758_OUTPUT_JACK("Center/LFE Jack", 13),
+ STAC9758_INPUT_JACK("Mic Input Source", 0),
+ STAC9758_INPUT_JACK("Line Input Source", 8),
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Headphone Amp",
+ .info = snd_ac97_stac9758_phonesel_info,
+ .get = snd_ac97_stac9758_phonesel_get,
+ .put = snd_ac97_stac9758_phonesel_put
+ },
+ AC97_SINGLE("Exchange Center/LFE", AC97_SIGMATEL_IOMISC, 4, 1, 0),
+ AC97_SINGLE("Headphone +3dB Boost", AC97_SIGMATEL_IOMISC, 8, 1, 0)
+};
+
+static int patch_sigmatel_stac9758_specific(ac97_t *ac97)
+{
+ int err;
+
+ err = patch_sigmatel_stac97xx_specific(ac97);
+ if (err < 0)
+ return err;
+ err = patch_build_controls(ac97, snd_ac97_sigmatel_stac9758_controls,
+ ARRAY_SIZE(snd_ac97_sigmatel_stac9758_controls));
+ if (err < 0)
+ return err;
+ /* DAC-A direct */
+ snd_ac97_rename_vol_ctl(ac97, "Headphone Playback", "Front Playback");
+ /* DAC-A to Mix = PCM */
+ /* DAC-B direct = Surround */
+ /* DAC-B to Mix */
+ snd_ac97_rename_vol_ctl(ac97, "Video Playback", "Surround Mix Playback");
+ /* DAC-C direct = Center/LFE */
+
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_sigmatel_stac9758_ops = {
+ .build_3d = patch_sigmatel_stac9700_3d,
+ .build_specific = patch_sigmatel_stac9758_specific
+};
+
+int patch_sigmatel_stac9758(ac97_t * ac97)
+{
+ static unsigned short regs[4] = {
+ AC97_SIGMATEL_OUTSEL,
+ AC97_SIGMATEL_IOMISC,
+ AC97_SIGMATEL_INSEL,
+ AC97_SIGMATEL_VARIOUS
+ };
+ static unsigned short def_regs[4] = {
+ /* OUTSEL */ 0xd794, /* CL:CL, SR:SR, LO:MX, LI:DS, MI:DS */
+ /* IOMISC */ 0x2001,
+ /* INSEL */ 0x0201, /* LI:LI, MI:M1 */
+ /* VARIOUS */ 0x0040
+ };
+ static unsigned short m675_regs[4] = {
+ /* OUTSEL */ 0xfc70, /* CL:MX, SR:MX, LO:DS, LI:MX, MI:DS */
+ /* IOMISC */ 0x2102, /* HP amp on */
+ /* INSEL */ 0x0203, /* LI:LI, MI:FR */
+ /* VARIOUS */ 0x0041 /* stereo mic */
+ };
+ unsigned short *pregs = def_regs;
+ int i;
+
+ /* Gateway M675 notebook */
+ if (ac97->pci &&
+ ac97->subsystem_vendor == 0x107b &&
+ ac97->subsystem_device == 0x0601)
+ pregs = m675_regs;
+
+ // patch for SigmaTel
+ ac97->build_ops = &patch_sigmatel_stac9758_ops;
+ /* FIXME: assume only page 0 for writing cache */
+ snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, AC97_PAGE_VENDOR);
+ for (i = 0; i < 4; i++)
+ snd_ac97_write_cache(ac97, regs[i], pregs[i]);
+
+ ac97->flags |= AC97_STEREO_MUTES;
+ return 0;
+}
+
+/*
+ * Cirrus Logic CS42xx codecs
+ */
+static const snd_kcontrol_new_t snd_ac97_cirrus_controls_spdif[2] = {
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), AC97_CSR_SPDIF, 15, 1, 0),
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "AC97-SPSA", AC97_CSR_ACMODE, 0, 3, 0)
+};
+
+static int patch_cirrus_build_spdif(ac97_t * ac97)
+{
+ int err;
+
+ /* con mask, pro mask, default */
+ if ((err = patch_build_controls(ac97, &snd_ac97_controls_spdif[0], 3)) < 0)
+ return err;
+ /* switch, spsa */
+ if ((err = patch_build_controls(ac97, &snd_ac97_cirrus_controls_spdif[0], 1)) < 0)
+ return err;
+ switch (ac97->id & AC97_ID_CS_MASK) {
+ case AC97_ID_CS4205:
+ if ((err = patch_build_controls(ac97, &snd_ac97_cirrus_controls_spdif[1], 1)) < 0)
+ return err;
+ break;
+ }
+ /* set default PCM S/PDIF params */
+ /* consumer,PCM audio,no copyright,no preemphasis,PCM coder,original,48000Hz */
+ snd_ac97_write_cache(ac97, AC97_CSR_SPDIF, 0x0a20);
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_cirrus_ops = {
+ .build_spdif = patch_cirrus_build_spdif
+};
+
+int patch_cirrus_spdif(ac97_t * ac97)
+{
+ /* Basically, the cs4201/cs4205/cs4297a has non-standard sp/dif registers.
+ WHY CAN'T ANYONE FOLLOW THE BLOODY SPEC? *sigh*
+ - sp/dif EA ID is not set, but sp/dif is always present.
+ - enable/disable is spdif register bit 15.
+ - sp/dif control register is 0x68. differs from AC97:
+ - valid is bit 14 (vs 15)
+ - no DRS
+ - only 44.1/48k [00 = 48, 01=44,1] (AC97 is 00=44.1, 10=48)
+ - sp/dif ssource select is in 0x5e bits 0,1.
+ */
+
+ ac97->build_ops = &patch_cirrus_ops;
+ ac97->flags |= AC97_CS_SPDIF;
+ ac97->rates[AC97_RATES_SPDIF] &= ~SNDRV_PCM_RATE_32000;
+ ac97->ext_id |= AC97_EI_SPDIF; /* force the detection of spdif */
+ snd_ac97_write_cache(ac97, AC97_CSR_ACMODE, 0x0080);
+ return 0;
+}
+
+int patch_cirrus_cs4299(ac97_t * ac97)
+{
+ /* force the detection of PC Beep */
+ ac97->flags |= AC97_HAS_PC_BEEP;
+
+ return patch_cirrus_spdif(ac97);
+}
+
+/*
+ * Conexant codecs
+ */
+static const snd_kcontrol_new_t snd_ac97_conexant_controls_spdif[1] = {
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), AC97_CXR_AUDIO_MISC, 3, 1, 0),
+};
+
+static int patch_conexant_build_spdif(ac97_t * ac97)
+{
+ int err;
+
+ /* con mask, pro mask, default */
+ if ((err = patch_build_controls(ac97, &snd_ac97_controls_spdif[0], 3)) < 0)
+ return err;
+ /* switch */
+ if ((err = patch_build_controls(ac97, &snd_ac97_conexant_controls_spdif[0], 1)) < 0)
+ return err;
+ /* set default PCM S/PDIF params */
+ /* consumer,PCM audio,no copyright,no preemphasis,PCM coder,original,48000Hz */
+ snd_ac97_write_cache(ac97, AC97_CXR_AUDIO_MISC,
+ snd_ac97_read(ac97, AC97_CXR_AUDIO_MISC) & ~(AC97_CXR_SPDIFEN|AC97_CXR_COPYRGT|AC97_CXR_SPDIF_MASK));
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_conexant_ops = {
+ .build_spdif = patch_conexant_build_spdif
+};
+
+int patch_conexant(ac97_t * ac97)
+{
+ ac97->build_ops = &patch_conexant_ops;
+ ac97->flags |= AC97_CX_SPDIF;
+ ac97->ext_id |= AC97_EI_SPDIF; /* force the detection of spdif */
+ ac97->rates[AC97_RATES_SPDIF] = SNDRV_PCM_RATE_48000; /* 48k only */
+ return 0;
+}
+
+/*
+ * Analog Device AD18xx, AD19xx codecs
+ */
+#ifdef CONFIG_PM
+static void ad18xx_resume(ac97_t *ac97)
+{
+ static unsigned short setup_regs[] = {
+ AC97_AD_MISC, AC97_AD_SERIAL_CFG, AC97_AD_JACK_SPDIF,
+ };
+ int i, codec;
+
+ for (i = 0; i < (int)ARRAY_SIZE(setup_regs); i++) {
+ unsigned short reg = setup_regs[i];
+ if (test_bit(reg, ac97->reg_accessed)) {
+ snd_ac97_write(ac97, reg, ac97->regs[reg]);
+ snd_ac97_read(ac97, reg);
+ }
+ }
+
+ if (! (ac97->flags & AC97_AD_MULTI))
+ /* normal restore */
+ snd_ac97_restore_status(ac97);
+ else {
+ /* restore the AD18xx codec configurations */
+ for (codec = 0; codec < 3; codec++) {
+ if (! ac97->spec.ad18xx.id[codec])
+ continue;
+ /* select single codec */
+ snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000,
+ ac97->spec.ad18xx.unchained[codec] | ac97->spec.ad18xx.chained[codec]);
+ ac97->bus->ops->write(ac97, AC97_AD_CODEC_CFG, ac97->spec.ad18xx.codec_cfg[codec]);
+ }
+ /* select all codecs */
+ snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000, 0x7000);
+
+ /* restore status */
+ for (i = 2; i < 0x7c ; i += 2) {
+ if (i == AC97_POWERDOWN || i == AC97_EXTENDED_ID)
+ continue;
+ if (test_bit(i, ac97->reg_accessed)) {
+ /* handle multi codecs for AD18xx */
+ if (i == AC97_PCM) {
+ for (codec = 0; codec < 3; codec++) {
+ if (! ac97->spec.ad18xx.id[codec])
+ continue;
+ /* select single codec */
+ snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000,
+ ac97->spec.ad18xx.unchained[codec] | ac97->spec.ad18xx.chained[codec]);
+ /* update PCM bits */
+ ac97->bus->ops->write(ac97, AC97_PCM, ac97->spec.ad18xx.pcmreg[codec]);
+ }
+ /* select all codecs */
+ snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000, 0x7000);
+ continue;
+ } else if (i == AC97_AD_TEST ||
+ i == AC97_AD_CODEC_CFG ||
+ i == AC97_AD_SERIAL_CFG)
+ continue; /* ignore */
+ }
+ snd_ac97_write(ac97, i, ac97->regs[i]);
+ snd_ac97_read(ac97, i);
+ }
+ }
+
+ snd_ac97_restore_iec958(ac97);
+}
+#endif
+
+int patch_ad1819(ac97_t * ac97)
+{
+ unsigned short scfg;
+
+ // patch for Analog Devices
+ scfg = snd_ac97_read(ac97, AC97_AD_SERIAL_CFG);
+ snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, scfg | 0x7000); /* select all codecs */
+ return 0;
+}
+
+static unsigned short patch_ad1881_unchained(ac97_t * ac97, int idx, unsigned short mask)
+{
+ unsigned short val;
+
+ // test for unchained codec
+ snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000, mask);
+ snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, 0x0000); /* ID0C, ID1C, SDIE = off */
+ val = snd_ac97_read(ac97, AC97_VENDOR_ID2);
+ if ((val & 0xff40) != 0x5340)
+ return 0;
+ ac97->spec.ad18xx.unchained[idx] = mask;
+ ac97->spec.ad18xx.id[idx] = val;
+ ac97->spec.ad18xx.codec_cfg[idx] = 0x0000;
+ return mask;
+}
+
+static int patch_ad1881_chained1(ac97_t * ac97, int idx, unsigned short codec_bits)
+{
+ static int cfg_bits[3] = { 1<<12, 1<<14, 1<<13 };
+ unsigned short val;
+
+ snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000, cfg_bits[idx]);
+ snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, 0x0004); // SDIE
+ val = snd_ac97_read(ac97, AC97_VENDOR_ID2);
+ if ((val & 0xff40) != 0x5340)
+ return 0;
+ if (codec_bits)
+ snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, codec_bits);
+ ac97->spec.ad18xx.chained[idx] = cfg_bits[idx];
+ ac97->spec.ad18xx.id[idx] = val;
+ ac97->spec.ad18xx.codec_cfg[idx] = codec_bits ? codec_bits : 0x0004;
+ return 1;
+}
+
+static void patch_ad1881_chained(ac97_t * ac97, int unchained_idx, int cidx1, int cidx2)
+{
+ // already detected?
+ if (ac97->spec.ad18xx.unchained[cidx1] || ac97->spec.ad18xx.chained[cidx1])
+ cidx1 = -1;
+ if (ac97->spec.ad18xx.unchained[cidx2] || ac97->spec.ad18xx.chained[cidx2])
+ cidx2 = -1;
+ if (cidx1 < 0 && cidx2 < 0)
+ return;
+ // test for chained codecs
+ snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000,
+ ac97->spec.ad18xx.unchained[unchained_idx]);
+ snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, 0x0002); // ID1C
+ ac97->spec.ad18xx.codec_cfg[unchained_idx] = 0x0002;
+ if (cidx1 >= 0) {
+ if (patch_ad1881_chained1(ac97, cidx1, 0x0006)) // SDIE | ID1C
+ patch_ad1881_chained1(ac97, cidx2, 0);
+ else if (patch_ad1881_chained1(ac97, cidx2, 0x0006)) // SDIE | ID1C
+ patch_ad1881_chained1(ac97, cidx1, 0);
+ } else if (cidx2 >= 0) {
+ patch_ad1881_chained1(ac97, cidx2, 0);
+ }
+}
+
+static struct snd_ac97_build_ops patch_ad1881_build_ops = {
+#ifdef CONFIG_PM
+ .resume = ad18xx_resume
+#endif
+};
+
+int patch_ad1881(ac97_t * ac97)
+{
+ static const char cfg_idxs[3][2] = {
+ {2, 1},
+ {0, 2},
+ {0, 1}
+ };
+
+ // patch for Analog Devices
+ unsigned short codecs[3];
+ unsigned short val;
+ int idx, num;
+
+ val = snd_ac97_read(ac97, AC97_AD_SERIAL_CFG);
+ snd_ac97_write_cache(ac97, AC97_AD_SERIAL_CFG, val);
+ codecs[0] = patch_ad1881_unchained(ac97, 0, (1<<12));
+ codecs[1] = patch_ad1881_unchained(ac97, 1, (1<<14));
+ codecs[2] = patch_ad1881_unchained(ac97, 2, (1<<13));
+
+ snd_runtime_check(codecs[0] | codecs[1] | codecs[2], goto __end);
+
+ for (idx = 0; idx < 3; idx++)
+ if (ac97->spec.ad18xx.unchained[idx])
+ patch_ad1881_chained(ac97, idx, cfg_idxs[idx][0], cfg_idxs[idx][1]);
+
+ if (ac97->spec.ad18xx.id[1]) {
+ ac97->flags |= AC97_AD_MULTI;
+ ac97->scaps |= AC97_SCAP_SURROUND_DAC;
+ }
+ if (ac97->spec.ad18xx.id[2]) {
+ ac97->flags |= AC97_AD_MULTI;
+ ac97->scaps |= AC97_SCAP_CENTER_LFE_DAC;
+ }
+
+ __end:
+ /* select all codecs */
+ snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000, 0x7000);
+ /* check if only one codec is present */
+ for (idx = num = 0; idx < 3; idx++)
+ if (ac97->spec.ad18xx.id[idx])
+ num++;
+ if (num == 1) {
+ /* ok, deselect all ID bits */
+ snd_ac97_write_cache(ac97, AC97_AD_CODEC_CFG, 0x0000);
+ ac97->spec.ad18xx.codec_cfg[0] =
+ ac97->spec.ad18xx.codec_cfg[1] =
+ ac97->spec.ad18xx.codec_cfg[2] = 0x0000;
+ }
+ /* required for AD1886/AD1885 combination */
+ ac97->ext_id = snd_ac97_read(ac97, AC97_EXTENDED_ID);
+ if (ac97->spec.ad18xx.id[0]) {
+ ac97->id &= 0xffff0000;
+ ac97->id |= ac97->spec.ad18xx.id[0];
+ }
+ ac97->build_ops = &patch_ad1881_build_ops;
+ return 0;
+}
+
+static const snd_kcontrol_new_t snd_ac97_controls_ad1885[] = {
+ AC97_SINGLE("Digital Mono Direct", AC97_AD_MISC, 11, 1, 0),
+ /* AC97_SINGLE("Digital Audio Mode", AC97_AD_MISC, 12, 1, 0), */ /* seems problematic */
+ AC97_SINGLE("Low Power Mixer", AC97_AD_MISC, 14, 1, 0),
+ AC97_SINGLE("Zero Fill DAC", AC97_AD_MISC, 15, 1, 0),
+ AC97_SINGLE("Headphone Jack Sense", AC97_AD_JACK_SPDIF, 9, 1, 1), /* inverted */
+ AC97_SINGLE("Line Jack Sense", AC97_AD_JACK_SPDIF, 8, 1, 1), /* inverted */
+};
+
+static int patch_ad1885_specific(ac97_t * ac97)
+{
+ int err;
+
+ if ((err = patch_build_controls(ac97, snd_ac97_controls_ad1885, ARRAY_SIZE(snd_ac97_controls_ad1885))) < 0)
+ return err;
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_ad1885_build_ops = {
+ .build_specific = &patch_ad1885_specific,
+#ifdef CONFIG_PM
+ .resume = ad18xx_resume
+#endif
+};
+
+int patch_ad1885(ac97_t * ac97)
+{
+ patch_ad1881(ac97);
+ /* This is required to deal with the Intel D815EEAL2 */
+ /* i.e. Line out is actually headphone out from codec */
+
+ /* set default */
+ snd_ac97_write_cache(ac97, AC97_AD_MISC, 0x0404);
+
+ ac97->build_ops = &patch_ad1885_build_ops;
+ return 0;
+}
+
+int patch_ad1886(ac97_t * ac97)
+{
+ patch_ad1881(ac97);
+ /* Presario700 workaround */
+ /* for Jack Sense/SPDIF Register misetting causing */
+ snd_ac97_write_cache(ac97, AC97_AD_JACK_SPDIF, 0x0010);
+ return 0;
+}
+
+/* MISC bits */
+#define AC97_AD198X_MBC 0x0003 /* mic boost */
+#define AC97_AD198X_MBC_20 0x0000 /* +20dB */
+#define AC97_AD198X_MBC_10 0x0001 /* +10dB */
+#define AC97_AD198X_MBC_30 0x0002 /* +30dB */
+#define AC97_AD198X_VREFD 0x0004 /* VREF high-Z */
+#define AC97_AD198X_VREFH 0x0008 /* 2.25V, 3.7V */
+#define AC97_AD198X_VREF_0 0x000c /* 0V */
+#define AC97_AD198X_SRU 0x0010 /* sample rate unlock */
+#define AC97_AD198X_LOSEL 0x0020 /* LINE_OUT amplifiers input select */
+#define AC97_AD198X_2MIC 0x0040 /* 2-channel mic select */
+#define AC97_AD198X_SPRD 0x0080 /* SPREAD enable */
+#define AC97_AD198X_DMIX0 0x0100 /* downmix mode: 0 = 6-to-4, 1 = 6-to-2 downmix */
+#define AC97_AD198X_DMIX1 0x0200 /* downmix mode: 1 = enabled */
+#define AC97_AD198X_HPSEL 0x0400 /* headphone amplifier input select */
+#define AC97_AD198X_CLDIS 0x0800 /* center/lfe disable */
+#define AC97_AD198X_LODIS 0x1000 /* LINE_OUT disable */
+#define AC97_AD198X_MSPLT 0x2000 /* mute split */
+#define AC97_AD198X_AC97NC 0x4000 /* AC97 no compatible mode */
+#define AC97_AD198X_DACZ 0x8000 /* DAC zero-fill mode */
+
+
+static int snd_ac97_ad198x_spdif_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ static char *texts[2] = { "AC-Link", "A/D Converter" };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 2;
+ if (uinfo->value.enumerated.item > 1)
+ uinfo->value.enumerated.item = 1;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_ad198x_spdif_source_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_AD_SERIAL_CFG];
+ ucontrol->value.enumerated.item[0] = (val >> 2) & 1;
+ return 0;
+}
+
+static int snd_ac97_ad198x_spdif_source_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ if (ucontrol->value.enumerated.item[0] > 1)
+ return -EINVAL;
+ val = ucontrol->value.enumerated.item[0] << 2;
+ return snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x0004, val);
+}
+
+static const snd_kcontrol_new_t snd_ac97_ad198x_spdif_source = {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
+ .info = snd_ac97_ad198x_spdif_source_info,
+ .get = snd_ac97_ad198x_spdif_source_get,
+ .put = snd_ac97_ad198x_spdif_source_put,
+};
+
+static int patch_ad198x_post_spdif(ac97_t * ac97)
+{
+ return patch_build_controls(ac97, &snd_ac97_ad198x_spdif_source, 1);
+}
+
+static const snd_kcontrol_new_t snd_ac97_ad1981x_jack_sense[] = {
+ AC97_SINGLE("Headphone Jack Sense", AC97_AD_JACK_SPDIF, 11, 1, 0),
+ AC97_SINGLE("Line Jack Sense", AC97_AD_JACK_SPDIF, 12, 1, 0),
+};
+
+static int patch_ad1981a_specific(ac97_t * ac97)
+{
+ return patch_build_controls(ac97, snd_ac97_ad1981x_jack_sense,
+ ARRAY_SIZE(snd_ac97_ad1981x_jack_sense));
+}
+
+static struct snd_ac97_build_ops patch_ad1981a_build_ops = {
+ .build_post_spdif = patch_ad198x_post_spdif,
+ .build_specific = patch_ad1981a_specific,
+#ifdef CONFIG_PM
+ .resume = ad18xx_resume
+#endif
+};
+
+static void check_ad1981_hp_jack_sense(ac97_t *ac97)
+{
+ u32 subid = ((u32)ac97->subsystem_vendor << 16) | ac97->subsystem_device;
+ switch (subid) {
+ case 0x103c0890: /* HP nc6000 */
+ case 0x103c006d: /* HP nx9105 */
+ case 0x17340088: /* FSC Scenic-W */
+ /* enable headphone jack sense */
+ snd_ac97_update_bits(ac97, AC97_AD_JACK_SPDIF, 1<<11, 1<<11);
+ break;
+ }
+}
+
+int patch_ad1981a(ac97_t *ac97)
+{
+ patch_ad1881(ac97);
+ ac97->build_ops = &patch_ad1981a_build_ops;
+ snd_ac97_update_bits(ac97, AC97_AD_MISC, AC97_AD198X_MSPLT, AC97_AD198X_MSPLT);
+ ac97->flags |= AC97_STEREO_MUTES;
+ check_ad1981_hp_jack_sense(ac97);
+ return 0;
+}
+
+static const snd_kcontrol_new_t snd_ac97_ad198x_2cmic =
+AC97_SINGLE("Stereo Mic", AC97_AD_MISC, 6, 1, 0);
+
+static int patch_ad1981b_specific(ac97_t *ac97)
+{
+ int err;
+
+ if ((err = patch_build_controls(ac97, &snd_ac97_ad198x_2cmic, 1)) < 0)
+ return err;
+ return patch_build_controls(ac97, snd_ac97_ad1981x_jack_sense,
+ ARRAY_SIZE(snd_ac97_ad1981x_jack_sense));
+}
+
+static struct snd_ac97_build_ops patch_ad1981b_build_ops = {
+ .build_post_spdif = patch_ad198x_post_spdif,
+ .build_specific = patch_ad1981b_specific,
+#ifdef CONFIG_PM
+ .resume = ad18xx_resume
+#endif
+};
+
+int patch_ad1981b(ac97_t *ac97)
+{
+ patch_ad1881(ac97);
+ ac97->build_ops = &patch_ad1981b_build_ops;
+ snd_ac97_update_bits(ac97, AC97_AD_MISC, AC97_AD198X_MSPLT, AC97_AD198X_MSPLT);
+ ac97->flags |= AC97_STEREO_MUTES;
+ check_ad1981_hp_jack_sense(ac97);
+ return 0;
+}
+
+static int snd_ac97_ad1888_lohpsel_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
+ uinfo->count = 1;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = 1;
+ return 0;
+}
+
+static int snd_ac97_ad1888_lohpsel_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t* ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_AD_MISC];
+ ucontrol->value.integer.value[0] = !(val & AC97_AD198X_LOSEL);
+ return 0;
+}
+
+static int snd_ac97_ad1888_lohpsel_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = !ucontrol->value.integer.value[0]
+ ? (AC97_AD198X_LOSEL | AC97_AD198X_HPSEL) : 0;
+ return snd_ac97_update_bits(ac97, AC97_AD_MISC,
+ AC97_AD198X_LOSEL | AC97_AD198X_HPSEL, val);
+}
+
+static int snd_ac97_ad1888_downmix_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
+{
+ static char *texts[3] = {"Off", "6 -> 4", "6 -> 2"};
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 3;
+ if (uinfo->value.enumerated.item > 2)
+ uinfo->value.enumerated.item = 2;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_ad1888_downmix_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t* ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_AD_MISC];
+ if (!(val & AC97_AD198X_DMIX1))
+ ucontrol->value.enumerated.item[0] = 0;
+ else
+ ucontrol->value.enumerated.item[0] = 1 + ((val >> 8) & 1);
+ return 0;
+}
+
+static int snd_ac97_ad1888_downmix_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ if (ucontrol->value.enumerated.item[0] > 2)
+ return -EINVAL;
+ if (ucontrol->value.enumerated.item[0] == 0)
+ val = 0;
+ else
+ val = AC97_AD198X_DMIX1 |
+ ((ucontrol->value.enumerated.item[0] - 1) << 8);
+ return snd_ac97_update_bits(ac97, AC97_AD_MISC,
+ AC97_AD198X_DMIX0 | AC97_AD198X_DMIX1, val);
+}
+
+static const snd_kcontrol_new_t snd_ac97_ad1888_controls[] = {
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Exchange Front/Surround",
+ .info = snd_ac97_ad1888_lohpsel_info,
+ .get = snd_ac97_ad1888_lohpsel_get,
+ .put = snd_ac97_ad1888_lohpsel_put
+ },
+ AC97_SINGLE("Spread Front to Surround and Center/LFE", AC97_AD_MISC, 7, 1, 0),
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Downmix",
+ .info = snd_ac97_ad1888_downmix_info,
+ .get = snd_ac97_ad1888_downmix_get,
+ .put = snd_ac97_ad1888_downmix_put
+ },
+ AC97_SINGLE("Surround Jack as Input", AC97_AD_MISC, 12, 1, 0),
+ AC97_SINGLE("Center/LFE Jack as Input", AC97_AD_MISC, 11, 1, 0),
+};
+
+static int patch_ad1888_specific(ac97_t *ac97)
+{
+ /* rename 0x04 as "Master" and 0x02 as "Master Surround" */
+ snd_ac97_rename_vol_ctl(ac97, "Master Playback", "Master Surround Playback");
+ snd_ac97_rename_vol_ctl(ac97, "Headphone Playback", "Master Playback");
+ return patch_build_controls(ac97, snd_ac97_ad1888_controls, ARRAY_SIZE(snd_ac97_ad1888_controls));
+}
+
+static struct snd_ac97_build_ops patch_ad1888_build_ops = {
+ .build_post_spdif = patch_ad198x_post_spdif,
+ .build_specific = patch_ad1888_specific,
+#ifdef CONFIG_PM
+ .resume = ad18xx_resume
+#endif
+};
+
+int patch_ad1888(ac97_t * ac97)
+{
+ unsigned short misc;
+
+ patch_ad1881(ac97);
+ ac97->build_ops = &patch_ad1888_build_ops;
+ /* Switch FRONT/SURROUND LINE-OUT/HP-OUT default connection */
+ /* it seems that most vendors connect line-out connector to headphone out of AC'97 */
+ /* AD-compatible mode */
+ /* Stereo mutes enabled */
+ misc = snd_ac97_read(ac97, AC97_AD_MISC);
+ snd_ac97_write_cache(ac97, AC97_AD_MISC, misc |
+ AC97_AD198X_LOSEL |
+ AC97_AD198X_HPSEL |
+ AC97_AD198X_MSPLT |
+ AC97_AD198X_AC97NC);
+ ac97->flags |= AC97_STEREO_MUTES;
+ return 0;
+}
+
+static int patch_ad1980_specific(ac97_t *ac97)
+{
+ int err;
+
+ if ((err = patch_ad1888_specific(ac97)) < 0)
+ return err;
+ return patch_build_controls(ac97, &snd_ac97_ad198x_2cmic, 1);
+}
+
+static struct snd_ac97_build_ops patch_ad1980_build_ops = {
+ .build_post_spdif = patch_ad198x_post_spdif,
+ .build_specific = patch_ad1980_specific,
+#ifdef CONFIG_PM
+ .resume = ad18xx_resume
+#endif
+};
+
+int patch_ad1980(ac97_t * ac97)
+{
+ patch_ad1888(ac97);
+ ac97->build_ops = &patch_ad1980_build_ops;
+ return 0;
+}
+
+static const snd_kcontrol_new_t snd_ac97_ad1985_controls[] = {
+ AC97_SINGLE("Center/LFE Jack as Mic", AC97_AD_SERIAL_CFG, 9, 1, 0),
+ AC97_SINGLE("Exchange Center/LFE", AC97_AD_SERIAL_CFG, 3, 1, 0)
+};
+
+static int patch_ad1985_specific(ac97_t *ac97)
+{
+ int err;
+
+ if ((err = patch_ad1980_specific(ac97)) < 0)
+ return err;
+ return patch_build_controls(ac97, snd_ac97_ad1985_controls, ARRAY_SIZE(snd_ac97_ad1985_controls));
+}
+
+static struct snd_ac97_build_ops patch_ad1985_build_ops = {
+ .build_post_spdif = patch_ad198x_post_spdif,
+ .build_specific = patch_ad1985_specific,
+#ifdef CONFIG_PM
+ .resume = ad18xx_resume
+#endif
+};
+
+int patch_ad1985(ac97_t * ac97)
+{
+ unsigned short misc;
+
+ patch_ad1881(ac97);
+ ac97->build_ops = &patch_ad1985_build_ops;
+ misc = snd_ac97_read(ac97, AC97_AD_MISC);
+ /* switch front/surround line-out/hp-out */
+ /* center/LFE, mic in 3.75V mode */
+ /* AD-compatible mode */
+ /* Stereo mutes enabled */
+ /* in accordance with ADI driver: misc | 0x5c28 */
+ snd_ac97_write_cache(ac97, AC97_AD_MISC, misc |
+ AC97_AD198X_VREFH |
+ AC97_AD198X_LOSEL |
+ AC97_AD198X_HPSEL |
+ AC97_AD198X_CLDIS |
+ AC97_AD198X_LODIS |
+ AC97_AD198X_MSPLT |
+ AC97_AD198X_AC97NC);
+ ac97->flags |= AC97_STEREO_MUTES;
+ /* on AD1985 rev. 3, AC'97 revision bits are zero */
+ ac97->ext_id = (ac97->ext_id & ~AC97_EI_REV_MASK) | AC97_EI_REV_23;
+ return 0;
+}
+
+/*
+ * realtek ALC65x/850 codecs
+ */
+static int snd_ac97_alc650_mic_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ ucontrol->value.integer.value[0] = (ac97->regs[AC97_ALC650_MULTICH] >> 10) & 1;
+ return 0;
+}
+
+static int snd_ac97_alc650_mic_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ int change, val;
+ val = !!(snd_ac97_read(ac97, AC97_ALC650_MULTICH) & (1 << 10));
+ change = (ucontrol->value.integer.value[0] != val);
+ if (change) {
+ /* disable/enable vref */
+ snd_ac97_update_bits(ac97, AC97_ALC650_CLOCK, 1 << 12,
+ ucontrol->value.integer.value[0] ? (1 << 12) : 0);
+ /* turn on/off center-on-mic */
+ snd_ac97_update_bits(ac97, AC97_ALC650_MULTICH, 1 << 10,
+ ucontrol->value.integer.value[0] ? (1 << 10) : 0);
+ /* GPIO0 high for mic */
+ snd_ac97_update_bits(ac97, AC97_ALC650_GPIO_STATUS, 0x100,
+ ucontrol->value.integer.value[0] ? 0 : 0x100);
+ }
+ return change;
+}
+
+static const snd_kcontrol_new_t snd_ac97_controls_alc650[] = {
+ AC97_SINGLE("Duplicate Front", AC97_ALC650_MULTICH, 0, 1, 0),
+ AC97_SINGLE("Surround Down Mix", AC97_ALC650_MULTICH, 1, 1, 0),
+ AC97_SINGLE("Center/LFE Down Mix", AC97_ALC650_MULTICH, 2, 1, 0),
+ AC97_SINGLE("Exchange Center/LFE", AC97_ALC650_MULTICH, 3, 1, 0),
+ /* 4: Analog Input To Surround */
+ /* 5: Analog Input To Center/LFE */
+ /* 6: Independent Master Volume Right */
+ /* 7: Independent Master Volume Left */
+ /* 8: reserved */
+ AC97_SINGLE("Line-In As Surround", AC97_ALC650_MULTICH, 9, 1, 0),
+ /* 10: mic, see below */
+ /* 11-13: in IEC958 controls */
+ AC97_SINGLE("Swap Surround Slot", AC97_ALC650_MULTICH, 14, 1, 0),
+#if 0 /* always set in patch_alc650 */
+ AC97_SINGLE("IEC958 Input Clock Enable", AC97_ALC650_CLOCK, 0, 1, 0),
+ AC97_SINGLE("IEC958 Input Pin Enable", AC97_ALC650_CLOCK, 1, 1, 0),
+ AC97_SINGLE("Surround DAC Switch", AC97_ALC650_SURR_DAC_VOL, 15, 1, 1),
+ AC97_DOUBLE("Surround DAC Volume", AC97_ALC650_SURR_DAC_VOL, 8, 0, 31, 1),
+ AC97_SINGLE("Center/LFE DAC Switch", AC97_ALC650_LFE_DAC_VOL, 15, 1, 1),
+ AC97_DOUBLE("Center/LFE DAC Volume", AC97_ALC650_LFE_DAC_VOL, 8, 0, 31, 1),
+#endif
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Mic As Center/LFE",
+ .info = snd_ac97_info_volsw,
+ .get = snd_ac97_alc650_mic_get,
+ .put = snd_ac97_alc650_mic_put,
+ .private_value = AC97_SINGLE_VALUE(0, 0, 1, 0) /* only mask needed */
+ },
+};
+
+static const snd_kcontrol_new_t snd_ac97_spdif_controls_alc650[] = {
+ AC97_SINGLE("IEC958 Capture Switch", AC97_ALC650_MULTICH, 11, 1, 0),
+ AC97_SINGLE("Analog to IEC958 Output", AC97_ALC650_MULTICH, 12, 1, 0),
+ /* disable this controls since it doesn't work as expected */
+ /* AC97_SINGLE("IEC958 Input Monitor", AC97_ALC650_MULTICH, 13, 1, 0), */
+};
+
+static int patch_alc650_specific(ac97_t * ac97)
+{
+ int err;
+
+ if ((err = patch_build_controls(ac97, snd_ac97_controls_alc650, ARRAY_SIZE(snd_ac97_controls_alc650))) < 0)
+ return err;
+ if (ac97->ext_id & AC97_EI_SPDIF) {
+ if ((err = patch_build_controls(ac97, snd_ac97_spdif_controls_alc650, ARRAY_SIZE(snd_ac97_spdif_controls_alc650))) < 0)
+ return err;
+ }
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_alc650_ops = {
+ .build_specific = patch_alc650_specific
+};
+
+int patch_alc650(ac97_t * ac97)
+{
+ unsigned short val;
+
+ ac97->build_ops = &patch_alc650_ops;
+
+ /* determine the revision */
+ val = snd_ac97_read(ac97, AC97_ALC650_REVISION) & 0x3f;
+ if (val < 3)
+ ac97->id = 0x414c4720; /* Old version */
+ else if (val < 0x10)
+ ac97->id = 0x414c4721; /* D version */
+ else if (val < 0x20)
+ ac97->id = 0x414c4722; /* E version */
+ else if (val < 0x30)
+ ac97->id = 0x414c4723; /* F version */
+
+ /* revision E or F */
+ /* FIXME: what about revision D ? */
+ ac97->spec.dev_flags = (ac97->id == 0x414c4722 ||
+ ac97->id == 0x414c4723);
+
+ /* enable AC97_ALC650_GPIO_SETUP, AC97_ALC650_CLOCK for R/W */
+ snd_ac97_write_cache(ac97, AC97_ALC650_GPIO_STATUS,
+ snd_ac97_read(ac97, AC97_ALC650_GPIO_STATUS) | 0x8000);
+
+ /* Enable SPDIF-IN only on Rev.E and above */
+ val = snd_ac97_read(ac97, AC97_ALC650_CLOCK);
+ /* SPDIF IN with pin 47 */
+ if (ac97->spec.dev_flags)
+ val |= 0x03; /* enable */
+ else
+ val &= ~0x03; /* disable */
+ snd_ac97_write_cache(ac97, AC97_ALC650_CLOCK, val);
+
+ /* set default: slot 3,4,7,8,6,9
+ spdif-in monitor off, analog-spdif off, spdif-in off
+ center on mic off, surround on line-in off
+ downmix off, duplicate front off
+ */
+ snd_ac97_write_cache(ac97, AC97_ALC650_MULTICH, 0);
+
+ /* set GPIO0 for mic bias */
+ /* GPIO0 pin output, no interrupt, high */
+ snd_ac97_write_cache(ac97, AC97_ALC650_GPIO_SETUP,
+ snd_ac97_read(ac97, AC97_ALC650_GPIO_SETUP) | 0x01);
+ snd_ac97_write_cache(ac97, AC97_ALC650_GPIO_STATUS,
+ (snd_ac97_read(ac97, AC97_ALC650_GPIO_STATUS) | 0x100) & ~0x10);
+
+ /* full DAC volume */
+ snd_ac97_write_cache(ac97, AC97_ALC650_SURR_DAC_VOL, 0x0808);
+ snd_ac97_write_cache(ac97, AC97_ALC650_LFE_DAC_VOL, 0x0808);
+ return 0;
+}
+
+static int snd_ac97_alc655_mic_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ ucontrol->value.integer.value[0] = (ac97->regs[AC97_ALC650_MULTICH] >> 10) & 1;
+ return 0;
+}
+
+static int snd_ac97_alc655_mic_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+
+ /* misc control; vrefout disable */
+ snd_ac97_update_bits(ac97, AC97_ALC650_CLOCK, 1 << 12,
+ ucontrol->value.integer.value[0] ? (1 << 12) : 0);
+ return ac97_update_bits_page(ac97, AC97_ALC650_MULTICH, 1 << 10,
+ ucontrol->value.integer.value[0] ? (1 << 10) : 0,
+ 0);
+}
+
+
+static const snd_kcontrol_new_t snd_ac97_controls_alc655[] = {
+ AC97_PAGE_SINGLE("Duplicate Front", AC97_ALC650_MULTICH, 0, 1, 0, 0),
+ AC97_PAGE_SINGLE("Line-In As Surround", AC97_ALC650_MULTICH, 9, 1, 0, 0),
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Mic As Center/LFE",
+ .info = snd_ac97_info_volsw,
+ .get = snd_ac97_alc655_mic_get,
+ .put = snd_ac97_alc655_mic_put,
+ .private_value = AC97_SINGLE_VALUE(0, 0, 1, 0) /* only mask needed */
+ },
+};
+
+static int alc655_iec958_route_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
+{
+ static char *texts_655[3] = { "PCM", "Analog In", "IEC958 In" };
+ static char *texts_658[4] = { "PCM", "Analog1 In", "Analog2 In", "IEC958 In" };
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = ac97->spec.dev_flags ? 4 : 3;
+ if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
+ uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
+ strcpy(uinfo->value.enumerated.name,
+ ac97->spec.dev_flags ?
+ texts_658[uinfo->value.enumerated.item] :
+ texts_655[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int alc655_iec958_route_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_ALC650_MULTICH];
+ val = (val >> 12) & 3;
+ if (ac97->spec.dev_flags && val == 3)
+ val = 0;
+ ucontrol->value.enumerated.item[0] = val;
+ return 0;
+}
+
+static int alc655_iec958_route_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t *ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+
+ return ac97_update_bits_page(ac97, AC97_ALC650_MULTICH, 3 << 12,
+ (unsigned short)ucontrol->value.enumerated.item[0] << 12,
+ 0);
+}
+
+static const snd_kcontrol_new_t snd_ac97_spdif_controls_alc655[] = {
+ AC97_PAGE_SINGLE("IEC958 Capture Switch", AC97_ALC650_MULTICH, 11, 1, 0, 0),
+ /* disable this controls since it doesn't work as expected */
+ /* AC97_PAGE_SINGLE("IEC958 Input Monitor", AC97_ALC650_MULTICH, 14, 1, 0, 0), */
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "IEC958 Playback Route",
+ .info = alc655_iec958_route_info,
+ .get = alc655_iec958_route_get,
+ .put = alc655_iec958_route_put,
+ },
+};
+
+static int patch_alc655_specific(ac97_t * ac97)
+{
+ int err;
+
+ if ((err = patch_build_controls(ac97, snd_ac97_controls_alc655, ARRAY_SIZE(snd_ac97_controls_alc655))) < 0)
+ return err;
+ if (ac97->ext_id & AC97_EI_SPDIF) {
+ if ((err = patch_build_controls(ac97, snd_ac97_spdif_controls_alc655, ARRAY_SIZE(snd_ac97_spdif_controls_alc655))) < 0)
+ return err;
+ }
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_alc655_ops = {
+ .build_specific = patch_alc655_specific
+};
+
+int patch_alc655(ac97_t * ac97)
+{
+ unsigned int val;
+
+ ac97->spec.dev_flags = (ac97->id == 0x414c4780); /* ALC658 */
+
+ ac97->build_ops = &patch_alc655_ops;
+
+ /* assume only page 0 for writing cache */
+ snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, AC97_PAGE_VENDOR);
+
+ /* adjust default values */
+ val = snd_ac97_read(ac97, 0x7a); /* misc control */
+ if (ac97->id == 0x414c4780) /* ALC658 */
+ val &= ~(1 << 1); /* Pin 47 is spdif input pin */
+ else /* ALC655 */
+ val |= (1 << 1); /* Pin 47 is spdif input pin */
+ val &= ~(1 << 12); /* vref enable */
+ snd_ac97_write_cache(ac97, 0x7a, val);
+ /* set default: spdif-in enabled,
+ spdif-in monitor off, spdif-in PCM off
+ center on mic off, surround on line-in off
+ duplicate front off
+ */
+ snd_ac97_write_cache(ac97, AC97_ALC650_MULTICH, 1<<15);
+
+ /* full DAC volume */
+ snd_ac97_write_cache(ac97, AC97_ALC650_SURR_DAC_VOL, 0x0808);
+ snd_ac97_write_cache(ac97, AC97_ALC650_LFE_DAC_VOL, 0x0808);
+ return 0;
+}
+
+
+#define AC97_ALC850_JACK_SELECT 0x76
+#define AC97_ALC850_MISC1 0x7a
+
+static int ac97_alc850_surround_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ ucontrol->value.integer.value[0] = ((ac97->regs[AC97_ALC850_JACK_SELECT] >> 12) & 7) == 2;
+ return 0;
+}
+
+static int ac97_alc850_surround_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+
+ /* SURR 1kOhm (bit4), Amp (bit5) */
+ snd_ac97_update_bits(ac97, AC97_ALC850_MISC1, (1<<4)|(1<<5),
+ ucontrol->value.integer.value[0] ? (1<<5) : (1<<4));
+ /* LINE-IN = 0, SURROUND = 2 */
+ return snd_ac97_update_bits(ac97, AC97_ALC850_JACK_SELECT, 7 << 12,
+ ucontrol->value.integer.value[0] ? (2<<12) : (0<<12));
+}
+
+static int ac97_alc850_mic_get(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ ucontrol->value.integer.value[0] = ((ac97->regs[AC97_ALC850_JACK_SELECT] >> 4) & 7) == 2;
+ return 0;
+}
+
+static int ac97_alc850_mic_put(snd_kcontrol_t *kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+
+ /* Vref disable (bit12), 1kOhm (bit13) */
+ snd_ac97_update_bits(ac97, AC97_ALC850_MISC1, (1<<12)|(1<<13),
+ ucontrol->value.integer.value[0] ? (1<<12) : (1<<13));
+ /* MIC-IN = 1, CENTER-LFE = 2 */
+ return snd_ac97_update_bits(ac97, AC97_ALC850_JACK_SELECT, 7 << 4,
+ ucontrol->value.integer.value[0] ? (2<<4) : (1<<4));
+}
+
+static const snd_kcontrol_new_t snd_ac97_controls_alc850[] = {
+ AC97_PAGE_SINGLE("Duplicate Front", AC97_ALC650_MULTICH, 0, 1, 0, 0),
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Line-In As Surround",
+ .info = snd_ac97_info_volsw,
+ .get = ac97_alc850_surround_get,
+ .put = ac97_alc850_surround_put,
+ .private_value = AC97_SINGLE_VALUE(0, 0, 1, 0) /* only mask needed */
+ },
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Mic As Center/LFE",
+ .info = snd_ac97_info_volsw,
+ .get = ac97_alc850_mic_get,
+ .put = ac97_alc850_mic_put,
+ .private_value = AC97_SINGLE_VALUE(0, 0, 1, 0) /* only mask needed */
+ },
+
+};
+
+static int patch_alc850_specific(ac97_t *ac97)
+{
+ int err;
+
+ if ((err = patch_build_controls(ac97, snd_ac97_controls_alc850, ARRAY_SIZE(snd_ac97_controls_alc850))) < 0)
+ return err;
+ if (ac97->ext_id & AC97_EI_SPDIF) {
+ if ((err = patch_build_controls(ac97, snd_ac97_spdif_controls_alc655, ARRAY_SIZE(snd_ac97_spdif_controls_alc655))) < 0)
+ return err;
+ }
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_alc850_ops = {
+ .build_specific = patch_alc850_specific
+};
+
+int patch_alc850(ac97_t *ac97)
+{
+ ac97->build_ops = &patch_alc850_ops;
+
+ ac97->spec.dev_flags = 0; /* for IEC958 playback route - ALC655 compatible */
+
+ /* assume only page 0 for writing cache */
+ snd_ac97_update_bits(ac97, AC97_INT_PAGING, AC97_PAGE_MASK, AC97_PAGE_VENDOR);
+
+ /* adjust default values */
+ /* set default: spdif-in enabled,
+ spdif-in monitor off, spdif-in PCM off
+ center on mic off, surround on line-in off
+ duplicate front off
+ */
+ snd_ac97_write_cache(ac97, AC97_ALC650_MULTICH, 1<<15);
+ /* SURR_OUT: on, Surr 1kOhm: on, Surr Amp: off, Front 1kOhm: off
+ * Front Amp: on, Vref: enable, Center 1kOhm: on, Mix: on
+ */
+ snd_ac97_write_cache(ac97, 0x7a, (1<<1)|(1<<4)|(0<<5)|(1<<6)|
+ (1<<7)|(0<<12)|(1<<13)|(0<<14));
+ /* detection UIO2,3: all path floating, UIO3: MIC, Vref2: disable,
+ * UIO1: FRONT, Vref3: disable, UIO3: LINE, Front-Mic: mute
+ */
+ snd_ac97_write_cache(ac97, 0x76, (0<<0)|(0<<2)|(1<<4)|(1<<7)|(2<<8)|
+ (1<<11)|(0<<12)|(1<<15));
+
+ /* full DAC volume */
+ snd_ac97_write_cache(ac97, AC97_ALC650_SURR_DAC_VOL, 0x0808);
+ snd_ac97_write_cache(ac97, AC97_ALC650_LFE_DAC_VOL, 0x0808);
+ return 0;
+}
+
+
+/*
+ * C-Media CM97xx codecs
+ */
+static const snd_kcontrol_new_t snd_ac97_cm9738_controls[] = {
+ AC97_SINGLE("Line-In As Surround", AC97_CM9738_VENDOR_CTRL, 10, 1, 0),
+ AC97_SINGLE("Duplicate Front", AC97_CM9738_VENDOR_CTRL, 13, 1, 0),
+};
+
+static int patch_cm9738_specific(ac97_t * ac97)
+{
+ return patch_build_controls(ac97, snd_ac97_cm9738_controls, ARRAY_SIZE(snd_ac97_cm9738_controls));
+}
+
+static struct snd_ac97_build_ops patch_cm9738_ops = {
+ .build_specific = patch_cm9738_specific
+};
+
+int patch_cm9738(ac97_t * ac97)
+{
+ ac97->build_ops = &patch_cm9738_ops;
+ /* FIXME: can anyone confirm below? */
+ /* CM9738 has no PCM volume although the register reacts */
+ ac97->flags |= AC97_HAS_NO_PCM_VOL;
+ snd_ac97_write_cache(ac97, AC97_PCM, 0x8000);
+
+ return 0;
+}
+
+static int snd_ac97_cmedia_spdif_playback_source_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ static char *texts[] = { "Analog", "Digital" };
+
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
+ uinfo->count = 1;
+ uinfo->value.enumerated.items = 2;
+ if (uinfo->value.enumerated.item > 1)
+ uinfo->value.enumerated.item = 1;
+ strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
+ return 0;
+}
+
+static int snd_ac97_cmedia_spdif_playback_source_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short val;
+
+ val = ac97->regs[AC97_CM9739_SPDIF_CTRL];
+ ucontrol->value.enumerated.item[0] = (val >> 1) & 0x01;
+ return 0;
+}
+
+static int snd_ac97_cmedia_spdif_playback_source_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+
+ return snd_ac97_update_bits(ac97, AC97_CM9739_SPDIF_CTRL,
+ 0x01 << 1,
+ (ucontrol->value.enumerated.item[0] & 0x01) << 1);
+}
+
+static const snd_kcontrol_new_t snd_ac97_cm9739_controls_spdif[] = {
+ /* BIT 0: SPDI_EN - always true */
+ { /* BIT 1: SPDIFS */
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Source",
+ .info = snd_ac97_cmedia_spdif_playback_source_info,
+ .get = snd_ac97_cmedia_spdif_playback_source_get,
+ .put = snd_ac97_cmedia_spdif_playback_source_put,
+ },
+ /* BIT 2: IG_SPIV */
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Valid Switch", AC97_CM9739_SPDIF_CTRL, 2, 1, 0),
+ /* BIT 3: SPI2F */
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Monitor", AC97_CM9739_SPDIF_CTRL, 3, 1, 0),
+ /* BIT 4: SPI2SDI */
+ AC97_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), AC97_CM9739_SPDIF_CTRL, 4, 1, 0),
+ /* BIT 8: SPD32 - 32bit SPDIF - not supported yet */
+};
+
+static int snd_ac97_cm9739_center_mic_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ if (ac97->regs[AC97_CM9739_MULTI_CHAN] & 0x1000)
+ ucontrol->value.integer.value[0] = 1;
+ else
+ ucontrol->value.integer.value[0] = 0;
+ return 0;
+}
+
+static int snd_ac97_cm9739_center_mic_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ return snd_ac97_update_bits(ac97, AC97_CM9739_MULTI_CHAN, 0x3000,
+ ucontrol->value.integer.value[0] ?
+ 0x1000 : 0x2000);
+}
+
+static const snd_kcontrol_new_t snd_ac97_cm9739_controls[] = {
+ AC97_SINGLE("Line-In As Surround", AC97_CM9739_MULTI_CHAN, 10, 1, 0),
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Mic As Center/LFE",
+ .info = snd_ac97_info_volsw,
+ .get = snd_ac97_cm9739_center_mic_get,
+ .put = snd_ac97_cm9739_center_mic_put,
+ .private_value = AC97_SINGLE_VALUE(0, 0, 1, 0) /* only mask needed */
+ },
+};
+
+static int patch_cm9739_specific(ac97_t * ac97)
+{
+ return patch_build_controls(ac97, snd_ac97_cm9739_controls, ARRAY_SIZE(snd_ac97_cm9739_controls));
+}
+
+static int patch_cm9739_post_spdif(ac97_t * ac97)
+{
+ return patch_build_controls(ac97, snd_ac97_cm9739_controls_spdif, ARRAY_SIZE(snd_ac97_cm9739_controls_spdif));
+}
+
+static struct snd_ac97_build_ops patch_cm9739_ops = {
+ .build_specific = patch_cm9739_specific,
+ .build_post_spdif = patch_cm9739_post_spdif
+};
+
+int patch_cm9739(ac97_t * ac97)
+{
+ unsigned short val;
+
+ ac97->build_ops = &patch_cm9739_ops;
+
+ /* CM9739/A has no Master and PCM volume although the register reacts */
+ ac97->flags |= AC97_HAS_NO_MASTER_VOL | AC97_HAS_NO_PCM_VOL;
+ snd_ac97_write_cache(ac97, AC97_MASTER, 0x8000);
+ snd_ac97_write_cache(ac97, AC97_PCM, 0x8000);
+
+ /* check spdif */
+ val = snd_ac97_read(ac97, AC97_EXTENDED_STATUS);
+ if (val & AC97_EA_SPCV) {
+ /* enable spdif in */
+ snd_ac97_write_cache(ac97, AC97_CM9739_SPDIF_CTRL,
+ snd_ac97_read(ac97, AC97_CM9739_SPDIF_CTRL) | 0x01);
+ ac97->rates[AC97_RATES_SPDIF] = SNDRV_PCM_RATE_48000; /* 48k only */
+ } else {
+ ac97->ext_id &= ~AC97_EI_SPDIF; /* disable extended-id */
+ ac97->rates[AC97_RATES_SPDIF] = 0;
+ }
+
+ /* set-up multi channel */
+ /* bit 14: 0 = SPDIF, 1 = EAPD */
+ /* bit 13: enable internal vref output for mic */
+ /* bit 12: disable center/lfe (swithable) */
+ /* bit 10: disable surround/line (switchable) */
+ /* bit 9: mix 2 surround off */
+ /* bit 4: undocumented; 0 mutes the CM9739A, which defaults to 1 */
+ /* bit 3: undocumented; surround? */
+ /* bit 0: dB */
+ val = snd_ac97_read(ac97, AC97_CM9739_MULTI_CHAN) & (1 << 4);
+ val |= (1 << 3);
+ val |= (1 << 13);
+ if (! (ac97->ext_id & AC97_EI_SPDIF))
+ val |= (1 << 14);
+ snd_ac97_write_cache(ac97, AC97_CM9739_MULTI_CHAN, val);
+
+ /* FIXME: set up GPIO */
+ snd_ac97_write_cache(ac97, 0x70, 0x0100);
+ snd_ac97_write_cache(ac97, 0x72, 0x0020);
+ /* Special exception for ASUS W1000/CMI9739. It does not have an SPDIF in. */
+ if (ac97->pci &&
+ ac97->subsystem_vendor == 0x1043 &&
+ ac97->subsystem_device == 0x1843) {
+ snd_ac97_write_cache(ac97, AC97_CM9739_SPDIF_CTRL,
+ snd_ac97_read(ac97, AC97_CM9739_SPDIF_CTRL) & ~0x01);
+ snd_ac97_write_cache(ac97, AC97_CM9739_MULTI_CHAN,
+ snd_ac97_read(ac97, AC97_CM9739_MULTI_CHAN) | (1 << 14));
+ }
+
+ return 0;
+}
+
+#define AC97_CM9761_MULTI_CHAN 0x64
+#define AC97_CM9761_SPDIF_CTRL 0x6c
+
+static int snd_ac97_cm9761_linein_rear_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ if (ac97->regs[AC97_CM9739_MULTI_CHAN] & 0x0400)
+ ucontrol->value.integer.value[0] = 1;
+ else
+ ucontrol->value.integer.value[0] = 0;
+ return 0;
+}
+
+static int snd_ac97_cm9761_linein_rear_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short vals[2][2] = {
+ { 0x0008, 0x0400 }, /* off, on */
+ { 0x0000, 0x0408 }, /* off, on (9761-82 rev.B) */
+ };
+ return snd_ac97_update_bits(ac97, AC97_CM9739_MULTI_CHAN, 0x0408,
+ vals[ac97->spec.dev_flags][!!ucontrol->value.integer.value[0]]);
+}
+
+static int snd_ac97_cm9761_center_mic_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ if (ac97->regs[AC97_CM9739_MULTI_CHAN] & 0x1000)
+ ucontrol->value.integer.value[0] = 1;
+ else
+ ucontrol->value.integer.value[0] = 0;
+ if (ac97->spec.dev_flags) /* 9761-82 rev.B */
+ ucontrol->value.integer.value[0] = !ucontrol->value.integer.value[0];
+ return 0;
+}
+
+static int snd_ac97_cm9761_center_mic_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ac97_t *ac97 = snd_kcontrol_chip(kcontrol);
+ unsigned short vals[2][2] = {
+ { 0x2000, 0x1880 }, /* off, on */
+ { 0x1000, 0x2880 }, /* off, on (9761-82 rev.B) */
+ };
+ return snd_ac97_update_bits(ac97, AC97_CM9739_MULTI_CHAN, 0x3880,
+ vals[ac97->spec.dev_flags][!!ucontrol->value.integer.value[0]]);
+}
+
+static const snd_kcontrol_new_t snd_ac97_cm9761_controls[] = {
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Line-In As Surround",
+ .info = snd_ac97_info_volsw,
+ .get = snd_ac97_cm9761_linein_rear_get,
+ .put = snd_ac97_cm9761_linein_rear_put,
+ .private_value = AC97_SINGLE_VALUE(0, 0, 1, 0) /* only mask needed */
+ },
+ {
+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
+ .name = "Mic As Center/LFE",
+ .info = snd_ac97_info_volsw,
+ .get = snd_ac97_cm9761_center_mic_get,
+ .put = snd_ac97_cm9761_center_mic_put,
+ .private_value = AC97_SINGLE_VALUE(0, 0, 1, 0) /* only mask needed */
+ },
+};
+
+static int patch_cm9761_specific(ac97_t * ac97)
+{
+ return patch_build_controls(ac97, snd_ac97_cm9761_controls, ARRAY_SIZE(snd_ac97_cm9761_controls));
+}
+
+static struct snd_ac97_build_ops patch_cm9761_ops = {
+ .build_specific = patch_cm9761_specific,
+ .build_post_spdif = patch_cm9739_post_spdif /* hope it's identical... */
+};
+
+int patch_cm9761(ac97_t *ac97)
+{
+ unsigned short val;
+
+ /* CM9761 has no PCM volume although the register reacts */
+ /* Master volume seems to have _some_ influence on the analog
+ * input sounds
+ */
+ ac97->flags |= /*AC97_HAS_NO_MASTER_VOL |*/ AC97_HAS_NO_PCM_VOL;
+ snd_ac97_write_cache(ac97, AC97_MASTER, 0x8808);
+ snd_ac97_write_cache(ac97, AC97_PCM, 0x8808);
+
+ ac97->spec.dev_flags = 0; /* 1 = model 82 revision B */
+ if (ac97->id == AC97_ID_CM9761_82) {
+ unsigned short tmp;
+ /* check page 1, reg 0x60 */
+ val = snd_ac97_read(ac97, AC97_INT_PAGING);
+ snd_ac97_write_cache(ac97, AC97_INT_PAGING, (val & ~0x0f) | 0x01);
+ tmp = snd_ac97_read(ac97, 0x60);
+ ac97->spec.dev_flags = tmp & 1; /* revision B? */
+ snd_ac97_write_cache(ac97, AC97_INT_PAGING, val);
+ }
+
+ ac97->build_ops = &patch_cm9761_ops;
+
+ /* enable spdif */
+ /* force the SPDIF bit in ext_id - codec doesn't set this bit! */
+ ac97->ext_id |= AC97_EI_SPDIF;
+ /* to be sure: we overwrite the ext status bits */
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_STATUS, 0x05c0);
+ /* Don't set 0x0200 here. This results in the silent analog output */
+ snd_ac97_write_cache(ac97, AC97_CM9761_SPDIF_CTRL, 0x0009);
+ ac97->rates[AC97_RATES_SPDIF] = SNDRV_PCM_RATE_48000; /* 48k only */
+
+ /* set-up multi channel */
+ /* bit 15: pc master beep off
+ * bit 14: ??
+ * bit 13: vref ctl [= cm9739]
+ * bit 12: center/mic [= cm9739] (reverted on rev B)
+ * bit 11: ?? (mic/center/lfe) (reverted on rev B)
+ * bit 10: suddound/line [= cm9739]
+ * bit 9: mix 2 surround
+ * bit 8: ?
+ * bit 7: ?? (mic/center/lfe)
+ * bit 4: ?? (front)
+ * bit 3: ?? (line-in/rear share) (revereted with rev B)
+ * bit 2: ?? (surround)
+ * bit 1: front mic
+ * bit 0: mic boost
+ */
+
+#if 0
+ if (ac97->spec.dev_flags)
+ val = 0x0214;
+ else
+ val = 0x321c;
+#endif
+ val = snd_ac97_read(ac97, AC97_CM9761_MULTI_CHAN);
+ val |= (1 << 4); /* front on */
+ snd_ac97_write_cache(ac97, AC97_CM9761_MULTI_CHAN, val);
+
+ /* FIXME: set up GPIO */
+ snd_ac97_write_cache(ac97, 0x70, 0x0100);
+ snd_ac97_write_cache(ac97, 0x72, 0x0020);
+
+ return 0;
+}
+
+
+/*
+ * VIA VT1616 codec
+ */
+static const snd_kcontrol_new_t snd_ac97_controls_vt1616[] = {
+AC97_SINGLE("DC Offset removal", 0x5a, 10, 1, 0),
+AC97_SINGLE("Alternate Level to Surround Out", 0x5a, 15, 1, 0),
+AC97_SINGLE("Downmix LFE and Center to Front", 0x5a, 12, 1, 0),
+AC97_SINGLE("Downmix Surround to Front", 0x5a, 11, 1, 0),
+};
+
+static int patch_vt1616_specific(ac97_t * ac97)
+{
+ int err;
+
+ if (snd_ac97_try_bit(ac97, 0x5a, 9))
+ if ((err = patch_build_controls(ac97, &snd_ac97_controls_vt1616[0], 1)) < 0)
+ return err;
+ if ((err = patch_build_controls(ac97, &snd_ac97_controls_vt1616[1], ARRAY_SIZE(snd_ac97_controls_vt1616) - 1)) < 0)
+ return err;
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_vt1616_ops = {
+ .build_specific = patch_vt1616_specific
+};
+
+int patch_vt1616(ac97_t * ac97)
+{
+ ac97->build_ops = &patch_vt1616_ops;
+ return 0;
+}
+
+static const snd_kcontrol_new_t snd_ac97_controls_it2646[] = {
+ AC97_SINGLE("Line-In As Surround", 0x76, 9, 1, 0),
+ AC97_SINGLE("Mic As Center/LFE", 0x76, 10, 1, 0),
+};
+
+static const snd_kcontrol_new_t snd_ac97_spdif_controls_it2646[] = {
+ AC97_SINGLE("IEC958 Capture Switch", 0x76, 11, 1, 0),
+ AC97_SINGLE("Analog to IEC958 Output", 0x76, 12, 1, 0),
+ AC97_SINGLE("IEC958 Input Monitor", 0x76, 13, 1, 0),
+};
+
+static int patch_it2646_specific(ac97_t * ac97)
+{
+ int err;
+ if ((err = patch_build_controls(ac97, snd_ac97_controls_it2646, ARRAY_SIZE(snd_ac97_controls_it2646))) < 0)
+ return err;
+ if ((err = patch_build_controls(ac97, snd_ac97_spdif_controls_it2646, ARRAY_SIZE(snd_ac97_spdif_controls_it2646))) < 0)
+ return err;
+ return 0;
+}
+
+static struct snd_ac97_build_ops patch_it2646_ops = {
+ .build_specific = patch_it2646_specific
+};
+
+int patch_it2646(ac97_t * ac97)
+{
+ ac97->build_ops = &patch_it2646_ops;
+ /* full DAC volume */
+ snd_ac97_write_cache(ac97, 0x5E, 0x0808);
+ snd_ac97_write_cache(ac97, 0x7A, 0x0808);
+ return 0;
+}
+
+/* Si3036/8 specific registers */
+#define AC97_SI3036_CHIP_ID 0x5a
+
+int mpatch_si3036(ac97_t * ac97)
+{
+ //printk("mpatch_si3036: chip id = %x\n", snd_ac97_read(ac97, 0x5a));
+ snd_ac97_write_cache(ac97, 0x5c, 0xf210 );
+ snd_ac97_write_cache(ac97, 0x68, 0);
+ return 0;
+}
diff --git a/sound/pci/ac97/ac97_patch.h b/sound/pci/ac97/ac97_patch.h
new file mode 100644
index 000000000000..6db51c96f5d0
--- /dev/null
+++ b/sound/pci/ac97/ac97_patch.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
+ * Universal interface for Audio Codec '97
+ *
+ * For more details look to AC '97 component specification revision 2.2
+ * by Intel Corporation (http://developer.intel.com).
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+int patch_yamaha_ymf753(ac97_t * ac97);
+int patch_wolfson00(ac97_t * ac97);
+int patch_wolfson03(ac97_t * ac97);
+int patch_wolfson04(ac97_t * ac97);
+int patch_wolfson05(ac97_t * ac97);
+int patch_wolfson11(ac97_t * ac97);
+int patch_wolfson13(ac97_t * ac97);
+int patch_tritech_tr28028(ac97_t * ac97);
+int patch_sigmatel_stac9700(ac97_t * ac97);
+int patch_sigmatel_stac9708(ac97_t * ac97);
+int patch_sigmatel_stac9721(ac97_t * ac97);
+int patch_sigmatel_stac9744(ac97_t * ac97);
+int patch_sigmatel_stac9756(ac97_t * ac97);
+int patch_sigmatel_stac9758(ac97_t * ac97);
+int patch_cirrus_cs4299(ac97_t * ac97);
+int patch_cirrus_spdif(ac97_t * ac97);
+int patch_conexant(ac97_t * ac97);
+int patch_ad1819(ac97_t * ac97);
+int patch_ad1881(ac97_t * ac97);
+int patch_ad1885(ac97_t * ac97);
+int patch_ad1886(ac97_t * ac97);
+int patch_ad1888(ac97_t * ac97);
+int patch_ad1980(ac97_t * ac97);
+int patch_ad1981a(ac97_t * ac97);
+int patch_ad1981b(ac97_t * ac97);
+int patch_ad1985(ac97_t * ac97);
+int patch_alc650(ac97_t * ac97);
+int patch_alc655(ac97_t * ac97);
+int patch_alc850(ac97_t * ac97);
+int patch_cm9738(ac97_t * ac97);
+int patch_cm9739(ac97_t * ac97);
+int patch_cm9761(ac97_t * ac97);
+int patch_vt1616(ac97_t * ac97);
+int patch_it2646(ac97_t * ac97);
+int mpatch_si3036(ac97_t * ac97);
diff --git a/sound/pci/ac97/ac97_pcm.c b/sound/pci/ac97/ac97_pcm.c
new file mode 100644
index 000000000000..dd289b9512e1
--- /dev/null
+++ b/sound/pci/ac97/ac97_pcm.c
@@ -0,0 +1,700 @@
+/*
+ * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
+ * Universal interface for Audio Codec '97
+ *
+ * For more details look to AC '97 component specification revision 2.2
+ * by Intel Corporation (http://developer.intel.com) and to datasheets
+ * for specific codecs.
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <sound/driver.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/control.h>
+#include <sound/ac97_codec.h>
+#include <sound/asoundef.h>
+#include "ac97_patch.h"
+#include "ac97_id.h"
+#include "ac97_local.h"
+
+/*
+ * PCM support
+ */
+
+static unsigned char rate_reg_tables[2][4][9] = {
+{
+ /* standard rates */
+ {
+ /* 3&4 front, 7&8 rear, 6&9 center/lfe */
+ AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
+ AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
+ 0xff, /* slot 5 */
+ AC97_PCM_LFE_DAC_RATE, /* slot 6 */
+ AC97_PCM_SURR_DAC_RATE, /* slot 7 */
+ AC97_PCM_SURR_DAC_RATE, /* slot 8 */
+ AC97_PCM_LFE_DAC_RATE, /* slot 9 */
+ 0xff, /* slot 10 */
+ 0xff, /* slot 11 */
+ },
+ {
+ /* 7&8 front, 6&9 rear, 10&11 center/lfe */
+ 0xff, /* slot 3 */
+ 0xff, /* slot 4 */
+ 0xff, /* slot 5 */
+ AC97_PCM_SURR_DAC_RATE, /* slot 6 */
+ AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
+ AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
+ AC97_PCM_SURR_DAC_RATE, /* slot 9 */
+ AC97_PCM_LFE_DAC_RATE, /* slot 10 */
+ AC97_PCM_LFE_DAC_RATE, /* slot 11 */
+ },
+ {
+ /* 6&9 front, 10&11 rear, 3&4 center/lfe */
+ AC97_PCM_LFE_DAC_RATE, /* slot 3 */
+ AC97_PCM_LFE_DAC_RATE, /* slot 4 */
+ 0xff, /* slot 5 */
+ AC97_PCM_FRONT_DAC_RATE, /* slot 6 */
+ 0xff, /* slot 7 */
+ 0xff, /* slot 8 */
+ AC97_PCM_FRONT_DAC_RATE, /* slot 9 */
+ AC97_PCM_SURR_DAC_RATE, /* slot 10 */
+ AC97_PCM_SURR_DAC_RATE, /* slot 11 */
+ },
+ {
+ /* 10&11 front, 3&4 rear, 7&8 center/lfe */
+ AC97_PCM_SURR_DAC_RATE, /* slot 3 */
+ AC97_PCM_SURR_DAC_RATE, /* slot 4 */
+ 0xff, /* slot 5 */
+ 0xff, /* slot 6 */
+ AC97_PCM_LFE_DAC_RATE, /* slot 7 */
+ AC97_PCM_LFE_DAC_RATE, /* slot 8 */
+ 0xff, /* slot 9 */
+ AC97_PCM_FRONT_DAC_RATE, /* slot 10 */
+ AC97_PCM_FRONT_DAC_RATE, /* slot 11 */
+ },
+},
+{
+ /* double rates */
+ {
+ /* 3&4 front, 7&8 front (t+1) */
+ AC97_PCM_FRONT_DAC_RATE, /* slot 3 */
+ AC97_PCM_FRONT_DAC_RATE, /* slot 4 */
+ 0xff, /* slot 5 */
+ 0xff, /* slot 6 */
+ AC97_PCM_FRONT_DAC_RATE, /* slot 7 */
+ AC97_PCM_FRONT_DAC_RATE, /* slot 8 */
+ 0xff, /* slot 9 */
+ 0xff, /* slot 10 */
+ 0xff, /* slot 11 */
+ },
+ {
+ /* not specified in the specification */
+ 0xff, /* slot 3 */
+ 0xff, /* slot 4 */
+ 0xff, /* slot 5 */
+ 0xff, /* slot 6 */
+ 0xff, /* slot 7 */
+ 0xff, /* slot 8 */
+ 0xff, /* slot 9 */
+ 0xff, /* slot 10 */
+ 0xff, /* slot 11 */
+ },
+ {
+ 0xff, /* slot 3 */
+ 0xff, /* slot 4 */
+ 0xff, /* slot 5 */
+ 0xff, /* slot 6 */
+ 0xff, /* slot 7 */
+ 0xff, /* slot 8 */
+ 0xff, /* slot 9 */
+ 0xff, /* slot 10 */
+ 0xff, /* slot 11 */
+ },
+ {
+ 0xff, /* slot 3 */
+ 0xff, /* slot 4 */
+ 0xff, /* slot 5 */
+ 0xff, /* slot 6 */
+ 0xff, /* slot 7 */
+ 0xff, /* slot 8 */
+ 0xff, /* slot 9 */
+ 0xff, /* slot 10 */
+ 0xff, /* slot 11 */
+ }
+}};
+
+/* FIXME: more various mappings for ADC? */
+static unsigned char rate_cregs[9] = {
+ AC97_PCM_LR_ADC_RATE, /* 3 */
+ AC97_PCM_LR_ADC_RATE, /* 4 */
+ 0xff, /* 5 */
+ AC97_PCM_MIC_ADC_RATE, /* 6 */
+ 0xff, /* 7 */
+ 0xff, /* 8 */
+ 0xff, /* 9 */
+ 0xff, /* 10 */
+ 0xff, /* 11 */
+};
+
+static unsigned char get_slot_reg(struct ac97_pcm *pcm, unsigned short cidx,
+ unsigned short slot, int dbl)
+{
+ if (slot < 3)
+ return 0xff;
+ if (slot > 11)
+ return 0xff;
+ if (pcm->spdif)
+ return AC97_SPDIF; /* pseudo register */
+ if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ return rate_reg_tables[dbl][pcm->r[dbl].rate_table[cidx]][slot - 3];
+ else
+ return rate_cregs[slot - 3];
+}
+
+static int set_spdif_rate(ac97_t *ac97, unsigned short rate)
+{
+ unsigned short old, bits, reg, mask;
+ unsigned int sbits;
+
+ if (! (ac97->ext_id & AC97_EI_SPDIF))
+ return -ENODEV;
+
+ /* TODO: double rate support */
+ if (ac97->flags & AC97_CS_SPDIF) {
+ switch (rate) {
+ case 48000: bits = 0; break;
+ case 44100: bits = 1 << AC97_SC_SPSR_SHIFT; break;
+ default: /* invalid - disable output */
+ snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
+ return -EINVAL;
+ }
+ reg = AC97_CSR_SPDIF;
+ mask = 1 << AC97_SC_SPSR_SHIFT;
+ } else {
+ if (ac97->id == AC97_ID_CM9739 && rate != 48000) {
+ snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
+ return -EINVAL;
+ }
+ switch (rate) {
+ case 44100: bits = AC97_SC_SPSR_44K; break;
+ case 48000: bits = AC97_SC_SPSR_48K; break;
+ case 32000: bits = AC97_SC_SPSR_32K; break;
+ default: /* invalid - disable output */
+ snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
+ return -EINVAL;
+ }
+ reg = AC97_SPDIF;
+ mask = AC97_SC_SPSR_MASK;
+ }
+
+ down(&ac97->reg_mutex);
+ old = snd_ac97_read(ac97, reg) & mask;
+ if (old != bits) {
+ snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, 0);
+ snd_ac97_update_bits_nolock(ac97, reg, mask, bits);
+ /* update the internal spdif bits */
+ sbits = ac97->spdif_status;
+ if (sbits & IEC958_AES0_PROFESSIONAL) {
+ sbits &= ~IEC958_AES0_PRO_FS;
+ switch (rate) {
+ case 44100: sbits |= IEC958_AES0_PRO_FS_44100; break;
+ case 48000: sbits |= IEC958_AES0_PRO_FS_48000; break;
+ case 32000: sbits |= IEC958_AES0_PRO_FS_32000; break;
+ }
+ } else {
+ sbits &= ~(IEC958_AES3_CON_FS << 24);
+ switch (rate) {
+ case 44100: sbits |= IEC958_AES3_CON_FS_44100<<24; break;
+ case 48000: sbits |= IEC958_AES3_CON_FS_48000<<24; break;
+ case 32000: sbits |= IEC958_AES3_CON_FS_32000<<24; break;
+ }
+ }
+ ac97->spdif_status = sbits;
+ }
+ snd_ac97_update_bits_nolock(ac97, AC97_EXTENDED_STATUS, AC97_EA_SPDIF, AC97_EA_SPDIF);
+ up(&ac97->reg_mutex);
+ return 0;
+}
+
+/**
+ * snd_ac97_set_rate - change the rate of the given input/output.
+ * @ac97: the ac97 instance
+ * @reg: the register to change
+ * @rate: the sample rate to set
+ *
+ * Changes the rate of the given input/output on the codec.
+ * If the codec doesn't support VAR, the rate must be 48000 (except
+ * for SPDIF).
+ *
+ * The valid registers are AC97_PMC_MIC_ADC_RATE,
+ * AC97_PCM_FRONT_DAC_RATE, AC97_PCM_LR_ADC_RATE.
+ * AC97_PCM_SURR_DAC_RATE and AC97_PCM_LFE_DAC_RATE are accepted
+ * if the codec supports them.
+ * AC97_SPDIF is accepted as a pseudo register to modify the SPDIF
+ * status bits.
+ *
+ * Returns zero if successful, or a negative error code on failure.
+ */
+int snd_ac97_set_rate(ac97_t *ac97, int reg, unsigned int rate)
+{
+ int dbl;
+ unsigned int tmp;
+
+ dbl = rate > 48000;
+ if (dbl) {
+ if (!(ac97->flags & AC97_DOUBLE_RATE))
+ return -EINVAL;
+ if (reg != AC97_PCM_FRONT_DAC_RATE)
+ return -EINVAL;
+ }
+
+ switch (reg) {
+ case AC97_PCM_MIC_ADC_RATE:
+ if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRM) == 0) /* MIC VRA */
+ if (rate != 48000)
+ return -EINVAL;
+ break;
+ case AC97_PCM_FRONT_DAC_RATE:
+ case AC97_PCM_LR_ADC_RATE:
+ if ((ac97->regs[AC97_EXTENDED_STATUS] & AC97_EA_VRA) == 0) /* VRA */
+ if (rate != 48000 && rate != 96000)
+ return -EINVAL;
+ break;
+ case AC97_PCM_SURR_DAC_RATE:
+ if (! (ac97->scaps & AC97_SCAP_SURROUND_DAC))
+ return -EINVAL;
+ break;
+ case AC97_PCM_LFE_DAC_RATE:
+ if (! (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
+ return -EINVAL;
+ break;
+ case AC97_SPDIF:
+ /* special case */
+ return set_spdif_rate(ac97, rate);
+ default:
+ return -EINVAL;
+ }
+ if (dbl)
+ rate /= 2;
+ tmp = (rate * ac97->bus->clock) / 48000;
+ if (tmp > 65535)
+ return -EINVAL;
+ if ((ac97->ext_id & AC97_EI_DRA) && reg == AC97_PCM_FRONT_DAC_RATE)
+ snd_ac97_update_bits(ac97, AC97_EXTENDED_STATUS,
+ AC97_EA_DRA, dbl ? AC97_EA_DRA : 0);
+ snd_ac97_update(ac97, reg, tmp & 0xffff);
+ snd_ac97_read(ac97, reg);
+ return 0;
+}
+
+static unsigned short get_pslots(ac97_t *ac97, unsigned char *rate_table, unsigned short *spdif_slots)
+{
+ if (!ac97_is_audio(ac97))
+ return 0;
+ if (ac97_is_rev22(ac97) || ac97_can_amap(ac97)) {
+ unsigned short slots = 0;
+ if (ac97_is_rev22(ac97)) {
+ /* Note: it's simply emulation of AMAP behaviour */
+ u16 es;
+ es = ac97->regs[AC97_EXTENDED_ID] &= ~AC97_EI_DACS_SLOT_MASK;
+ switch (ac97->addr) {
+ case 1:
+ case 2: es |= (1<<AC97_EI_DACS_SLOT_SHIFT); break;
+ case 3: es |= (2<<AC97_EI_DACS_SLOT_SHIFT); break;
+ }
+ snd_ac97_write_cache(ac97, AC97_EXTENDED_ID, es);
+ }
+ switch (ac97->addr) {
+ case 0:
+ slots |= (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
+ if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
+ slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
+ if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
+ slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
+ if (ac97->ext_id & AC97_EI_SPDIF) {
+ if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
+ *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
+ else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
+ *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
+ else
+ *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
+ }
+ *rate_table = 0;
+ break;
+ case 1:
+ case 2:
+ slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
+ if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
+ slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
+ if (ac97->ext_id & AC97_EI_SPDIF) {
+ if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
+ *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
+ else
+ *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
+ }
+ *rate_table = 1;
+ break;
+ case 3:
+ slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
+ if (ac97->ext_id & AC97_EI_SPDIF)
+ *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
+ *rate_table = 2;
+ break;
+ }
+ return slots;
+ } else {
+ unsigned short slots;
+ slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
+ if (ac97->scaps & AC97_SCAP_SURROUND_DAC)
+ slots |= (1<<AC97_SLOT_PCM_SLEFT)|(1<<AC97_SLOT_PCM_SRIGHT);
+ if (ac97->scaps & AC97_SCAP_CENTER_LFE_DAC)
+ slots |= (1<<AC97_SLOT_PCM_CENTER)|(1<<AC97_SLOT_LFE);
+ if (ac97->ext_id & AC97_EI_SPDIF) {
+ if (!(ac97->scaps & AC97_SCAP_SURROUND_DAC))
+ *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT)|(1<<AC97_SLOT_SPDIF_RIGHT);
+ else if (!(ac97->scaps & AC97_SCAP_CENTER_LFE_DAC))
+ *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT1)|(1<<AC97_SLOT_SPDIF_RIGHT1);
+ else
+ *spdif_slots = (1<<AC97_SLOT_SPDIF_LEFT2)|(1<<AC97_SLOT_SPDIF_RIGHT2);
+ }
+ *rate_table = 0;
+ return slots;
+ }
+}
+
+static unsigned short get_cslots(ac97_t *ac97)
+{
+ unsigned short slots;
+
+ if (!ac97_is_audio(ac97))
+ return 0;
+ slots = (1<<AC97_SLOT_PCM_LEFT)|(1<<AC97_SLOT_PCM_RIGHT);
+ slots |= (1<<AC97_SLOT_MIC);
+ return slots;
+}
+
+static unsigned int get_rates(struct ac97_pcm *pcm, unsigned int cidx, unsigned short slots, int dbl)
+{
+ int i, idx;
+ unsigned int rates = ~0;
+ unsigned char reg;
+
+ for (i = 3; i < 12; i++) {
+ if (!(slots & (1 << i)))
+ continue;
+ reg = get_slot_reg(pcm, cidx, i, dbl);
+ switch (reg) {
+ case AC97_PCM_FRONT_DAC_RATE: idx = AC97_RATES_FRONT_DAC; break;
+ case AC97_PCM_SURR_DAC_RATE: idx = AC97_RATES_SURR_DAC; break;
+ case AC97_PCM_LFE_DAC_RATE: idx = AC97_RATES_LFE_DAC; break;
+ case AC97_PCM_LR_ADC_RATE: idx = AC97_RATES_ADC; break;
+ case AC97_PCM_MIC_ADC_RATE: idx = AC97_RATES_MIC_ADC; break;
+ default: idx = AC97_RATES_SPDIF; break;
+ }
+ rates &= pcm->r[dbl].codec[cidx]->rates[idx];
+ }
+ if (!dbl)
+ rates &= ~(SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 |
+ SNDRV_PCM_RATE_96000);
+ return rates;
+}
+
+/**
+ * snd_ac97_pcm_assign - assign AC97 slots to given PCM streams
+ * @bus: the ac97 bus instance
+ * @pcms_count: count of PCMs to be assigned
+ * @pcms: PCMs to be assigned
+ *
+ * It assigns available AC97 slots for given PCMs. If none or only
+ * some slots are available, pcm->xxx.slots and pcm->xxx.rslots[] members
+ * are reduced and might be zero.
+ */
+int snd_ac97_pcm_assign(ac97_bus_t *bus,
+ unsigned short pcms_count,
+ const struct ac97_pcm *pcms)
+{
+ int i, j, k;
+ const struct ac97_pcm *pcm;
+ struct ac97_pcm *rpcms, *rpcm;
+ unsigned short avail_slots[2][4];
+ unsigned char rate_table[2][4];
+ unsigned short tmp, slots;
+ unsigned short spdif_slots[4];
+ unsigned int rates;
+ ac97_t *codec;
+
+ rpcms = kcalloc(pcms_count, sizeof(struct ac97_pcm), GFP_KERNEL);
+ if (rpcms == NULL)
+ return -ENOMEM;
+ memset(avail_slots, 0, sizeof(avail_slots));
+ memset(rate_table, 0, sizeof(rate_table));
+ memset(spdif_slots, 0, sizeof(spdif_slots));
+ for (i = 0; i < 4; i++) {
+ codec = bus->codec[i];
+ if (!codec)
+ continue;
+ avail_slots[0][i] = get_pslots(codec, &rate_table[0][i], &spdif_slots[i]);
+ avail_slots[1][i] = get_cslots(codec);
+ if (!(codec->scaps & AC97_SCAP_INDEP_SDIN)) {
+ for (j = 0; j < i; j++) {
+ if (bus->codec[j])
+ avail_slots[1][i] &= ~avail_slots[1][j];
+ }
+ }
+ }
+ /* first step - exclusive devices */
+ for (i = 0; i < pcms_count; i++) {
+ pcm = &pcms[i];
+ rpcm = &rpcms[i];
+ /* low-level driver thinks that it's more clever */
+ if (pcm->copy_flag) {
+ *rpcm = *pcm;
+ continue;
+ }
+ rpcm->stream = pcm->stream;
+ rpcm->exclusive = pcm->exclusive;
+ rpcm->spdif = pcm->spdif;
+ rpcm->private_value = pcm->private_value;
+ rpcm->bus = bus;
+ rpcm->rates = ~0;
+ slots = pcm->r[0].slots;
+ for (j = 0; j < 4 && slots; j++) {
+ if (!bus->codec[j])
+ continue;
+ rates = ~0;
+ if (pcm->spdif && pcm->stream == 0)
+ tmp = spdif_slots[j];
+ else
+ tmp = avail_slots[pcm->stream][j];
+ if (pcm->exclusive) {
+ /* exclusive access */
+ tmp &= slots;
+ for (k = 0; k < i; k++) {
+ if (rpcm->stream == rpcms[k].stream)
+ tmp &= ~rpcms[k].r[0].rslots[j];
+ }
+ } else {
+ /* non-exclusive access */
+ tmp &= pcm->r[0].slots;
+ }
+ if (tmp) {
+ rpcm->r[0].rslots[j] = tmp;
+ rpcm->r[0].codec[j] = bus->codec[j];
+ rpcm->r[0].rate_table[j] = rate_table[pcm->stream][j];
+ if (bus->no_vra)
+ rates = SNDRV_PCM_RATE_48000;
+ else
+ rates = get_rates(rpcm, j, tmp, 0);
+ if (pcm->exclusive)
+ avail_slots[pcm->stream][j] &= ~tmp;
+ }
+ slots &= ~tmp;
+ rpcm->r[0].slots |= tmp;
+ rpcm->rates &= rates;
+ }
+ /* for double rate, we check the first codec only */
+ if (pcm->stream == SNDRV_PCM_STREAM_PLAYBACK &&
+ bus->codec[0] && (bus->codec[0]->flags & AC97_DOUBLE_RATE) &&
+ rate_table[pcm->stream][0] == 0) {
+ tmp = (1<<AC97_SLOT_PCM_LEFT) | (1<<AC97_SLOT_PCM_RIGHT) |
+ (1<<AC97_SLOT_PCM_LEFT_0) | (1<<AC97_SLOT_PCM_RIGHT_0);
+ if ((tmp & pcm->r[1].slots) == tmp) {
+ rpcm->r[1].slots = tmp;
+ rpcm->r[1].rslots[0] = tmp;
+ rpcm->r[1].rate_table[0] = 0;
+ rpcm->r[1].codec[0] = bus->codec[0];
+ if (pcm->exclusive)
+ avail_slots[pcm->stream][0] &= ~tmp;
+ if (bus->no_vra)
+ rates = SNDRV_PCM_RATE_96000;
+ else
+ rates = get_rates(rpcm, 0, tmp, 1);
+ rpcm->rates |= rates;
+ }
+ }
+ if (rpcm->rates == ~0)
+ rpcm->rates = 0; /* not used */
+ }
+ bus->pcms_count = pcms_count;
+ bus->pcms = rpcms;
+ return 0;
+}
+
+/**
+ * snd_ac97_pcm_open - opens the given AC97 pcm
+ * @pcm: the ac97 pcm instance
+ * @rate: rate in Hz, if codec does not support VRA, this value must be 48000Hz
+ * @cfg: output stream characteristics
+ * @slots: a subset of allocated slots (snd_ac97_pcm_assign) for this pcm
+ *
+ * It locks the specified slots and sets the given rate to AC97 registers.
+ */
+int snd_ac97_pcm_open(struct ac97_pcm *pcm, unsigned int rate,
+ enum ac97_pcm_cfg cfg, unsigned short slots)
+{
+ ac97_bus_t *bus;
+ int i, cidx, r, ok_flag;
+ unsigned int reg_ok[4] = {0,0,0,0};
+ unsigned char reg;
+ int err = 0;
+
+ r = rate > 48000;
+ bus = pcm->bus;
+ if (cfg == AC97_PCM_CFG_SPDIF) {
+ int err;
+ for (cidx = 0; cidx < 4; cidx++)
+ if (bus->codec[cidx] && (bus->codec[cidx]->ext_id & AC97_EI_SPDIF)) {
+ err = set_spdif_rate(bus->codec[cidx], rate);
+ if (err < 0)
+ return err;
+ }
+ }
+ spin_lock_irq(&pcm->bus->bus_lock);
+ for (i = 3; i < 12; i++) {
+ if (!(slots & (1 << i)))
+ continue;
+ ok_flag = 0;
+ for (cidx = 0; cidx < 4; cidx++) {
+ if (bus->used_slots[pcm->stream][cidx] & (1 << i)) {
+ spin_unlock_irq(&pcm->bus->bus_lock);
+ err = -EBUSY;
+ goto error;
+ }
+ if (pcm->r[r].rslots[cidx] & (1 << i)) {
+ bus->used_slots[pcm->stream][cidx] |= (1 << i);
+ ok_flag++;
+ }
+ }
+ if (!ok_flag) {
+ spin_unlock_irq(&pcm->bus->bus_lock);
+ snd_printk(KERN_ERR "cannot find configuration for AC97 slot %i\n", i);
+ err = -EAGAIN;
+ goto error;
+ }
+ }
+ spin_unlock_irq(&pcm->bus->bus_lock);
+ for (i = 3; i < 12; i++) {
+ if (!(slots & (1 << i)))
+ continue;
+ for (cidx = 0; cidx < 4; cidx++) {
+ if (pcm->r[r].rslots[cidx] & (1 << i)) {
+ reg = get_slot_reg(pcm, cidx, i, r);
+ if (reg == 0xff) {
+ snd_printk(KERN_ERR "invalid AC97 slot %i?\n", i);
+ continue;
+ }
+ if (reg_ok[cidx] & (1 << (reg - AC97_PCM_FRONT_DAC_RATE)))
+ continue;
+ //printk(KERN_DEBUG "setting ac97 reg 0x%x to rate %d\n", reg, rate);
+ err = snd_ac97_set_rate(pcm->r[r].codec[cidx], reg, rate);
+ if (err < 0)
+ snd_printk(KERN_ERR "error in snd_ac97_set_rate: cidx=%d, reg=0x%x, rate=%d, err=%d\n", cidx, reg, rate, err);
+ else
+ reg_ok[cidx] |= (1 << (reg - AC97_PCM_FRONT_DAC_RATE));
+ }
+ }
+ }
+ pcm->aslots = slots;
+ return 0;
+
+ error:
+ pcm->aslots = slots;
+ snd_ac97_pcm_close(pcm);
+ return err;
+}
+
+/**
+ * snd_ac97_pcm_close - closes the given AC97 pcm
+ * @pcm: the ac97 pcm instance
+ *
+ * It frees the locked AC97 slots.
+ */
+int snd_ac97_pcm_close(struct ac97_pcm *pcm)
+{
+ ac97_bus_t *bus;
+ unsigned short slots = pcm->aslots;
+ int i, cidx;
+
+ bus = pcm->bus;
+ spin_lock_irq(&pcm->bus->bus_lock);
+ for (i = 3; i < 12; i++) {
+ if (!(slots & (1 << i)))
+ continue;
+ for (cidx = 0; cidx < 4; cidx++)
+ bus->used_slots[pcm->stream][cidx] &= ~(1 << i);
+ }
+ pcm->aslots = 0;
+ spin_unlock_irq(&pcm->bus->bus_lock);
+ return 0;
+}
+
+static int double_rate_hw_constraint_rate(snd_pcm_hw_params_t *params,
+ snd_pcm_hw_rule_t *rule)
+{
+ snd_interval_t *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
+ if (channels->min > 2) {
+ static const snd_interval_t single_rates = {
+ .min = 1,
+ .max = 48000,
+ };
+ snd_interval_t *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
+ return snd_interval_refine(rate, &single_rates);
+ }
+ return 0;
+}
+
+static int double_rate_hw_constraint_channels(snd_pcm_hw_params_t *params,
+ snd_pcm_hw_rule_t *rule)
+{
+ snd_interval_t *rate = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
+ if (rate->min > 48000) {
+ static const snd_interval_t double_rate_channels = {
+ .min = 2,
+ .max = 2,
+ };
+ snd_interval_t *channels = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
+ return snd_interval_refine(channels, &double_rate_channels);
+ }
+ return 0;
+}
+
+/**
+ * snd_ac97_pcm_double_rate_rules - set double rate constraints
+ * @runtime: the runtime of the ac97 front playback pcm
+ *
+ * Installs the hardware constraint rules to prevent using double rates and
+ * more than two channels at the same time.
+ */
+int snd_ac97_pcm_double_rate_rules(snd_pcm_runtime_t *runtime)
+{
+ int err;
+
+ err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
+ double_rate_hw_constraint_rate, NULL,
+ SNDRV_PCM_HW_PARAM_CHANNELS, -1);
+ if (err < 0)
+ return err;
+ err = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
+ double_rate_hw_constraint_channels, NULL,
+ SNDRV_PCM_HW_PARAM_RATE, -1);
+ return err;
+}
diff --git a/sound/pci/ac97/ac97_proc.c b/sound/pci/ac97/ac97_proc.c
new file mode 100644
index 000000000000..a040b2666ed7
--- /dev/null
+++ b/sound/pci/ac97/ac97_proc.c
@@ -0,0 +1,449 @@
+/*
+ * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
+ * Universal interface for Audio Codec '97
+ *
+ * For more details look to AC '97 component specification revision 2.2
+ * by Intel Corporation (http://developer.intel.com).
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <sound/driver.h>
+#include <linux/slab.h>
+#include <sound/core.h>
+#include <sound/ac97_codec.h>
+#include <sound/asoundef.h>
+#include "ac97_local.h"
+#include "ac97_id.h"
+
+/*
+ * proc interface
+ */
+
+static void snd_ac97_proc_read_functions(ac97_t *ac97, snd_info_buffer_t *buffer)
+{
+ int header = 0, function;
+ unsigned short info, sense_info;
+ static const char *function_names[12] = {
+ "Master Out", "AUX Out", "Center/LFE Out", "SPDIF Out",
+ "Phone In", "Mic 1", "Mic 2", "Line In", "CD In", "Video In",
+ "Aux In", "Mono Out"
+ };
+ static const char *locations[8] = {
+ "Rear I/O Panel", "Front Panel", "Motherboard", "Dock/External",
+ "reserved", "reserved", "reserved", "NC/unused"
+ };
+
+ for (function = 0; function < 12; ++function) {
+ snd_ac97_write(ac97, AC97_FUNC_SELECT, function << 1);
+ info = snd_ac97_read(ac97, AC97_FUNC_INFO);
+ if (!(info & 0x0001))
+ continue;
+ if (!header) {
+ snd_iprintf(buffer, "\n Gain Inverted Buffer delay Location\n");
+ header = 1;
+ }
+ sense_info = snd_ac97_read(ac97, AC97_SENSE_INFO);
+ snd_iprintf(buffer, "%-17s: %3d.%d dBV %c %2d/fs %s\n",
+ function_names[function],
+ (info & 0x8000 ? -1 : 1) * ((info & 0x7000) >> 12) * 3 / 2,
+ ((info & 0x0800) >> 11) * 5,
+ info & 0x0400 ? 'X' : '-',
+ (info & 0x03e0) >> 5,
+ locations[sense_info >> 13]);
+ }
+}
+
+static void snd_ac97_proc_read_main(ac97_t *ac97, snd_info_buffer_t * buffer, int subidx)
+{
+ char name[64];
+ unsigned short val, tmp, ext, mext;
+ static const char *spdif_slots[4] = { " SPDIF=3/4", " SPDIF=7/8", " SPDIF=6/9", " SPDIF=10/11" };
+ static const char *spdif_rates[4] = { " Rate=44.1kHz", " Rate=res", " Rate=48kHz", " Rate=32kHz" };
+ static const char *spdif_rates_cs4205[4] = { " Rate=48kHz", " Rate=44.1kHz", " Rate=res", " Rate=res" };
+ static const char *double_rate_slots[4] = { "10/11", "7/8", "reserved", "reserved" };
+
+ snd_ac97_get_name(NULL, ac97->id, name, 0);
+ snd_iprintf(buffer, "%d-%d/%d: %s\n\n", ac97->addr, ac97->num, subidx, name);
+ if ((ac97->scaps & AC97_SCAP_AUDIO) == 0)
+ goto __modem;
+
+ if ((ac97->ext_id & AC97_EI_REV_MASK) >= AC97_EI_REV_23) {
+ val = snd_ac97_read(ac97, AC97_INT_PAGING);
+ snd_ac97_update_bits(ac97, AC97_INT_PAGING,
+ AC97_PAGE_MASK, AC97_PAGE_1);
+ tmp = snd_ac97_read(ac97, AC97_CODEC_CLASS_REV);
+ snd_iprintf(buffer, "Revision : 0x%02x\n", tmp & 0xff);
+ snd_iprintf(buffer, "Compat. Class : 0x%02x\n", (tmp >> 8) & 0x1f);
+ snd_iprintf(buffer, "Subsys. Vendor ID: 0x%04x\n",
+ snd_ac97_read(ac97, AC97_PCI_SVID));
+ snd_iprintf(buffer, "Subsys. ID : 0x%04x\n\n",
+ snd_ac97_read(ac97, AC97_PCI_SID));
+ snd_ac97_update_bits(ac97, AC97_INT_PAGING,
+ AC97_PAGE_MASK, val & AC97_PAGE_MASK);
+ }
+
+ // val = snd_ac97_read(ac97, AC97_RESET);
+ val = ac97->caps;
+ snd_iprintf(buffer, "Capabilities :%s%s%s%s%s%s\n",
+ val & AC97_BC_DEDICATED_MIC ? " -dedicated MIC PCM IN channel-" : "",
+ val & AC97_BC_RESERVED1 ? " -reserved1-" : "",
+ val & AC97_BC_BASS_TREBLE ? " -bass & treble-" : "",
+ val & AC97_BC_SIM_STEREO ? " -simulated stereo-" : "",
+ val & AC97_BC_HEADPHONE ? " -headphone out-" : "",
+ val & AC97_BC_LOUDNESS ? " -loudness-" : "");
+ tmp = ac97->caps & AC97_BC_DAC_MASK;
+ snd_iprintf(buffer, "DAC resolution : %s%s%s%s\n",
+ tmp == AC97_BC_16BIT_DAC ? "16-bit" : "",
+ tmp == AC97_BC_18BIT_DAC ? "18-bit" : "",
+ tmp == AC97_BC_20BIT_DAC ? "20-bit" : "",
+ tmp == AC97_BC_DAC_MASK ? "???" : "");
+ tmp = ac97->caps & AC97_BC_ADC_MASK;
+ snd_iprintf(buffer, "ADC resolution : %s%s%s%s\n",
+ tmp == AC97_BC_16BIT_ADC ? "16-bit" : "",
+ tmp == AC97_BC_18BIT_ADC ? "18-bit" : "",
+ tmp == AC97_BC_20BIT_ADC ? "20-bit" : "",
+ tmp == AC97_BC_ADC_MASK ? "???" : "");
+ snd_iprintf(buffer, "3D enhancement : %s\n",
+ snd_ac97_stereo_enhancements[(val >> 10) & 0x1f]);
+ snd_iprintf(buffer, "\nCurrent setup\n");
+ val = snd_ac97_read(ac97, AC97_MIC);
+ snd_iprintf(buffer, "Mic gain : %s [%s]\n", val & 0x0040 ? "+20dB" : "+0dB", ac97->regs[AC97_MIC] & 0x0040 ? "+20dB" : "+0dB");
+ val = snd_ac97_read(ac97, AC97_GENERAL_PURPOSE);
+ snd_iprintf(buffer, "POP path : %s 3D\n"
+ "Sim. stereo : %s\n"
+ "3D enhancement : %s\n"
+ "Loudness : %s\n"
+ "Mono output : %s\n"
+ "Mic select : %s\n"
+ "ADC/DAC loopback : %s\n",
+ val & 0x8000 ? "post" : "pre",
+ val & 0x4000 ? "on" : "off",
+ val & 0x2000 ? "on" : "off",
+ val & 0x1000 ? "on" : "off",
+ val & 0x0200 ? "Mic" : "MIX",
+ val & 0x0100 ? "Mic2" : "Mic1",
+ val & 0x0080 ? "on" : "off");
+ if (ac97->ext_id & AC97_EI_DRA)
+ snd_iprintf(buffer, "Double rate slots: %s\n",
+ double_rate_slots[(val >> 10) & 3]);
+
+ ext = snd_ac97_read(ac97, AC97_EXTENDED_ID);
+ if (ext == 0)
+ goto __modem;
+
+ snd_iprintf(buffer, "Extended ID : codec=%i rev=%i%s%s%s%s DSA=%i%s%s%s%s\n",
+ (ext & AC97_EI_ADDR_MASK) >> AC97_EI_ADDR_SHIFT,
+ (ext & AC97_EI_REV_MASK) >> AC97_EI_REV_SHIFT,
+ ext & AC97_EI_AMAP ? " AMAP" : "",
+ ext & AC97_EI_LDAC ? " LDAC" : "",
+ ext & AC97_EI_SDAC ? " SDAC" : "",
+ ext & AC97_EI_CDAC ? " CDAC" : "",
+ (ext & AC97_EI_DACS_SLOT_MASK) >> AC97_EI_DACS_SLOT_SHIFT,
+ ext & AC97_EI_VRM ? " VRM" : "",
+ ext & AC97_EI_SPDIF ? " SPDIF" : "",
+ ext & AC97_EI_DRA ? " DRA" : "",
+ ext & AC97_EI_VRA ? " VRA" : "");
+ val = snd_ac97_read(ac97, AC97_EXTENDED_STATUS);
+ snd_iprintf(buffer, "Extended status :%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
+ val & AC97_EA_PRL ? " PRL" : "",
+ val & AC97_EA_PRK ? " PRK" : "",
+ val & AC97_EA_PRJ ? " PRJ" : "",
+ val & AC97_EA_PRI ? " PRI" : "",
+ val & AC97_EA_SPCV ? " SPCV" : "",
+ val & AC97_EA_MDAC ? " MADC" : "",
+ val & AC97_EA_LDAC ? " LDAC" : "",
+ val & AC97_EA_SDAC ? " SDAC" : "",
+ val & AC97_EA_CDAC ? " CDAC" : "",
+ ext & AC97_EI_SPDIF ? spdif_slots[(val & AC97_EA_SPSA_SLOT_MASK) >> AC97_EA_SPSA_SLOT_SHIFT] : "",
+ val & AC97_EA_VRM ? " VRM" : "",
+ val & AC97_EA_SPDIF ? " SPDIF" : "",
+ val & AC97_EA_DRA ? " DRA" : "",
+ val & AC97_EA_VRA ? " VRA" : "");
+ if (ext & AC97_EI_VRA) { /* VRA */
+ val = snd_ac97_read(ac97, AC97_PCM_FRONT_DAC_RATE);
+ snd_iprintf(buffer, "PCM front DAC : %iHz\n", val);
+ if (ext & AC97_EI_SDAC) {
+ val = snd_ac97_read(ac97, AC97_PCM_SURR_DAC_RATE);
+ snd_iprintf(buffer, "PCM Surr DAC : %iHz\n", val);
+ }
+ if (ext & AC97_EI_LDAC) {
+ val = snd_ac97_read(ac97, AC97_PCM_LFE_DAC_RATE);
+ snd_iprintf(buffer, "PCM LFE DAC : %iHz\n", val);
+ }
+ val = snd_ac97_read(ac97, AC97_PCM_LR_ADC_RATE);
+ snd_iprintf(buffer, "PCM ADC : %iHz\n", val);
+ }
+ if (ext & AC97_EI_VRM) {
+ val = snd_ac97_read(ac97, AC97_PCM_MIC_ADC_RATE);
+ snd_iprintf(buffer, "PCM MIC ADC : %iHz\n", val);
+ }
+ if ((ext & AC97_EI_SPDIF) || (ac97->flags & AC97_CS_SPDIF)) {
+ if (ac97->flags & AC97_CS_SPDIF)
+ val = snd_ac97_read(ac97, AC97_CSR_SPDIF);
+ else
+ val = snd_ac97_read(ac97, AC97_SPDIF);
+
+ snd_iprintf(buffer, "SPDIF Control :%s%s%s%s Category=0x%x Generation=%i%s%s%s\n",
+ val & AC97_SC_PRO ? " PRO" : " Consumer",
+ val & AC97_SC_NAUDIO ? " Non-audio" : " PCM",
+ val & AC97_SC_COPY ? "" : " Copyright",
+ val & AC97_SC_PRE ? " Preemph50/15" : "",
+ (val & AC97_SC_CC_MASK) >> AC97_SC_CC_SHIFT,
+ (val & AC97_SC_L) >> 11,
+ (ac97->flags & AC97_CS_SPDIF) ?
+ spdif_rates_cs4205[(val & AC97_SC_SPSR_MASK) >> AC97_SC_SPSR_SHIFT] :
+ spdif_rates[(val & AC97_SC_SPSR_MASK) >> AC97_SC_SPSR_SHIFT],
+ (ac97->flags & AC97_CS_SPDIF) ?
+ (val & AC97_SC_DRS ? " Validity" : "") :
+ (val & AC97_SC_DRS ? " DRS" : ""),
+ (ac97->flags & AC97_CS_SPDIF) ?
+ (val & AC97_SC_V ? " Enabled" : "") :
+ (val & AC97_SC_V ? " Validity" : ""));
+ /* ALC650 specific*/
+ if ((ac97->id & 0xfffffff0) == 0x414c4720 &&
+ (snd_ac97_read(ac97, AC97_ALC650_CLOCK) & 0x01)) {
+ val = snd_ac97_read(ac97, AC97_ALC650_SPDIF_INPUT_STATUS2);
+ if (val & AC97_ALC650_CLOCK_LOCK) {
+ val = snd_ac97_read(ac97, AC97_ALC650_SPDIF_INPUT_STATUS1);
+ snd_iprintf(buffer, "SPDIF In Status :%s%s%s%s Category=0x%x Generation=%i",
+ val & AC97_ALC650_PRO ? " PRO" : " Consumer",
+ val & AC97_ALC650_NAUDIO ? " Non-audio" : " PCM",
+ val & AC97_ALC650_COPY ? "" : " Copyright",
+ val & AC97_ALC650_PRE ? " Preemph50/15" : "",
+ (val & AC97_ALC650_CC_MASK) >> AC97_ALC650_CC_SHIFT,
+ (val & AC97_ALC650_L) >> 15);
+ val = snd_ac97_read(ac97, AC97_ALC650_SPDIF_INPUT_STATUS2);
+ snd_iprintf(buffer, "%s Accuracy=%i%s%s\n",
+ spdif_rates[(val & AC97_ALC650_SPSR_MASK) >> AC97_ALC650_SPSR_SHIFT],
+ (val & AC97_ALC650_CLOCK_ACCURACY) >> AC97_ALC650_CLOCK_SHIFT,
+ (val & AC97_ALC650_CLOCK_LOCK ? " Locked" : " Unlocked"),
+ (val & AC97_ALC650_V ? " Validity?" : ""));
+ } else {
+ snd_iprintf(buffer, "SPDIF In Status : Not Locked\n");
+ }
+ }
+ }
+ if ((ac97->ext_id & AC97_EI_REV_MASK) >= AC97_EI_REV_23) {
+ val = snd_ac97_read(ac97, AC97_INT_PAGING);
+ snd_ac97_update_bits(ac97, AC97_INT_PAGING,
+ AC97_PAGE_MASK, AC97_PAGE_1);
+ snd_ac97_proc_read_functions(ac97, buffer);
+ snd_ac97_update_bits(ac97, AC97_INT_PAGING,
+ AC97_PAGE_MASK, val & AC97_PAGE_MASK);
+ }
+
+
+ __modem:
+ mext = snd_ac97_read(ac97, AC97_EXTENDED_MID);
+ if (mext == 0)
+ return;
+
+ snd_iprintf(buffer, "Extended modem ID: codec=%i%s%s%s%s%s\n",
+ (mext & AC97_MEI_ADDR_MASK) >> AC97_MEI_ADDR_SHIFT,
+ mext & AC97_MEI_CID2 ? " CID2" : "",
+ mext & AC97_MEI_CID1 ? " CID1" : "",
+ mext & AC97_MEI_HANDSET ? " HSET" : "",
+ mext & AC97_MEI_LINE2 ? " LIN2" : "",
+ mext & AC97_MEI_LINE1 ? " LIN1" : "");
+ val = snd_ac97_read(ac97, AC97_EXTENDED_MSTATUS);
+ snd_iprintf(buffer, "Modem status :%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
+ val & AC97_MEA_GPIO ? " GPIO" : "",
+ val & AC97_MEA_MREF ? " MREF" : "",
+ val & AC97_MEA_ADC1 ? " ADC1" : "",
+ val & AC97_MEA_DAC1 ? " DAC1" : "",
+ val & AC97_MEA_ADC2 ? " ADC2" : "",
+ val & AC97_MEA_DAC2 ? " DAC2" : "",
+ val & AC97_MEA_HADC ? " HADC" : "",
+ val & AC97_MEA_HDAC ? " HDAC" : "",
+ val & AC97_MEA_PRA ? " PRA(GPIO)" : "",
+ val & AC97_MEA_PRB ? " PRB(res)" : "",
+ val & AC97_MEA_PRC ? " PRC(ADC1)" : "",
+ val & AC97_MEA_PRD ? " PRD(DAC1)" : "",
+ val & AC97_MEA_PRE ? " PRE(ADC2)" : "",
+ val & AC97_MEA_PRF ? " PRF(DAC2)" : "",
+ val & AC97_MEA_PRG ? " PRG(HADC)" : "",
+ val & AC97_MEA_PRH ? " PRH(HDAC)" : "");
+ if (mext & AC97_MEI_LINE1) {
+ val = snd_ac97_read(ac97, AC97_LINE1_RATE);
+ snd_iprintf(buffer, "Line1 rate : %iHz\n", val);
+ }
+ if (mext & AC97_MEI_LINE2) {
+ val = snd_ac97_read(ac97, AC97_LINE2_RATE);
+ snd_iprintf(buffer, "Line2 rate : %iHz\n", val);
+ }
+ if (mext & AC97_MEI_HANDSET) {
+ val = snd_ac97_read(ac97, AC97_HANDSET_RATE);
+ snd_iprintf(buffer, "Headset rate : %iHz\n", val);
+ }
+}
+
+static void snd_ac97_proc_read(snd_info_entry_t *entry, snd_info_buffer_t * buffer)
+{
+ ac97_t *ac97 = entry->private_data;
+
+ down(&ac97->page_mutex);
+ if ((ac97->id & 0xffffff40) == AC97_ID_AD1881) { // Analog Devices AD1881/85/86
+ int idx;
+ for (idx = 0; idx < 3; idx++)
+ if (ac97->spec.ad18xx.id[idx]) {
+ /* select single codec */
+ snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000,
+ ac97->spec.ad18xx.unchained[idx] | ac97->spec.ad18xx.chained[idx]);
+ snd_ac97_proc_read_main(ac97, buffer, idx);
+ snd_iprintf(buffer, "\n\n");
+ }
+ /* select all codecs */
+ snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000, 0x7000);
+
+ snd_iprintf(buffer, "\nAD18XX configuration\n");
+ snd_iprintf(buffer, "Unchained : 0x%04x,0x%04x,0x%04x\n",
+ ac97->spec.ad18xx.unchained[0],
+ ac97->spec.ad18xx.unchained[1],
+ ac97->spec.ad18xx.unchained[2]);
+ snd_iprintf(buffer, "Chained : 0x%04x,0x%04x,0x%04x\n",
+ ac97->spec.ad18xx.chained[0],
+ ac97->spec.ad18xx.chained[1],
+ ac97->spec.ad18xx.chained[2]);
+ } else {
+ snd_ac97_proc_read_main(ac97, buffer, 0);
+ }
+ up(&ac97->page_mutex);
+}
+
+#ifdef CONFIG_SND_DEBUG
+/* direct register write for debugging */
+static void snd_ac97_proc_regs_write(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
+{
+ ac97_t *ac97 = entry->private_data;
+ char line[64];
+ unsigned int reg, val;
+ down(&ac97->page_mutex);
+ while (!snd_info_get_line(buffer, line, sizeof(line))) {
+ if (sscanf(line, "%x %x", &reg, &val) != 2)
+ continue;
+ /* register must be even */
+ if (reg < 0x80 && (reg & 1) == 0 && val <= 0xffff)
+ snd_ac97_write_cache(ac97, reg, val);
+ }
+ up(&ac97->page_mutex);
+}
+#endif
+
+static void snd_ac97_proc_regs_read_main(ac97_t *ac97, snd_info_buffer_t * buffer, int subidx)
+{
+ int reg, val;
+
+ for (reg = 0; reg < 0x80; reg += 2) {
+ val = snd_ac97_read(ac97, reg);
+ snd_iprintf(buffer, "%i:%02x = %04x\n", subidx, reg, val);
+ }
+}
+
+static void snd_ac97_proc_regs_read(snd_info_entry_t *entry,
+ snd_info_buffer_t * buffer)
+{
+ ac97_t *ac97 = entry->private_data;
+
+ down(&ac97->page_mutex);
+ if ((ac97->id & 0xffffff40) == AC97_ID_AD1881) { // Analog Devices AD1881/85/86
+
+ int idx;
+ for (idx = 0; idx < 3; idx++)
+ if (ac97->spec.ad18xx.id[idx]) {
+ /* select single codec */
+ snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000,
+ ac97->spec.ad18xx.unchained[idx] | ac97->spec.ad18xx.chained[idx]);
+ snd_ac97_proc_regs_read_main(ac97, buffer, idx);
+ }
+ /* select all codecs */
+ snd_ac97_update_bits(ac97, AC97_AD_SERIAL_CFG, 0x7000, 0x7000);
+ } else {
+ snd_ac97_proc_regs_read_main(ac97, buffer, 0);
+ }
+ up(&ac97->page_mutex);
+}
+
+void snd_ac97_proc_init(ac97_t * ac97)
+{
+ snd_info_entry_t *entry;
+ char name[32];
+ const char *prefix;
+
+ if (ac97->bus->proc == NULL)
+ return;
+ prefix = ac97_is_audio(ac97) ? "ac97" : "mc97";
+ sprintf(name, "%s#%d-%d", prefix, ac97->addr, ac97->num);
+ if ((entry = snd_info_create_card_entry(ac97->bus->card, name, ac97->bus->proc)) != NULL) {
+ snd_info_set_text_ops(entry, ac97, 1024, snd_ac97_proc_read);
+ if (snd_info_register(entry) < 0) {
+ snd_info_free_entry(entry);
+ entry = NULL;
+ }
+ }
+ ac97->proc = entry;
+ sprintf(name, "%s#%d-%d+regs", prefix, ac97->addr, ac97->num);
+ if ((entry = snd_info_create_card_entry(ac97->bus->card, name, ac97->bus->proc)) != NULL) {
+ snd_info_set_text_ops(entry, ac97, 1024, snd_ac97_proc_regs_read);
+#ifdef CONFIG_SND_DEBUG
+ entry->mode |= S_IWUSR;
+ entry->c.text.write_size = 1024;
+ entry->c.text.write = snd_ac97_proc_regs_write;
+#endif
+ if (snd_info_register(entry) < 0) {
+ snd_info_free_entry(entry);
+ entry = NULL;
+ }
+ }
+ ac97->proc_regs = entry;
+}
+
+void snd_ac97_proc_done(ac97_t * ac97)
+{
+ if (ac97->proc_regs) {
+ snd_info_unregister(ac97->proc_regs);
+ ac97->proc_regs = NULL;
+ }
+ if (ac97->proc) {
+ snd_info_unregister(ac97->proc);
+ ac97->proc = NULL;
+ }
+}
+
+void snd_ac97_bus_proc_init(ac97_bus_t * bus)
+{
+ snd_info_entry_t *entry;
+ char name[32];
+
+ sprintf(name, "codec97#%d", bus->num);
+ if ((entry = snd_info_create_card_entry(bus->card, name, bus->card->proc_root)) != NULL) {
+ entry->mode = S_IFDIR | S_IRUGO | S_IXUGO;
+ if (snd_info_register(entry) < 0) {
+ snd_info_free_entry(entry);
+ entry = NULL;
+ }
+ }
+ bus->proc = entry;
+}
+
+void snd_ac97_bus_proc_done(ac97_bus_t * bus)
+{
+ if (bus->proc) {
+ snd_info_unregister(bus->proc);
+ bus->proc = NULL;
+ }
+}
diff --git a/sound/pci/ac97/ak4531_codec.c b/sound/pci/ac97/ak4531_codec.c
new file mode 100644
index 000000000000..f9ce0fd2f52f
--- /dev/null
+++ b/sound/pci/ac97/ak4531_codec.c
@@ -0,0 +1,437 @@
+/*
+ * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
+ * Universal routines for AK4531 codec
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <sound/driver.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <sound/core.h>
+#include <sound/ak4531_codec.h>
+
+MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
+MODULE_DESCRIPTION("Universal routines for AK4531 codec");
+MODULE_LICENSE("GPL");
+
+static void snd_ak4531_proc_init(snd_card_t * card, ak4531_t * ak4531);
+
+/*
+ *
+ */
+
+#if 0
+
+static void snd_ak4531_dump(ak4531_t *ak4531)
+{
+ int idx;
+
+ for (idx = 0; idx < 0x19; idx++)
+ printk("ak4531 0x%x: 0x%x\n", idx, ak4531->regs[idx]);
+}
+
+#endif
+
+/*
+ *
+ */
+
+#define AK4531_SINGLE(xname, xindex, reg, shift, mask, invert) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
+ .info = snd_ak4531_info_single, \
+ .get = snd_ak4531_get_single, .put = snd_ak4531_put_single, \
+ .private_value = reg | (shift << 16) | (mask << 24) | (invert << 22) }
+
+static int snd_ak4531_info_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ int mask = (kcontrol->private_value >> 24) & 0xff;
+
+ uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 1;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = mask;
+ return 0;
+}
+
+static int snd_ak4531_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ak4531_t *ak4531 = snd_kcontrol_chip(kcontrol);
+ int reg = kcontrol->private_value & 0xff;
+ int shift = (kcontrol->private_value >> 16) & 0x07;
+ int mask = (kcontrol->private_value >> 24) & 0xff;
+ int invert = (kcontrol->private_value >> 22) & 1;
+ int val;
+
+ down(&ak4531->reg_mutex);
+ val = (ak4531->regs[reg] >> shift) & mask;
+ up(&ak4531->reg_mutex);
+ if (invert) {
+ val = mask - val;
+ }
+ ucontrol->value.integer.value[0] = val;
+ return 0;
+}
+
+static int snd_ak4531_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ak4531_t *ak4531 = snd_kcontrol_chip(kcontrol);
+ int reg = kcontrol->private_value & 0xff;
+ int shift = (kcontrol->private_value >> 16) & 0x07;
+ int mask = (kcontrol->private_value >> 24) & 0xff;
+ int invert = (kcontrol->private_value >> 22) & 1;
+ int change;
+ int val;
+
+ val = ucontrol->value.integer.value[0] & mask;
+ if (invert) {
+ val = mask - val;
+ }
+ val <<= shift;
+ down(&ak4531->reg_mutex);
+ val = (ak4531->regs[reg] & ~(mask << shift)) | val;
+ change = val != ak4531->regs[reg];
+ ak4531->write(ak4531, reg, ak4531->regs[reg] = val);
+ up(&ak4531->reg_mutex);
+ return change;
+}
+
+#define AK4531_DOUBLE(xname, xindex, left_reg, right_reg, left_shift, right_shift, mask, invert) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
+ .info = snd_ak4531_info_double, \
+ .get = snd_ak4531_get_double, .put = snd_ak4531_put_double, \
+ .private_value = left_reg | (right_reg << 8) | (left_shift << 16) | (right_shift << 19) | (mask << 24) | (invert << 22) }
+
+static int snd_ak4531_info_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ int mask = (kcontrol->private_value >> 24) & 0xff;
+
+ uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 2;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = mask;
+ return 0;
+}
+
+static int snd_ak4531_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ak4531_t *ak4531 = snd_kcontrol_chip(kcontrol);
+ int left_reg = kcontrol->private_value & 0xff;
+ int right_reg = (kcontrol->private_value >> 8) & 0xff;
+ int left_shift = (kcontrol->private_value >> 16) & 0x07;
+ int right_shift = (kcontrol->private_value >> 19) & 0x07;
+ int mask = (kcontrol->private_value >> 24) & 0xff;
+ int invert = (kcontrol->private_value >> 22) & 1;
+ int left, right;
+
+ down(&ak4531->reg_mutex);
+ left = (ak4531->regs[left_reg] >> left_shift) & mask;
+ right = (ak4531->regs[right_reg] >> right_shift) & mask;
+ up(&ak4531->reg_mutex);
+ if (invert) {
+ left = mask - left;
+ right = mask - right;
+ }
+ ucontrol->value.integer.value[0] = left;
+ ucontrol->value.integer.value[1] = right;
+ return 0;
+}
+
+static int snd_ak4531_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ak4531_t *ak4531 = snd_kcontrol_chip(kcontrol);
+ int left_reg = kcontrol->private_value & 0xff;
+ int right_reg = (kcontrol->private_value >> 8) & 0xff;
+ int left_shift = (kcontrol->private_value >> 16) & 0x07;
+ int right_shift = (kcontrol->private_value >> 19) & 0x07;
+ int mask = (kcontrol->private_value >> 24) & 0xff;
+ int invert = (kcontrol->private_value >> 22) & 1;
+ int change;
+ int left, right;
+
+ left = ucontrol->value.integer.value[0] & mask;
+ right = ucontrol->value.integer.value[1] & mask;
+ if (invert) {
+ left = mask - left;
+ right = mask - right;
+ }
+ left <<= left_shift;
+ right <<= right_shift;
+ down(&ak4531->reg_mutex);
+ if (left_reg == right_reg) {
+ left = (ak4531->regs[left_reg] & ~((mask << left_shift) | (mask << right_shift))) | left | right;
+ change = left != ak4531->regs[left_reg];
+ ak4531->write(ak4531, left_reg, ak4531->regs[left_reg] = left);
+ } else {
+ left = (ak4531->regs[left_reg] & ~(mask << left_shift)) | left;
+ right = (ak4531->regs[right_reg] & ~(mask << right_shift)) | right;
+ change = left != ak4531->regs[left_reg] || right != ak4531->regs[right_reg];
+ ak4531->write(ak4531, left_reg, ak4531->regs[left_reg] = left);
+ ak4531->write(ak4531, right_reg, ak4531->regs[right_reg] = right);
+ }
+ up(&ak4531->reg_mutex);
+ return change;
+}
+
+#define AK4531_INPUT_SW(xname, xindex, reg1, reg2, left_shift, right_shift) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
+ .info = snd_ak4531_info_input_sw, \
+ .get = snd_ak4531_get_input_sw, .put = snd_ak4531_put_input_sw, \
+ .private_value = reg1 | (reg2 << 8) | (left_shift << 16) | (right_shift << 24) }
+
+static int snd_ak4531_info_input_sw(snd_kcontrol_t * kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
+ uinfo->count = 4;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = 1;
+ return 0;
+}
+
+static int snd_ak4531_get_input_sw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ak4531_t *ak4531 = snd_kcontrol_chip(kcontrol);
+ int reg1 = kcontrol->private_value & 0xff;
+ int reg2 = (kcontrol->private_value >> 8) & 0xff;
+ int left_shift = (kcontrol->private_value >> 16) & 0x0f;
+ int right_shift = (kcontrol->private_value >> 24) & 0x0f;
+
+ down(&ak4531->reg_mutex);
+ ucontrol->value.integer.value[0] = (ak4531->regs[reg1] >> left_shift) & 1;
+ ucontrol->value.integer.value[1] = (ak4531->regs[reg2] >> left_shift) & 1;
+ ucontrol->value.integer.value[2] = (ak4531->regs[reg1] >> right_shift) & 1;
+ ucontrol->value.integer.value[3] = (ak4531->regs[reg2] >> right_shift) & 1;
+ up(&ak4531->reg_mutex);
+ return 0;
+}
+
+static int snd_ak4531_put_input_sw(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ ak4531_t *ak4531 = snd_kcontrol_chip(kcontrol);
+ int reg1 = kcontrol->private_value & 0xff;
+ int reg2 = (kcontrol->private_value >> 8) & 0xff;
+ int left_shift = (kcontrol->private_value >> 16) & 0x0f;
+ int right_shift = (kcontrol->private_value >> 24) & 0x0f;
+ int change;
+ int val1, val2;
+
+ down(&ak4531->reg_mutex);
+ val1 = ak4531->regs[reg1] & ~((1 << left_shift) | (1 << right_shift));
+ val2 = ak4531->regs[reg2] & ~((1 << left_shift) | (1 << right_shift));
+ val1 |= (ucontrol->value.integer.value[0] & 1) << left_shift;
+ val2 |= (ucontrol->value.integer.value[1] & 1) << left_shift;
+ val1 |= (ucontrol->value.integer.value[2] & 1) << right_shift;
+ val2 |= (ucontrol->value.integer.value[3] & 1) << right_shift;
+ change = val1 != ak4531->regs[reg1] || val2 != ak4531->regs[reg2];
+ ak4531->write(ak4531, reg1, ak4531->regs[reg1] = val1);
+ ak4531->write(ak4531, reg2, ak4531->regs[reg2] = val2);
+ up(&ak4531->reg_mutex);
+ return change;
+}
+
+static snd_kcontrol_new_t snd_ak4531_controls[] = {
+
+AK4531_DOUBLE("Master Playback Switch", 0, AK4531_LMASTER, AK4531_RMASTER, 7, 7, 1, 1),
+AK4531_DOUBLE("Master Playback Volume", 0, AK4531_LMASTER, AK4531_RMASTER, 0, 0, 0x1f, 1),
+
+AK4531_SINGLE("Master Mono Playback Switch", 0, AK4531_MONO_OUT, 7, 1, 1),
+AK4531_SINGLE("Master Mono Playback Volume", 0, AK4531_MONO_OUT, 0, 0x07, 1),
+
+AK4531_DOUBLE("PCM Switch", 0, AK4531_LVOICE, AK4531_RVOICE, 7, 7, 1, 1),
+AK4531_DOUBLE("PCM Volume", 0, AK4531_LVOICE, AK4531_RVOICE, 0, 0, 0x1f, 1),
+AK4531_DOUBLE("PCM Playback Switch", 0, AK4531_OUT_SW2, AK4531_OUT_SW2, 3, 2, 1, 0),
+AK4531_DOUBLE("PCM Capture Switch", 0, AK4531_LIN_SW2, AK4531_RIN_SW2, 2, 2, 1, 0),
+
+AK4531_DOUBLE("PCM Switch", 1, AK4531_LFM, AK4531_RFM, 7, 7, 1, 1),
+AK4531_DOUBLE("PCM Volume", 1, AK4531_LFM, AK4531_RFM, 0, 0, 0x1f, 1),
+AK4531_DOUBLE("PCM Playback Switch", 1, AK4531_OUT_SW1, AK4531_OUT_SW1, 6, 5, 1, 0),
+AK4531_INPUT_SW("PCM Capture Route", 1, AK4531_LIN_SW1, AK4531_RIN_SW1, 6, 5),
+
+AK4531_DOUBLE("CD Switch", 0, AK4531_LCD, AK4531_RCD, 7, 7, 1, 1),
+AK4531_DOUBLE("CD Volume", 0, AK4531_LCD, AK4531_RCD, 0, 0, 0x1f, 1),
+AK4531_DOUBLE("CD Playback Switch", 0, AK4531_OUT_SW1, AK4531_OUT_SW1, 2, 1, 1, 0),
+AK4531_INPUT_SW("CD Capture Route", 0, AK4531_LIN_SW1, AK4531_RIN_SW1, 2, 1),
+
+AK4531_DOUBLE("Line Switch", 0, AK4531_LLINE, AK4531_RLINE, 7, 7, 1, 1),
+AK4531_DOUBLE("Line Volume", 0, AK4531_LLINE, AK4531_RLINE, 0, 0, 0x1f, 1),
+AK4531_DOUBLE("Line Playback Switch", 0, AK4531_OUT_SW1, AK4531_OUT_SW1, 4, 3, 1, 0),
+AK4531_INPUT_SW("Line Capture Route", 0, AK4531_LIN_SW1, AK4531_RIN_SW1, 4, 3),
+
+AK4531_DOUBLE("Aux Switch", 0, AK4531_LAUXA, AK4531_RAUXA, 7, 7, 1, 1),
+AK4531_DOUBLE("Aux Volume", 0, AK4531_LAUXA, AK4531_RAUXA, 0, 0, 0x1f, 1),
+AK4531_DOUBLE("Aux Playback Switch", 0, AK4531_OUT_SW2, AK4531_OUT_SW2, 5, 4, 1, 0),
+AK4531_INPUT_SW("Aux Capture Route", 0, AK4531_LIN_SW2, AK4531_RIN_SW2, 4, 3),
+
+AK4531_SINGLE("Mono Switch", 0, AK4531_MONO1, 7, 1, 1),
+AK4531_SINGLE("Mono Volume", 0, AK4531_MONO1, 0, 0x1f, 1),
+AK4531_SINGLE("Mono Playback Switch", 0, AK4531_OUT_SW2, 0, 1, 0),
+AK4531_DOUBLE("Mono Capture Switch", 0, AK4531_LIN_SW2, AK4531_RIN_SW2, 0, 0, 1, 0),
+
+AK4531_SINGLE("Mono Switch", 1, AK4531_MONO2, 7, 1, 1),
+AK4531_SINGLE("Mono Volume", 1, AK4531_MONO2, 0, 0x1f, 1),
+AK4531_SINGLE("Mono Playback Switch", 1, AK4531_OUT_SW2, 1, 1, 0),
+AK4531_DOUBLE("Mono Capture Switch", 1, AK4531_LIN_SW2, AK4531_RIN_SW2, 1, 1, 1, 0),
+
+AK4531_SINGLE("Mic Volume", 0, AK4531_MIC, 0, 0x1f, 1),
+AK4531_SINGLE("Mic Switch", 0, AK4531_MIC, 7, 1, 1),
+AK4531_SINGLE("Mic Playback Switch", 0, AK4531_OUT_SW1, 0, 1, 0),
+AK4531_DOUBLE("Mic Capture Switch", 0, AK4531_LIN_SW1, AK4531_RIN_SW1, 0, 0, 1, 0),
+
+AK4531_DOUBLE("Mic Bypass Capture Switch", 0, AK4531_LIN_SW2, AK4531_RIN_SW2, 7, 7, 1, 0),
+AK4531_DOUBLE("Mono1 Bypass Capture Switch", 0, AK4531_LIN_SW2, AK4531_RIN_SW2, 6, 6, 1, 0),
+AK4531_DOUBLE("Mono2 Bypass Capture Switch", 0, AK4531_LIN_SW2, AK4531_RIN_SW2, 5, 5, 1, 0),
+
+AK4531_SINGLE("AD Input Select", 0, AK4531_AD_IN, 0, 1, 0),
+AK4531_SINGLE("Mic Boost (+30dB)", 0, AK4531_MIC_GAIN, 0, 1, 0)
+};
+
+static int snd_ak4531_free(ak4531_t *ak4531)
+{
+ if (ak4531) {
+ if (ak4531->private_free)
+ ak4531->private_free(ak4531);
+ kfree(ak4531);
+ }
+ return 0;
+}
+
+static int snd_ak4531_dev_free(snd_device_t *device)
+{
+ ak4531_t *ak4531 = device->device_data;
+ return snd_ak4531_free(ak4531);
+}
+
+static u8 snd_ak4531_initial_map[0x19 + 1] = {
+ 0x9f, /* 00: Master Volume Lch */
+ 0x9f, /* 01: Master Volume Rch */
+ 0x9f, /* 02: Voice Volume Lch */
+ 0x9f, /* 03: Voice Volume Rch */
+ 0x9f, /* 04: FM Volume Lch */
+ 0x9f, /* 05: FM Volume Rch */
+ 0x9f, /* 06: CD Audio Volume Lch */
+ 0x9f, /* 07: CD Audio Volume Rch */
+ 0x9f, /* 08: Line Volume Lch */
+ 0x9f, /* 09: Line Volume Rch */
+ 0x9f, /* 0a: Aux Volume Lch */
+ 0x9f, /* 0b: Aux Volume Rch */
+ 0x9f, /* 0c: Mono1 Volume */
+ 0x9f, /* 0d: Mono2 Volume */
+ 0x9f, /* 0e: Mic Volume */
+ 0x87, /* 0f: Mono-out Volume */
+ 0x00, /* 10: Output Mixer SW1 */
+ 0x00, /* 11: Output Mixer SW2 */
+ 0x00, /* 12: Lch Input Mixer SW1 */
+ 0x00, /* 13: Rch Input Mixer SW1 */
+ 0x00, /* 14: Lch Input Mixer SW2 */
+ 0x00, /* 15: Rch Input Mixer SW2 */
+ 0x00, /* 16: Reset & Power Down */
+ 0x00, /* 17: Clock Select */
+ 0x00, /* 18: AD Input Select */
+ 0x01 /* 19: Mic Amp Setup */
+};
+
+int snd_ak4531_mixer(snd_card_t * card, ak4531_t * _ak4531, ak4531_t ** rak4531)
+{
+ unsigned int idx;
+ int err;
+ ak4531_t * ak4531;
+ static snd_device_ops_t ops = {
+ .dev_free = snd_ak4531_dev_free,
+ };
+
+ snd_assert(rak4531 != NULL, return -EINVAL);
+ *rak4531 = NULL;
+ snd_assert(card != NULL && _ak4531 != NULL, return -EINVAL);
+ ak4531 = kcalloc(1, sizeof(*ak4531), GFP_KERNEL);
+ if (ak4531 == NULL)
+ return -ENOMEM;
+ *ak4531 = *_ak4531;
+ init_MUTEX(&ak4531->reg_mutex);
+ if ((err = snd_component_add(card, "AK4531")) < 0) {
+ snd_ak4531_free(ak4531);
+ return err;
+ }
+ strcpy(card->mixername, "Asahi Kasei AK4531");
+ ak4531->write(ak4531, AK4531_RESET, 0x03); /* no RST, PD */
+ udelay(100);
+ ak4531->write(ak4531, AK4531_CLOCK, 0x00); /* CODEC ADC and CODEC DAC use {LR,B}CLK2 and run off LRCLK2 PLL */
+ for (idx = 0; idx < 0x19; idx++) {
+ if (idx == AK4531_RESET || idx == AK4531_CLOCK)
+ continue;
+ ak4531->write(ak4531, idx, ak4531->regs[idx] = snd_ak4531_initial_map[idx]); /* recording source is mixer */
+ }
+ for (idx = 0; idx < ARRAY_SIZE(snd_ak4531_controls); idx++) {
+ if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_ak4531_controls[idx], ak4531))) < 0) {
+ snd_ak4531_free(ak4531);
+ return err;
+ }
+ }
+ snd_ak4531_proc_init(card, ak4531);
+ if ((err = snd_device_new(card, SNDRV_DEV_CODEC, ak4531, &ops)) < 0) {
+ snd_ak4531_free(ak4531);
+ return err;
+ }
+
+#if 0
+ snd_ak4531_dump(ak4531);
+#endif
+ *rak4531 = ak4531;
+ return 0;
+}
+
+/*
+
+ */
+
+static void snd_ak4531_proc_read(snd_info_entry_t *entry,
+ snd_info_buffer_t * buffer)
+{
+ ak4531_t *ak4531 = entry->private_data;
+
+ snd_iprintf(buffer, "Asahi Kasei AK4531\n\n");
+ snd_iprintf(buffer, "Recording source : %s\n"
+ "MIC gain : %s\n",
+ ak4531->regs[AK4531_AD_IN] & 1 ? "external" : "mixer",
+ ak4531->regs[AK4531_MIC_GAIN] & 1 ? "+30dB" : "+0dB");
+}
+
+static void snd_ak4531_proc_init(snd_card_t * card, ak4531_t * ak4531)
+{
+ snd_info_entry_t *entry;
+
+ if (! snd_card_proc_new(card, "ak4531", &entry))
+ snd_info_set_text_ops(entry, ak4531, 1024, snd_ak4531_proc_read);
+}
+
+EXPORT_SYMBOL(snd_ak4531_mixer);
+
+/*
+ * INIT part
+ */
+
+static int __init alsa_ak4531_init(void)
+{
+ return 0;
+}
+
+static void __exit alsa_ak4531_exit(void)
+{
+}
+
+module_init(alsa_ak4531_init)
+module_exit(alsa_ak4531_exit)
diff --git a/sound/pci/ali5451/Makefile b/sound/pci/ali5451/Makefile
new file mode 100644
index 000000000000..2e1831597474
--- /dev/null
+++ b/sound/pci/ali5451/Makefile
@@ -0,0 +1,9 @@
+#
+# Makefile for ALSA
+# Copyright (c) 2001 by Jaroslav Kysela <perex@suse.cz>
+#
+
+snd-ali5451-objs := ali5451.o
+
+# Toplevel Module Dependency
+obj-$(CONFIG_SND_ALI5451) += snd-ali5451.o
diff --git a/sound/pci/ali5451/ali5451.c b/sound/pci/ali5451/ali5451.c
new file mode 100644
index 000000000000..984d5d4ba4e1
--- /dev/null
+++ b/sound/pci/ali5451/ali5451.c
@@ -0,0 +1,2282 @@
+/*
+ * Matt Wu <Matt_Wu@acersoftech.com.cn>
+ * Apr 26, 2001
+ * Routines for control of ALi pci audio M5451
+ *
+ * BUGS:
+ * --
+ *
+ * TODO:
+ * --
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public Lcodecnse as published by
+ * the Free Software Foundation; either version 2 of the Lcodecnse, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public Lcodecnse for more details.
+ *
+ * You should have received a copy of the GNU General Public Lcodecnse
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <sound/driver.h>
+#include <asm/io.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/moduleparam.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/info.h>
+#include <sound/ac97_codec.h>
+#include <sound/mpu401.h>
+#include <sound/initval.h>
+
+MODULE_AUTHOR("Matt Wu <Matt_Wu@acersoftech.com.cn>");
+MODULE_DESCRIPTION("ALI M5451");
+MODULE_LICENSE("GPL");
+MODULE_SUPPORTED_DEVICE("{{ALI,M5451,pci},{ALI,M5451}}");
+
+static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
+static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
+static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
+static int pcm_channels[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 32};
+static int spdif[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 0};
+
+module_param_array(index, int, NULL, 0444);
+MODULE_PARM_DESC(index, "Index value for ALI M5451 PCI Audio.");
+module_param_array(id, charp, NULL, 0444);
+MODULE_PARM_DESC(id, "ID string for ALI M5451 PCI Audio.");
+module_param_array(enable, bool, NULL, 0444);
+MODULE_PARM_DESC(enable, "Enable ALI 5451 PCI Audio.");
+module_param_array(pcm_channels, int, NULL, 0444);
+MODULE_PARM_DESC(pcm_channels, "PCM Channels");
+module_param_array(spdif, bool, NULL, 0444);
+MODULE_PARM_DESC(spdif, "Support SPDIF I/O");
+
+/*
+ * Debug part definitions
+ */
+
+//#define ALI_DEBUG
+
+#ifdef ALI_DEBUG
+#define snd_ali_printk(format, args...) printk(format, ##args);
+#else
+#define snd_ali_printk(format, args...)
+#endif
+
+/*
+ * Constants definition
+ */
+
+#ifndef PCI_VENDOR_ID_ALI
+#define PCI_VENDOR_ID_ALI 0x10b9
+#endif
+
+#ifndef PCI_DEVICE_ID_ALI_5451
+#define PCI_DEVICE_ID_ALI_5451 0x5451
+#endif
+
+#define DEVICE_ID_ALI5451 ((PCI_VENDOR_ID_ALI<<16)|PCI_DEVICE_ID_ALI_5451)
+
+
+#define ALI_CHANNELS 32
+
+#define ALI_PCM_IN_CHANNEL 31
+#define ALI_SPDIF_IN_CHANNEL 19
+#define ALI_SPDIF_OUT_CHANNEL 15
+#define ALI_CENTER_CHANNEL 24
+#define ALI_LEF_CHANNEL 23
+#define ALI_SURR_LEFT_CHANNEL 26
+#define ALI_SURR_RIGHT_CHANNEL 25
+
+#define SNDRV_ALI_VOICE_TYPE_PCM 01
+#define SNDRV_ALI_VOICE_TYPE_OTH 02
+
+#define ALI_5451_V02 0x02
+
+/*
+ * Direct Registers
+ */
+
+#define ALI_LEGACY_DMAR0 0x00 // ADR0
+#define ALI_LEGACY_DMAR4 0x04 // CNT0
+#define ALI_LEGACY_DMAR11 0x0b // MOD
+#define ALI_LEGACY_DMAR15 0x0f // MMR
+#define ALI_MPUR0 0x20
+#define ALI_MPUR1 0x21
+#define ALI_MPUR2 0x22
+#define ALI_MPUR3 0x23
+
+#define ALI_AC97_WRITE 0x40
+#define ALI_AC97_READ 0x44
+
+#define ALI_SCTRL 0x48
+#define ALI_SPDIF_OUT_ENABLE 0x20
+#define ALI_AC97_GPIO 0x4c
+#define ALI_SPDIF_CS 0x70
+#define ALI_SPDIF_CTRL 0x74
+#define ALI_SPDIF_IN_FUNC_ENABLE 0x02
+#define ALI_SPDIF_IN_CH_STATUS 0x40
+#define ALI_SPDIF_OUT_CH_STATUS 0xbf
+#define ALI_START 0x80
+#define ALI_STOP 0x84
+#define ALI_CSPF 0x90
+#define ALI_AINT 0x98
+#define ALI_GC_CIR 0xa0
+ #define ENDLP_IE 0x00001000
+ #define MIDLP_IE 0x00002000
+#define ALI_AINTEN 0xa4
+#define ALI_VOLUME 0xa8
+#define ALI_SBDELTA_DELTA_R 0xac
+#define ALI_MISCINT 0xb0
+ #define ADDRESS_IRQ 0x00000020
+ #define TARGET_REACHED 0x00008000
+ #define MIXER_OVERFLOW 0x00000800
+ #define MIXER_UNDERFLOW 0x00000400
+#define ALI_SBBL_SBCL 0xc0
+#define ALI_SBCTRL_SBE2R_SBDD 0xc4
+#define ALI_STIMER 0xc8
+#define ALI_GLOBAL_CONTROL 0xd4
+#define ALI_SPDIF_OUT_SEL_PCM 0x00000400 /* bit 10 */
+#define ALI_SPDIF_IN_SUPPORT 0x00000800 /* bit 11 */
+#define ALI_SPDIF_OUT_CH_ENABLE 0x00008000 /* bit 15 */
+#define ALI_SPDIF_IN_CH_ENABLE 0x00080000 /* bit 19 */
+#define ALI_PCM_IN_ENABLE 0x80000000 /* bit 31 */
+
+#define ALI_CSO_ALPHA_FMS 0xe0
+#define ALI_LBA 0xe4
+#define ALI_ESO_DELTA 0xe8
+#define ALI_GVSEL_PAN_VOC_CTRL_EC 0xf0
+#define ALI_EBUF1 0xf4
+#define ALI_EBUF2 0xf8
+
+#define ALI_REG(codec, x) ((codec)->port + x)
+
+typedef struct snd_stru_ali ali_t;
+typedef struct snd_ali_stru_voice snd_ali_voice_t;
+
+typedef struct snd_ali_channel_control {
+ // register data
+ struct REGDATA {
+ unsigned int start;
+ unsigned int stop;
+ unsigned int aint;
+ unsigned int ainten;
+ } data;
+
+ // register addresses
+ struct REGS {
+ unsigned int start;
+ unsigned int stop;
+ unsigned int aint;
+ unsigned int ainten;
+ unsigned int ac97read;
+ unsigned int ac97write;
+ } regs;
+
+} snd_ali_channel_control_t;
+
+struct snd_ali_stru_voice {
+ unsigned int number;
+ unsigned int use: 1,
+ pcm: 1,
+ midi: 1,
+ mode: 1,
+ synth: 1;
+
+ /* PCM data */
+ ali_t *codec;
+ snd_pcm_substream_t *substream;
+ snd_ali_voice_t *extra;
+
+ unsigned int running: 1;
+
+ int eso; /* final ESO value for channel */
+ int count; /* runtime->period_size */
+
+ /* --- */
+
+ void *private_data;
+ void (*private_free)(void *private_data);
+};
+
+
+typedef struct snd_stru_alidev {
+
+ snd_ali_voice_t voices[ALI_CHANNELS];
+
+ unsigned int chcnt; /* num of opened channels */
+ unsigned int chmap; /* bitmap for opened channels */
+ unsigned int synthcount;
+
+} alidev_t;
+
+
+#ifdef CONFIG_PM
+#define ALI_GLOBAL_REGS 56
+#define ALI_CHANNEL_REGS 8
+typedef struct snd_ali_image {
+ unsigned long regs[ALI_GLOBAL_REGS];
+ unsigned long channel_regs[ALI_CHANNELS][ALI_CHANNEL_REGS];
+} ali_image_t;
+#endif
+
+
+struct snd_stru_ali {
+ unsigned long irq;
+ unsigned long port;
+ unsigned char revision;
+
+ unsigned int hw_initialized: 1;
+ unsigned int spdif_support: 1;
+
+ struct pci_dev *pci;
+ struct pci_dev *pci_m1533;
+ struct pci_dev *pci_m7101;
+
+ snd_card_t *card;
+ snd_pcm_t *pcm;
+ alidev_t synth;
+ snd_ali_channel_control_t chregs;
+
+ /* S/PDIF Mask */
+ unsigned int spdif_mask;
+
+ unsigned int spurious_irq_count;
+ unsigned int spurious_irq_max_delta;
+
+ ac97_bus_t *ac97_bus;
+ ac97_t *ac97;
+ unsigned short ac97_ext_id;
+ unsigned short ac97_ext_status;
+
+ spinlock_t reg_lock;
+ spinlock_t voice_alloc;
+
+#ifdef CONFIG_PM
+ ali_image_t *image;
+#endif
+};
+
+static struct pci_device_id snd_ali_ids[] = {
+ {0x10b9, 0x5451, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, },
+ {0, }
+};
+MODULE_DEVICE_TABLE(pci, snd_ali_ids);
+
+static void snd_ali_clear_voices(ali_t *, unsigned int, unsigned int);
+static unsigned short snd_ali_codec_peek(ali_t *, int, unsigned short);
+static void snd_ali_codec_poke(ali_t *, int, unsigned short, unsigned short);
+
+/*
+ * Debug Part
+ */
+
+#ifdef ALI_DEBUG
+
+static void ali_read_regs(ali_t *codec, int channel)
+{
+ int i,j;
+ unsigned int dwVal;
+
+ printk("channel %d registers map:\n", channel);
+ outb((unsigned char)(channel & 0x001f), ALI_REG(codec,ALI_GC_CIR));
+
+ printk(" ");
+ for(j=0;j<8;j++)
+ printk("%2.2x ", j*4);
+ printk("\n");
+
+ for (i=0; i<=0xf8/4;i++) {
+ if(i%8 == 0)
+ printk("%2.2x ", (i*4/0x10)*0x10);
+ dwVal = inl(ALI_REG(codec,i*4));
+ printk("%8.8x ", dwVal);
+ if ((i+1)%8 == 0)
+ printk("\n");
+ }
+ printk("\n");
+}
+static void ali_read_cfg(unsigned int vendor, unsigned deviceid)
+{
+ unsigned int dwVal;
+ struct pci_dev *pci_dev = NULL;
+ int i,j;
+
+
+ pci_dev = pci_find_device(vendor, deviceid, pci_dev);
+ if (pci_dev == NULL)
+ return ;
+
+ printk("\nM%x PCI CFG\n", deviceid);
+ printk(" ");
+ for(j=0;j<8;j++)
+ printk("%d ",j);
+ printk("\n");
+
+ for(i=0;i<8;i++) {
+ printk("%d ",i);
+ for(j=0;j<8;j++)
+ {
+ pci_read_config_dword(pci_dev, i*0x20+j*4, &dwVal);
+ printk("%8.8x ", dwVal);
+ }
+ printk("\n");
+ }
+ }
+static void ali_read_ac97regs(ali_t *codec, int secondary)
+{
+ unsigned short i,j;
+ unsigned short wVal;
+
+ printk("\ncodec %d registers map:\n", secondary);
+
+ printk(" ");
+ for(j=0;j<8;j++)
+ printk("%2.2x ",j*2);
+ printk("\n");
+
+ for (i=0; i<64;i++) {
+ if(i%8 == 0)
+ printk("%2.2x ", (i/8)*0x10);
+ wVal = snd_ali_codec_peek(codec, secondary, i*2);
+ printk("%4.4x ", wVal);
+ if ((i+1)%8 == 0)
+ printk("\n");
+ }
+ printk("\n");
+}
+
+#endif
+
+/*
+ * AC97 ACCESS
+ */
+
+static inline unsigned int snd_ali_5451_peek(ali_t *codec,
+ unsigned int port )
+{
+ return (unsigned int)inl(ALI_REG(codec, port));
+}
+
+static inline void snd_ali_5451_poke( ali_t *codec,
+ unsigned int port,
+ unsigned int val )
+{
+ outl((unsigned int)val, ALI_REG(codec, port));
+}
+
+static int snd_ali_codec_ready( ali_t *codec,
+ unsigned int port,
+ int sched )
+{
+ unsigned long end_time;
+ unsigned int res;
+
+ end_time = jiffies + 10 * (HZ >> 2);
+ do {
+ res = snd_ali_5451_peek(codec,port);
+ if (! (res & 0x8000))
+ return 0;
+ if (sched) {
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(1);
+ }
+ } while (time_after_eq(end_time, jiffies));
+ snd_ali_5451_poke(codec, port, res & ~0x8000);
+ snd_printdd("ali_codec_ready: codec is not ready.\n ");
+ return -EIO;
+}
+
+static int snd_ali_stimer_ready(ali_t *codec, int sched)
+{
+ unsigned long end_time;
+ unsigned long dwChk1,dwChk2;
+
+ dwChk1 = snd_ali_5451_peek(codec, ALI_STIMER);
+ dwChk2 = snd_ali_5451_peek(codec, ALI_STIMER);
+
+ end_time = jiffies + 10 * (HZ >> 2);
+ do {
+ dwChk2 = snd_ali_5451_peek(codec, ALI_STIMER);
+ if (dwChk2 != dwChk1)
+ return 0;
+ if (sched) {
+ set_current_state(TASK_UNINTERRUPTIBLE);
+ schedule_timeout(1);
+ }
+ } while (time_after_eq(end_time, jiffies));
+ snd_printk("ali_stimer_read: stimer is not ready.\n");
+ return -EIO;
+}
+
+static void snd_ali_codec_poke(ali_t *codec,int secondary,
+ unsigned short reg,
+ unsigned short val)
+{
+ unsigned int dwVal = 0;
+ unsigned int port = 0;
+
+ if (reg >= 0x80) {
+ snd_printk("ali_codec_poke: reg(%xh) invalid.\n", reg);
+ return;
+ }
+
+ port = codec->chregs.regs.ac97write;
+
+ if (snd_ali_codec_ready(codec, port, 0) < 0)
+ return;
+ if (snd_ali_stimer_ready(codec, 0) < 0)
+ return;
+
+ dwVal = (unsigned int) (reg & 0xff);
+ dwVal |= 0x8000 | (val << 16);
+ if (secondary) dwVal |= 0x0080;
+ if (codec->revision == ALI_5451_V02) dwVal |= 0x0100;
+
+ snd_ali_5451_poke(codec,port,dwVal);
+
+ return ;
+}
+
+static unsigned short snd_ali_codec_peek( ali_t *codec,
+ int secondary,
+ unsigned short reg)
+{
+ unsigned int dwVal = 0;
+ unsigned int port = 0;
+
+ if (reg >= 0x80) {
+ snd_printk("ali_codec_peek: reg(%xh) invalid.\n", reg);
+ return ~0;
+ }
+
+ port = codec->chregs.regs.ac97read;
+
+ if (snd_ali_codec_ready(codec, port, 0) < 0)
+ return ~0;
+ if (snd_ali_stimer_ready(codec, 0) < 0)
+ return ~0;
+
+ dwVal = (unsigned int) (reg & 0xff);
+ dwVal |= 0x8000; /* bit 15*/
+ if (secondary) dwVal |= 0x0080;
+
+ snd_ali_5451_poke(codec, port, dwVal);
+
+ if (snd_ali_stimer_ready(codec, 0) < 0)
+ return ~0;
+ if (snd_ali_codec_ready(codec, port, 0) < 0)
+ return ~0;
+
+ return (snd_ali_5451_peek(codec, port) & 0xffff0000)>>16;
+}
+
+static void snd_ali_codec_write(ac97_t *ac97,
+ unsigned short reg,
+ unsigned short val )
+{
+ ali_t *codec = ac97->private_data;
+
+ snd_ali_printk("codec_write: reg=%xh data=%xh.\n", reg, val);
+ snd_ali_codec_poke(codec, 0, reg, val);
+ return ;
+}
+
+
+static unsigned short snd_ali_codec_read(ac97_t *ac97, unsigned short reg)
+{
+ ali_t *codec = ac97->private_data;
+
+ snd_ali_printk("codec_read reg=%xh.\n", reg);
+ return (snd_ali_codec_peek(codec, 0, reg));
+}
+
+/*
+ * AC97 Reset
+ */
+
+static int snd_ali_reset_5451(ali_t *codec)
+{
+ struct pci_dev *pci_dev = NULL;
+ unsigned short wCount, wReg;
+ unsigned int dwVal;
+
+ if ((pci_dev = codec->pci_m1533) != NULL) {
+ pci_read_config_dword(pci_dev, 0x7c, &dwVal);
+ pci_write_config_dword(pci_dev, 0x7c, dwVal | 0x08000000);
+ udelay(5000);
+ pci_read_config_dword(pci_dev, 0x7c, &dwVal);
+ pci_write_config_dword(pci_dev, 0x7c, dwVal & 0xf7ffffff);
+ udelay(5000);
+ }
+
+ pci_dev = codec->pci;
+ pci_read_config_dword(pci_dev, 0x44, &dwVal);
+ pci_write_config_dword(pci_dev, 0x44, dwVal | 0x000c0000);
+ udelay(500);
+ pci_read_config_dword(pci_dev, 0x44, &dwVal);
+ pci_write_config_dword(pci_dev, 0x44, dwVal & 0xfffbffff);
+ udelay(5000);
+
+ wCount = 200;
+ while(wCount--) {
+ wReg = snd_ali_codec_peek(codec, 0, AC97_POWERDOWN);
+ if((wReg & 0x000f) == 0x000f)
+ return 0;
+ udelay(5000);
+ }
+
+ /* non-fatal if you have a non PM capable codec */
+ /* snd_printk(KERN_WARNING "ali5451: reset time out\n"); */
+ return 0;
+}
+
+#ifdef CODEC_RESET
+
+static int snd_ali_reset_codec(ali_t *codec)
+{
+ struct pci_dev *pci_dev = NULL;
+ unsigned char bVal = 0;
+ unsigned int dwVal;
+ unsigned short wCount, wReg;
+
+ pci_dev = codec->pci_m1533;
+
+ pci_read_config_dword(pci_dev, 0x7c, &dwVal);
+ pci_write_config_dword(pci_dev, 0x7c, dwVal | 0x08000000);
+ udelay(5000);
+ pci_read_config_dword(pci_dev, 0x7c, &dwVal);
+ pci_write_config_dword(pci_dev, 0x7c, dwVal & 0xf7ffffff);
+ udelay(5000);
+
+ bVal = inb(ALI_REG(codec,ALI_SCTRL));
+ bVal |= 0x02;
+ outb(ALI_REG(codec,ALI_SCTRL),bVal);
+ udelay(5000);
+ bVal = inb(ALI_REG(codec,ALI_SCTRL));
+ bVal &= 0xfd;
+ outb(ALI_REG(codec,ALI_SCTRL),bVal);
+ udelay(15000);
+
+ wCount = 200;
+ while(wCount--) {
+ wReg = snd_ali_codec_read(codec->ac97, AC97_POWERDOWN);
+ if((wReg & 0x000f) == 0x000f)
+ return 0;
+ udelay(5000);
+ }
+ return -1;
+}
+
+#endif
+
+/*
+ * ALI 5451 Controller
+ */
+
+static void snd_ali_enable_special_channel(ali_t *codec, unsigned int channel)
+{
+ unsigned long dwVal = 0;
+
+ dwVal = inl(ALI_REG(codec,ALI_GLOBAL_CONTROL));
+ dwVal |= 1 << (channel & 0x0000001f);
+ outl(dwVal, ALI_REG(codec,ALI_GLOBAL_CONTROL));
+}
+
+static void snd_ali_disable_special_channel(ali_t *codec, unsigned int channel)
+{
+ unsigned long dwVal = 0;
+
+ dwVal = inl(ALI_REG(codec,ALI_GLOBAL_CONTROL));
+ dwVal &= ~(1 << (channel & 0x0000001f));
+ outl(dwVal, ALI_REG(codec,ALI_GLOBAL_CONTROL));
+}
+
+static void snd_ali_enable_address_interrupt(ali_t * codec)
+{
+ unsigned int gc;
+
+ gc = inl(ALI_REG(codec, ALI_GC_CIR));
+ gc |= ENDLP_IE;
+ gc |= MIDLP_IE;
+ outl( gc, ALI_REG(codec, ALI_GC_CIR));
+}
+
+static void snd_ali_disable_address_interrupt(ali_t * codec)
+{
+ unsigned int gc;
+
+ gc = inl(ALI_REG(codec, ALI_GC_CIR));
+ gc &= ~ENDLP_IE;
+ gc &= ~MIDLP_IE;
+ outl(gc, ALI_REG(codec, ALI_GC_CIR));
+}
+
+#if 0 // not used
+static void snd_ali_enable_voice_irq(ali_t *codec, unsigned int channel)
+{
+ unsigned int mask;
+ snd_ali_channel_control_t *pchregs = &(codec->chregs);
+
+ snd_ali_printk("enable_voice_irq channel=%d\n",channel);
+
+ mask = 1 << (channel & 0x1f);
+ pchregs->data.ainten = inl(ALI_REG(codec,pchregs->regs.ainten));
+ pchregs->data.ainten |= mask;
+ outl(pchregs->data.ainten,ALI_REG(codec,pchregs->regs.ainten));
+}
+#endif
+
+static void snd_ali_disable_voice_irq(ali_t *codec, unsigned int channel)
+{
+ unsigned int mask;
+ snd_ali_channel_control_t *pchregs = &(codec->chregs);
+
+ snd_ali_printk("disable_voice_irq channel=%d\n",channel);
+
+ mask = 1 << (channel & 0x1f);
+ pchregs->data.ainten = inl(ALI_REG(codec,pchregs->regs.ainten));
+ pchregs->data.ainten &= ~mask;
+ outl(pchregs->data.ainten,ALI_REG(codec,pchregs->regs.ainten));
+}
+
+static int snd_ali_alloc_pcm_channel(ali_t *codec, int channel)
+{
+ unsigned int idx = channel & 0x1f;
+
+ if (codec->synth.chcnt >= ALI_CHANNELS){
+ snd_printk("ali_alloc_pcm_channel: no free channels.\n");
+ return -1;
+ }
+
+ if (!(codec->synth.chmap & (1 << idx))) {
+ codec->synth.chmap |= 1 << idx;
+ codec->synth.chcnt++;
+ snd_ali_printk("alloc_pcm_channel no. %d.\n",idx);
+ return idx;
+ }
+ return -1;
+}
+
+static int snd_ali_find_free_channel(ali_t * codec, int rec)
+{
+ int idx;
+ int result = -1;
+
+ snd_ali_printk("find_free_channel: for %s\n",rec ? "rec" : "pcm");
+
+ // recording
+ if (rec) {
+ if (codec->spdif_support &&
+ (inl(ALI_REG(codec, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_IN_SUPPORT))
+ idx = ALI_SPDIF_IN_CHANNEL;
+ else
+ idx = ALI_PCM_IN_CHANNEL;
+
+ if ((result = snd_ali_alloc_pcm_channel(codec,idx)) >= 0) {
+ return result;
+ } else {
+ snd_printk("ali_find_free_channel: record channel is busy now.\n");
+ return -1;
+ }
+ }
+
+ //playback...
+ if (codec->spdif_support &&
+ (inl(ALI_REG(codec, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_OUT_CH_ENABLE)) {
+ idx = ALI_SPDIF_OUT_CHANNEL;
+ if ((result = snd_ali_alloc_pcm_channel(codec,idx)) >= 0) {
+ return result;
+ } else {
+ snd_printk("ali_find_free_channel: S/PDIF out channel is in busy now.\n");
+ }
+ }
+
+ for (idx = 0; idx < ALI_CHANNELS; idx++) {
+ if ((result = snd_ali_alloc_pcm_channel(codec,idx)) >= 0)
+ return result;
+ }
+ snd_printk("ali_find_free_channel: no free channels.\n");
+ return -1;
+}
+
+static void snd_ali_free_channel_pcm(ali_t *codec, int channel)
+{
+ unsigned int idx = channel & 0x0000001f;
+
+ snd_ali_printk("free_channel_pcm channel=%d\n",channel);
+
+ if (channel < 0 || channel >= ALI_CHANNELS)
+ return;
+
+ if (!(codec->synth.chmap & (1 << idx))) {
+ snd_printk("ali_free_channel_pcm: channel %d is not in use.\n",channel);
+ return;
+ } else {
+ codec->synth.chmap &= ~(1 << idx);
+ codec->synth.chcnt--;
+ }
+}
+
+#if 0 // not used
+static void snd_ali_start_voice(ali_t * codec, unsigned int channel)
+{
+ unsigned int mask = 1 << (channel & 0x1f);
+
+ snd_ali_printk("start_voice: channel=%d\n",channel);
+ outl(mask, ALI_REG(codec,codec->chregs.regs.start));
+}
+#endif
+
+static void snd_ali_stop_voice(ali_t * codec, unsigned int channel)
+{
+ unsigned int mask = 1 << (channel & 0x1f);
+
+ snd_ali_printk("stop_voice: channel=%d\n",channel);
+ outl(mask, ALI_REG(codec, codec->chregs.regs.stop));
+}
+
+/*
+ * S/PDIF Part
+ */
+
+static void snd_ali_delay(ali_t *codec,int interval)
+{
+ unsigned long begintimer,currenttimer;
+
+ begintimer = inl(ALI_REG(codec, ALI_STIMER));
+ currenttimer = inl(ALI_REG(codec, ALI_STIMER));
+
+ while (currenttimer < begintimer + interval) {
+ if(snd_ali_stimer_ready(codec, 1) < 0)
+ break;
+ currenttimer = inl(ALI_REG(codec, ALI_STIMER));
+ }
+}
+
+static void snd_ali_detect_spdif_rate(ali_t *codec)
+{
+ u16 wval = 0;
+ u16 count = 0;
+ u8 bval = 0, R1 = 0, R2 = 0;
+
+ bval = inb(ALI_REG(codec,ALI_SPDIF_CTRL + 1));
+ bval |= 0x1F;
+ outb(bval,ALI_REG(codec,ALI_SPDIF_CTRL + 1));
+
+ while (((R1 < 0x0B )||(R1 > 0x0E)) && (R1 != 0x12) && count <= 50000) {
+ count ++;
+ snd_ali_delay(codec, 6);
+ bval = inb(ALI_REG(codec,ALI_SPDIF_CTRL + 1));
+ R1 = bval & 0x1F;
+ }
+
+ if (count > 50000) {
+ snd_printk("ali_detect_spdif_rate: timeout!\n");
+ return;
+ }
+
+ count = 0;
+ while (count++ <= 50000) {
+ snd_ali_delay(codec, 6);
+ bval = inb(ALI_REG(codec,ALI_SPDIF_CTRL + 1));
+ R2 = bval & 0x1F;
+ if (R2 != R1) R1 = R2; else break;
+ }
+
+ if (count > 50000) {
+ snd_printk("ali_detect_spdif_rate: timeout!\n");
+ return;
+ }
+
+ if (R2 >= 0x0b && R2 <= 0x0e) {
+ wval = inw(ALI_REG(codec,ALI_SPDIF_CTRL + 2));
+ wval &= 0xE0F0;
+ wval |= (u16)0x09 << 8 | (u16)0x05;
+ outw(wval,ALI_REG(codec,ALI_SPDIF_CTRL + 2));
+
+ bval = inb(ALI_REG(codec,ALI_SPDIF_CS +3)) & 0xF0;
+ outb(bval|0x02,ALI_REG(codec,ALI_SPDIF_CS + 3));
+ } else if (R2 == 0x12) {
+ wval = inw(ALI_REG(codec,ALI_SPDIF_CTRL + 2));
+ wval &= 0xE0F0;
+ wval |= (u16)0x0E << 8 | (u16)0x08;
+ outw(wval,ALI_REG(codec,ALI_SPDIF_CTRL + 2));
+
+ bval = inb(ALI_REG(codec,ALI_SPDIF_CS +3)) & 0xF0;
+ outb(bval|0x03,ALI_REG(codec,ALI_SPDIF_CS + 3));
+ }
+}
+
+static unsigned int snd_ali_get_spdif_in_rate(ali_t *codec)
+{
+ u32 dwRate = 0;
+ u8 bval = 0;
+
+ bval = inb(ALI_REG(codec,ALI_SPDIF_CTRL));
+ bval &= 0x7F;
+ bval |= 0x40;
+ outb(bval, ALI_REG(codec,ALI_SPDIF_CTRL));
+
+ snd_ali_detect_spdif_rate(codec);
+
+ bval = inb(ALI_REG(codec,ALI_SPDIF_CS + 3));
+ bval &= 0x0F;
+
+ if (bval == 0) dwRate = 44100;
+ if (bval == 1) dwRate = 48000;
+ if (bval == 2) dwRate = 32000;
+
+ return dwRate;
+}
+
+static void snd_ali_enable_spdif_in(ali_t *codec)
+{
+ unsigned int dwVal;
+
+ dwVal = inl(ALI_REG(codec, ALI_GLOBAL_CONTROL));
+ dwVal |= ALI_SPDIF_IN_SUPPORT;
+ outl(dwVal, ALI_REG(codec, ALI_GLOBAL_CONTROL));
+
+ dwVal = inb(ALI_REG(codec, ALI_SPDIF_CTRL));
+ dwVal |= 0x02;
+ outb(dwVal, ALI_REG(codec, ALI_SPDIF_CTRL));
+
+ snd_ali_enable_special_channel(codec, ALI_SPDIF_IN_CHANNEL);
+}
+
+static void snd_ali_disable_spdif_in(ali_t *codec)
+{
+ unsigned int dwVal;
+
+ dwVal = inl(ALI_REG(codec, ALI_GLOBAL_CONTROL));
+ dwVal &= ~ALI_SPDIF_IN_SUPPORT;
+ outl(dwVal, ALI_REG(codec, ALI_GLOBAL_CONTROL));
+
+ snd_ali_disable_special_channel(codec, ALI_SPDIF_IN_CHANNEL);
+}
+
+
+static void snd_ali_set_spdif_out_rate(ali_t *codec, unsigned int rate)
+{
+ unsigned char bVal;
+ unsigned int dwRate = 0;
+
+ if (rate == 32000) dwRate = 0x300;
+ if (rate == 44100) dwRate = 0;
+ if (rate == 48000) dwRate = 0x200;
+
+ bVal = inb(ALI_REG(codec, ALI_SPDIF_CTRL));
+ bVal &= (unsigned char)(~(1<<6));
+
+ bVal |= 0x80; //select right
+ outb(bVal, ALI_REG(codec, ALI_SPDIF_CTRL));
+ outb(dwRate | 0x20, ALI_REG(codec, ALI_SPDIF_CS + 2));
+
+ bVal &= (~0x80); //select left
+ outb(bVal, ALI_REG(codec, ALI_SPDIF_CTRL));
+ outw(rate | 0x10, ALI_REG(codec, ALI_SPDIF_CS + 2));
+}
+
+static void snd_ali_enable_spdif_out(ali_t *codec)
+{
+ unsigned short wVal;
+ unsigned char bVal;
+
+ struct pci_dev *pci_dev = NULL;
+
+ pci_dev = codec->pci_m1533;
+ if (pci_dev == NULL)
+ return;
+ pci_read_config_byte(pci_dev, 0x61, &bVal);
+ bVal |= 0x40;
+ pci_write_config_byte(pci_dev, 0x61, bVal);
+ pci_read_config_byte(pci_dev, 0x7d, &bVal);
+ bVal |= 0x01;
+ pci_write_config_byte(pci_dev, 0x7d, bVal);
+
+ pci_read_config_byte(pci_dev, 0x7e, &bVal);
+ bVal &= (~0x20);
+ bVal |= 0x10;
+ pci_write_config_byte(pci_dev, 0x7e, bVal);
+
+ bVal = inb(ALI_REG(codec, ALI_SCTRL));
+ outb(bVal | ALI_SPDIF_OUT_ENABLE, ALI_REG(codec, ALI_SCTRL));
+
+ bVal = inb(ALI_REG(codec, ALI_SPDIF_CTRL));
+ outb(bVal & ALI_SPDIF_OUT_CH_STATUS, ALI_REG(codec, ALI_SPDIF_CTRL));
+
+ {
+ wVal = inw(ALI_REG(codec, ALI_GLOBAL_CONTROL));
+ wVal |= ALI_SPDIF_OUT_SEL_PCM;
+ outw(wVal, ALI_REG(codec, ALI_GLOBAL_CONTROL));
+ snd_ali_disable_special_channel(codec,ALI_SPDIF_OUT_CHANNEL);
+ }
+}
+
+static void snd_ali_enable_spdif_chnout(ali_t *codec)
+{
+ unsigned short wVal = 0;
+
+ wVal = inw(ALI_REG(codec, ALI_GLOBAL_CONTROL));
+ wVal &= ~ALI_SPDIF_OUT_SEL_PCM;
+ outw(wVal, ALI_REG(codec, ALI_GLOBAL_CONTROL));
+/*
+ wVal = inw(ALI_REG(codec, ALI_SPDIF_CS));
+ if (flag & ALI_SPDIF_OUT_NON_PCM)
+ wVal |= 0x0002;
+ else
+ wVal &= (~0x0002);
+ outw(wVal, ALI_REG(codec, ALI_SPDIF_CS));
+*/
+ snd_ali_enable_special_channel(codec,ALI_SPDIF_OUT_CHANNEL);
+}
+
+static void snd_ali_disable_spdif_chnout(ali_t *codec)
+{
+ unsigned short wVal = 0;
+ wVal = inw(ALI_REG(codec, ALI_GLOBAL_CONTROL));
+ wVal |= ALI_SPDIF_OUT_SEL_PCM;
+ outw(wVal, ALI_REG(codec, ALI_GLOBAL_CONTROL));
+
+ snd_ali_enable_special_channel(codec, ALI_SPDIF_OUT_CHANNEL);
+}
+
+static void snd_ali_disable_spdif_out(ali_t *codec)
+{
+ unsigned char bVal;
+
+ bVal = inb(ALI_REG(codec, ALI_SCTRL));
+ outb(bVal & ~ALI_SPDIF_OUT_ENABLE, ALI_REG(codec, ALI_SCTRL));
+
+ snd_ali_disable_spdif_chnout(codec);
+}
+
+static void snd_ali_update_ptr(ali_t *codec,int channel)
+{
+ snd_ali_voice_t *pvoice = NULL;
+ snd_pcm_runtime_t *runtime;
+ snd_ali_channel_control_t *pchregs = NULL;
+ unsigned int old, mask;
+#ifdef ALI_DEBUG
+ unsigned int temp, cspf;
+#endif
+
+ pchregs = &(codec->chregs);
+
+ // check if interrupt occurred for channel
+ old = pchregs->data.aint;
+ mask = ((unsigned int) 1L) << (channel & 0x1f);
+
+ if (!(old & mask))
+ return;
+
+ pvoice = &codec->synth.voices[channel];
+ runtime = pvoice->substream->runtime;
+
+ udelay(100);
+ spin_lock(&codec->reg_lock);
+
+ if (pvoice->pcm && pvoice->substream) {
+ /* pcm interrupt */
+#ifdef ALI_DEBUG
+ outb((u8)(pvoice->number), ALI_REG(codec, ALI_GC_CIR));
+ temp = inw(ALI_REG(codec, ALI_CSO_ALPHA_FMS + 2));
+ cspf = (inl(ALI_REG(codec, ALI_CSPF)) & mask) == mask;
+#endif
+ if (pvoice->running) {
+ snd_ali_printk("update_ptr: cso=%4.4x cspf=%d.\n",(u16)temp,cspf);
+ spin_unlock(&codec->reg_lock);
+ snd_pcm_period_elapsed(pvoice->substream);
+ spin_lock(&codec->reg_lock);
+ } else {
+ snd_ali_stop_voice(codec, channel);
+ snd_ali_disable_voice_irq(codec, channel);
+ }
+ } else if (codec->synth.voices[channel].synth) {
+ /* synth interrupt */
+ } else if (codec->synth.voices[channel].midi) {
+ /* midi interrupt */
+ } else {
+ /* unknown interrupt */
+ snd_ali_stop_voice(codec, channel);
+ snd_ali_disable_voice_irq(codec, channel);
+ }
+ spin_unlock(&codec->reg_lock);
+ outl(mask,ALI_REG(codec,pchregs->regs.aint));
+ pchregs->data.aint = old & (~mask);
+}
+
+static void snd_ali_interrupt(ali_t * codec)
+{
+ int channel;
+ unsigned int audio_int;
+ snd_ali_channel_control_t *pchregs = NULL;
+ pchregs = &(codec->chregs);
+
+ audio_int = inl(ALI_REG(codec, ALI_MISCINT));
+ if (audio_int & ADDRESS_IRQ) {
+ // get interrupt status for all channels
+ pchregs->data.aint = inl(ALI_REG(codec,pchregs->regs.aint));
+ for (channel = 0; channel < ALI_CHANNELS; channel++) {
+ snd_ali_update_ptr(codec, channel);
+ }
+ }
+ outl((TARGET_REACHED | MIXER_OVERFLOW | MIXER_UNDERFLOW),
+ ALI_REG(codec,ALI_MISCINT));
+}
+
+
+static irqreturn_t snd_ali_card_interrupt(int irq,
+ void *dev_id,
+ struct pt_regs *regs)
+{
+ ali_t *codec = dev_id;
+
+ if (codec == NULL)
+ return IRQ_NONE;
+ snd_ali_interrupt(codec);
+ return IRQ_HANDLED;
+}
+
+
+static snd_ali_voice_t *snd_ali_alloc_voice(ali_t * codec, int type, int rec)
+{
+ snd_ali_voice_t *pvoice = NULL;
+ unsigned long flags;
+ int idx;
+
+ snd_ali_printk("alloc_voice: type=%d rec=%d\n",type,rec);
+
+ spin_lock_irqsave(&codec->voice_alloc, flags);
+ if (type == SNDRV_ALI_VOICE_TYPE_PCM) {
+ idx = snd_ali_find_free_channel(codec,rec);
+ if(idx < 0) {
+ snd_printk("ali_alloc_voice: err.\n");
+ spin_unlock_irqrestore(&codec->voice_alloc, flags);
+ return NULL;
+ }
+ pvoice = &(codec->synth.voices[idx]);
+ pvoice->use = 1;
+ pvoice->pcm = 1;
+ pvoice->mode = rec;
+ spin_unlock_irqrestore(&codec->voice_alloc, flags);
+ return pvoice;
+ }
+ spin_unlock_irqrestore(&codec->voice_alloc, flags);
+ return NULL;
+}
+
+
+static void snd_ali_free_voice(ali_t * codec, snd_ali_voice_t *pvoice)
+{
+ unsigned long flags;
+ void (*private_free)(void *);
+ void *private_data;
+
+ snd_ali_printk("free_voice: channel=%d\n",pvoice->number);
+ if (pvoice == NULL || !pvoice->use)
+ return;
+ snd_ali_clear_voices(codec, pvoice->number, pvoice->number);
+ spin_lock_irqsave(&codec->voice_alloc, flags);
+ private_free = pvoice->private_free;
+ private_data = pvoice->private_data;
+ pvoice->private_free = NULL;
+ pvoice->private_data = NULL;
+ if (pvoice->pcm) {
+ snd_ali_free_channel_pcm(codec, pvoice->number);
+ }
+ pvoice->use = pvoice->pcm = pvoice->synth = 0;
+ pvoice->substream = NULL;
+ spin_unlock_irqrestore(&codec->voice_alloc, flags);
+ if (private_free)
+ private_free(private_data);
+}
+
+
+static void snd_ali_clear_voices(ali_t * codec,
+ unsigned int v_min,
+ unsigned int v_max)
+{
+ unsigned int i;
+
+ for (i = v_min; i <= v_max; i++) {
+ snd_ali_stop_voice(codec, i);
+ snd_ali_disable_voice_irq(codec, i);
+ }
+}
+
+static void snd_ali_write_voice_regs(ali_t * codec,
+ unsigned int Channel,
+ unsigned int LBA,
+ unsigned int CSO,
+ unsigned int ESO,
+ unsigned int DELTA,
+ unsigned int ALPHA_FMS,
+ unsigned int GVSEL,
+ unsigned int PAN,
+ unsigned int VOL,
+ unsigned int CTRL,
+ unsigned int EC)
+{
+ unsigned int ctlcmds[4];
+
+ outb((unsigned char)(Channel & 0x001f),ALI_REG(codec,ALI_GC_CIR));
+
+ ctlcmds[0] = (CSO << 16) | (ALPHA_FMS & 0x0000ffff);
+ ctlcmds[1] = LBA;
+ ctlcmds[2] = (ESO << 16) | (DELTA & 0x0ffff);
+ ctlcmds[3] = (GVSEL << 31) |
+ ((PAN & 0x0000007f) << 24) |
+ ((VOL & 0x000000ff) << 16) |
+ ((CTRL & 0x0000000f) << 12) |
+ (EC & 0x00000fff);
+
+ outb(Channel, ALI_REG(codec, ALI_GC_CIR));
+
+ outl(ctlcmds[0], ALI_REG(codec,ALI_CSO_ALPHA_FMS));
+ outl(ctlcmds[1], ALI_REG(codec,ALI_LBA));
+ outl(ctlcmds[2], ALI_REG(codec,ALI_ESO_DELTA));
+ outl(ctlcmds[3], ALI_REG(codec,ALI_GVSEL_PAN_VOC_CTRL_EC));
+
+ outl(0x30000000, ALI_REG(codec, ALI_EBUF1)); /* Still Mode */
+ outl(0x30000000, ALI_REG(codec, ALI_EBUF2)); /* Still Mode */
+}
+
+static unsigned int snd_ali_convert_rate(unsigned int rate, int rec)
+{
+ unsigned int delta;
+
+ if (rate < 4000) rate = 4000;
+ if (rate > 48000) rate = 48000;
+
+ if (rec) {
+ if (rate == 44100)
+ delta = 0x116a;
+ else if (rate == 8000)
+ delta = 0x6000;
+ else if (rate == 48000)
+ delta = 0x1000;
+ else
+ delta = ((48000 << 12) / rate) & 0x0000ffff;
+ } else {
+ if (rate == 44100)
+ delta = 0xeb3;
+ else if (rate == 8000)
+ delta = 0x2ab;
+ else if (rate == 48000)
+ delta = 0x1000;
+ else
+ delta = (((rate << 12) + rate) / 48000) & 0x0000ffff;
+ }
+
+ return delta;
+}
+
+static unsigned int snd_ali_control_mode(snd_pcm_substream_t *substream)
+{
+ unsigned int CTRL;
+ snd_pcm_runtime_t *runtime = substream->runtime;
+
+ /* set ctrl mode
+ CTRL default: 8-bit (unsigned) mono, loop mode enabled
+ */
+ CTRL = 0x00000001;
+ if (snd_pcm_format_width(runtime->format) == 16)
+ CTRL |= 0x00000008; // 16-bit data
+ if (!snd_pcm_format_unsigned(runtime->format))
+ CTRL |= 0x00000002; // signed data
+ if (runtime->channels > 1)
+ CTRL |= 0x00000004; // stereo data
+ return CTRL;
+}
+
+/*
+ * PCM part
+ */
+
+static int snd_ali_ioctl(snd_pcm_substream_t * substream,
+ unsigned int cmd, void *arg)
+{
+ return snd_pcm_lib_ioctl(substream, cmd, arg);
+}
+
+static int snd_ali_trigger(snd_pcm_substream_t *substream,
+ int cmd)
+
+{
+ ali_t *codec = snd_pcm_substream_chip(substream);
+ struct list_head *pos;
+ snd_pcm_substream_t *s;
+ unsigned int what, whati, capture_flag;
+ snd_ali_voice_t *pvoice = NULL, *evoice = NULL;
+ unsigned int val;
+ int do_start;
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ do_start = 1; break;
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ do_start = 0; break;
+ default:
+ return -EINVAL;
+ }
+
+ what = whati = capture_flag = 0;
+ snd_pcm_group_for_each(pos, substream) {
+ s = snd_pcm_group_substream_entry(pos);
+ if ((ali_t *) snd_pcm_substream_chip(s) == codec) {
+ pvoice = (snd_ali_voice_t *) s->runtime->private_data;
+ evoice = pvoice->extra;
+ what |= 1 << (pvoice->number & 0x1f);
+ if (evoice == NULL) {
+ whati |= 1 << (pvoice->number & 0x1f);
+ } else {
+ whati |= 1 << (evoice->number & 0x1f);
+ what |= 1 << (evoice->number & 0x1f);
+ }
+ if (do_start) {
+ pvoice->running = 1;
+ if (evoice != NULL)
+ evoice->running = 1;
+ } else {
+ pvoice->running = 0;
+ if (evoice != NULL)
+ evoice->running = 0;
+ }
+ snd_pcm_trigger_done(s, substream);
+ if (pvoice->mode)
+ capture_flag = 1;
+ }
+ }
+ spin_lock(&codec->reg_lock);
+ if (! do_start) {
+ outl(what, ALI_REG(codec, ALI_STOP));
+ }
+ val = inl(ALI_REG(codec, ALI_AINTEN));
+ if (do_start) {
+ val |= whati;
+ } else {
+ val &= ~whati;
+ }
+ outl(val, ALI_REG(codec, ALI_AINTEN));
+ if (do_start) {
+ outl(what, ALI_REG(codec, ALI_START));
+ }
+ snd_ali_printk("trigger: what=%xh whati=%xh\n",what,whati);
+ spin_unlock(&codec->reg_lock);
+
+ return 0;
+}
+
+static int snd_ali_playback_hw_params(snd_pcm_substream_t * substream,
+ snd_pcm_hw_params_t * hw_params)
+{
+ ali_t *codec = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ snd_ali_voice_t *pvoice = (snd_ali_voice_t *) runtime->private_data;
+ snd_ali_voice_t *evoice = pvoice->extra;
+ int err;
+ err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
+ if (err < 0) return err;
+
+ /* voice management */
+
+ if (params_buffer_size(hw_params)/2 != params_period_size(hw_params)) {
+ if (evoice == NULL) {
+ evoice = snd_ali_alloc_voice(codec, SNDRV_ALI_VOICE_TYPE_PCM, 0);
+ if (evoice == NULL)
+ return -ENOMEM;
+ pvoice->extra = evoice;
+ evoice->substream = substream;
+ }
+ } else {
+ if (evoice != NULL) {
+ snd_ali_free_voice(codec, evoice);
+ pvoice->extra = evoice = NULL;
+ }
+ }
+
+ return 0;
+}
+
+static int snd_ali_playback_hw_free(snd_pcm_substream_t * substream)
+{
+ ali_t *codec = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ snd_ali_voice_t *pvoice = (snd_ali_voice_t *) runtime->private_data;
+ snd_ali_voice_t *evoice = pvoice ? pvoice->extra : NULL;
+
+ snd_pcm_lib_free_pages(substream);
+ if (evoice != NULL) {
+ snd_ali_free_voice(codec, evoice);
+ pvoice->extra = NULL;
+ }
+ return 0;
+}
+
+static int snd_ali_capture_hw_params(snd_pcm_substream_t * substream,
+ snd_pcm_hw_params_t * hw_params)
+{
+ return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
+}
+
+static int snd_ali_capture_hw_free(snd_pcm_substream_t * substream)
+{
+ return snd_pcm_lib_free_pages(substream);
+}
+
+static int snd_ali_playback_prepare(snd_pcm_substream_t * substream)
+{
+ ali_t *codec = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ snd_ali_voice_t *pvoice = (snd_ali_voice_t *) runtime->private_data;
+ snd_ali_voice_t *evoice = pvoice->extra;
+ unsigned long flags;
+
+ unsigned int LBA;
+ unsigned int Delta;
+ unsigned int ESO;
+ unsigned int CTRL;
+ unsigned int GVSEL;
+ unsigned int PAN;
+ unsigned int VOL;
+ unsigned int EC;
+
+ snd_ali_printk("playback_prepare ...\n");
+
+ spin_lock_irqsave(&codec->reg_lock, flags);
+
+ /* set Delta (rate) value */
+ Delta = snd_ali_convert_rate(runtime->rate, 0);
+
+ if ((pvoice->number == ALI_SPDIF_IN_CHANNEL) ||
+ (pvoice->number == ALI_PCM_IN_CHANNEL))
+ snd_ali_disable_special_channel(codec, pvoice->number);
+ else if (codec->spdif_support &&
+ (inl(ALI_REG(codec, ALI_GLOBAL_CONTROL)) & ALI_SPDIF_OUT_CH_ENABLE)
+ && (pvoice->number == ALI_SPDIF_OUT_CHANNEL)) {
+ snd_ali_set_spdif_out_rate(codec, runtime->rate);
+ Delta = 0x1000;
+ }
+
+ /* set Loop Back Address */
+ LBA = runtime->dma_addr;
+
+ /* set interrupt count size */
+ pvoice->count = runtime->period_size;
+
+ /* set target ESO for channel */
+ pvoice->eso = runtime->buffer_size;
+
+ snd_ali_printk("playback_prepare: eso=%xh count=%xh\n",pvoice->eso,pvoice->count);
+
+ /* set ESO to capture first MIDLP interrupt */
+ ESO = pvoice->eso -1;
+ /* set ctrl mode */
+ CTRL = snd_ali_control_mode(substream);
+
+ GVSEL = 1;
+ PAN = 0;
+ VOL = 0;
+ EC = 0;
+ snd_ali_printk("playback_prepare:\n ch=%d, Rate=%d Delta=%xh,GVSEL=%xh,PAN=%xh,CTRL=%xh\n",pvoice->number,runtime->rate,Delta,GVSEL,PAN,CTRL);
+ snd_ali_write_voice_regs( codec,
+ pvoice->number,
+ LBA,
+ 0, /* cso */
+ ESO,
+ Delta,
+ 0, /* alpha */
+ GVSEL,
+ PAN,
+ VOL,
+ CTRL,
+ EC);
+ if (evoice != NULL) {
+ evoice->count = pvoice->count;
+ evoice->eso = pvoice->count << 1;
+ ESO = evoice->eso - 1;
+ snd_ali_write_voice_regs(codec,
+ evoice->number,
+ LBA,
+ 0, /* cso */
+ ESO,
+ Delta,
+ 0, /* alpha */
+ GVSEL,
+ (unsigned int)0x7f,
+ (unsigned int)0x3ff,
+ CTRL,
+ EC);
+ }
+ spin_unlock_irqrestore(&codec->reg_lock, flags);
+ return 0;
+}
+
+
+static int snd_ali_capture_prepare(snd_pcm_substream_t * substream)
+{
+ ali_t *codec = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ snd_ali_voice_t *pvoice = (snd_ali_voice_t *) runtime->private_data;
+ unsigned long flags;
+ unsigned int LBA;
+ unsigned int Delta;
+ unsigned int ESO;
+ unsigned int CTRL;
+ unsigned int GVSEL;
+ unsigned int PAN;
+ unsigned int VOL;
+ unsigned int EC;
+ u8 bValue;
+
+ spin_lock_irqsave(&codec->reg_lock, flags);
+
+ snd_ali_printk("capture_prepare...\n");
+
+ snd_ali_enable_special_channel(codec,pvoice->number);
+
+ Delta = snd_ali_convert_rate(runtime->rate, 1);
+
+ // Prepare capture intr channel
+ if (pvoice->number == ALI_SPDIF_IN_CHANNEL) {
+
+ unsigned int rate;
+
+ if (codec->revision != ALI_5451_V02) {
+ spin_unlock_irqrestore(&codec->reg_lock, flags);
+ return -1;
+ }
+ rate = snd_ali_get_spdif_in_rate(codec);
+ if (rate == 0) {
+ snd_printk("ali_capture_preapre: spdif rate detect err!\n");
+ rate = 48000;
+ }
+ bValue = inb(ALI_REG(codec,ALI_SPDIF_CTRL));
+ if (bValue & 0x10) {
+ outb(bValue,ALI_REG(codec,ALI_SPDIF_CTRL));
+ printk("clear SPDIF parity error flag.\n");
+ }
+
+ if (rate != 48000)
+ Delta = ((rate << 12)/runtime->rate)&0x00ffff;
+ }
+
+ // set target ESO for channel
+ pvoice->eso = runtime->buffer_size;
+
+ // set interrupt count size
+ pvoice->count = runtime->period_size;
+
+ // set Loop Back Address
+ LBA = runtime->dma_addr;
+
+ // set ESO to capture first MIDLP interrupt
+ ESO = pvoice->eso - 1;
+ CTRL = snd_ali_control_mode(substream);
+ GVSEL = 0;
+ PAN = 0x00;
+ VOL = 0x00;
+ EC = 0;
+
+ snd_ali_write_voice_regs( codec,
+ pvoice->number,
+ LBA,
+ 0, /* cso */
+ ESO,
+ Delta,
+ 0, /* alpha */
+ GVSEL,
+ PAN,
+ VOL,
+ CTRL,
+ EC);
+
+
+ spin_unlock_irqrestore(&codec->reg_lock, flags);
+
+ return 0;
+}
+
+
+static snd_pcm_uframes_t snd_ali_playback_pointer(snd_pcm_substream_t *substream)
+{
+ ali_t *codec = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ snd_ali_voice_t *pvoice = (snd_ali_voice_t *) runtime->private_data;
+ unsigned int cso;
+
+ spin_lock(&codec->reg_lock);
+ if (!pvoice->running) {
+ spin_unlock(&codec->reg_lock);
+ return 0;
+ }
+ outb(pvoice->number, ALI_REG(codec, ALI_GC_CIR));
+ cso = inw(ALI_REG(codec, ALI_CSO_ALPHA_FMS + 2));
+ spin_unlock(&codec->reg_lock);
+ snd_ali_printk("playback pointer returned cso=%xh.\n", cso);
+
+ return cso;
+}
+
+
+static snd_pcm_uframes_t snd_ali_capture_pointer(snd_pcm_substream_t *substream)
+{
+ ali_t *codec = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ snd_ali_voice_t *pvoice = (snd_ali_voice_t *) runtime->private_data;
+ unsigned int cso;
+ unsigned long flags;
+
+ spin_lock_irqsave(&codec->reg_lock, flags);
+ if (!pvoice->running) {
+ spin_unlock_irqrestore(&codec->reg_lock, flags);
+ return 0;
+ }
+ outb(pvoice->number, ALI_REG(codec, ALI_GC_CIR));
+ cso = inw(ALI_REG(codec, ALI_CSO_ALPHA_FMS + 2));
+ spin_unlock_irqrestore(&codec->reg_lock, flags);
+
+ return cso;
+}
+
+static snd_pcm_hardware_t snd_ali_playback =
+{
+ .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_RESUME |
+ SNDRV_PCM_INFO_SYNC_START),
+ .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
+ .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
+ .rate_min = 4000,
+ .rate_max = 48000,
+ .channels_min = 1,
+ .channels_max = 2,
+ .buffer_bytes_max = (256*1024),
+ .period_bytes_min = 64,
+ .period_bytes_max = (256*1024),
+ .periods_min = 1,
+ .periods_max = 1024,
+ .fifo_size = 0,
+};
+
+/*
+ * Capture support device description
+ */
+
+static snd_pcm_hardware_t snd_ali_capture =
+{
+ .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_MMAP_VALID |
+ SNDRV_PCM_INFO_RESUME |
+ SNDRV_PCM_INFO_SYNC_START),
+ .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
+ SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
+ .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
+ .rate_min = 4000,
+ .rate_max = 48000,
+ .channels_min = 1,
+ .channels_max = 2,
+ .buffer_bytes_max = (128*1024),
+ .period_bytes_min = 64,
+ .period_bytes_max = (128*1024),
+ .periods_min = 1,
+ .periods_max = 1024,
+ .fifo_size = 0,
+};
+
+static void snd_ali_pcm_free_substream(snd_pcm_runtime_t *runtime)
+{
+ unsigned long flags;
+ snd_ali_voice_t *pvoice = (snd_ali_voice_t *) runtime->private_data;
+ ali_t *codec;
+
+ if (pvoice) {
+ codec = pvoice->codec;
+ spin_lock_irqsave(&codec->reg_lock, flags);
+ snd_ali_free_voice(pvoice->codec, pvoice);
+ spin_unlock_irqrestore(&codec->reg_lock, flags);
+ }
+}
+
+static int snd_ali_playback_open(snd_pcm_substream_t * substream)
+{
+ ali_t *codec = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ snd_ali_voice_t *pvoice;
+ unsigned long flags = 0;
+
+ spin_lock_irqsave(&codec->reg_lock, flags);
+ pvoice = snd_ali_alloc_voice(codec, SNDRV_ALI_VOICE_TYPE_PCM, 0);
+ if (pvoice == NULL) {
+ spin_unlock_irqrestore(&codec->reg_lock, flags);
+ return -EAGAIN;
+ }
+ pvoice->codec = codec;
+ spin_unlock_irqrestore(&codec->reg_lock, flags);
+
+ pvoice->substream = substream;
+ runtime->private_data = pvoice;
+ runtime->private_free = snd_ali_pcm_free_substream;
+
+ runtime->hw = snd_ali_playback;
+ snd_pcm_set_sync(substream);
+ snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 0, 64*1024);
+ return 0;
+}
+
+
+static int snd_ali_capture_open(snd_pcm_substream_t * substream)
+{
+ ali_t *codec = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ snd_ali_voice_t *pvoice;
+ unsigned long flags;
+
+ spin_lock_irqsave(&codec->reg_lock, flags);
+ pvoice = snd_ali_alloc_voice(codec, SNDRV_ALI_VOICE_TYPE_PCM, 1);
+ if (pvoice == NULL) {
+ spin_unlock_irqrestore(&codec->reg_lock, flags);
+ return -EAGAIN;
+ }
+ pvoice->codec = codec;
+ spin_unlock_irqrestore(&codec->reg_lock, flags);
+
+ pvoice->substream = substream;
+ runtime->private_data = pvoice;
+ runtime->private_free = snd_ali_pcm_free_substream;
+ runtime->hw = snd_ali_capture;
+ snd_pcm_set_sync(substream);
+ snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 0, 64*1024);
+ return 0;
+}
+
+
+static int snd_ali_playback_close(snd_pcm_substream_t * substream)
+{
+ return 0;
+}
+
+static int snd_ali_capture_close(snd_pcm_substream_t * substream)
+{
+ ali_t *codec = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ snd_ali_voice_t *pvoice = (snd_ali_voice_t *) runtime->private_data;
+
+ snd_ali_disable_special_channel(codec,pvoice->number);
+
+ return 0;
+}
+
+static snd_pcm_ops_t snd_ali_playback_ops = {
+ .open = snd_ali_playback_open,
+ .close = snd_ali_playback_close,
+ .ioctl = snd_ali_ioctl,
+ .hw_params = snd_ali_playback_hw_params,
+ .hw_free = snd_ali_playback_hw_free,
+ .prepare = snd_ali_playback_prepare,
+ .trigger = snd_ali_trigger,
+ .pointer = snd_ali_playback_pointer,
+};
+
+static snd_pcm_ops_t snd_ali_capture_ops = {
+ .open = snd_ali_capture_open,
+ .close = snd_ali_capture_close,
+ .ioctl = snd_ali_ioctl,
+ .hw_params = snd_ali_capture_hw_params,
+ .hw_free = snd_ali_capture_hw_free,
+ .prepare = snd_ali_capture_prepare,
+ .trigger = snd_ali_trigger,
+ .pointer = snd_ali_capture_pointer,
+};
+
+
+static void snd_ali_pcm_free(snd_pcm_t *pcm)
+{
+ ali_t *codec = pcm->private_data;
+ codec->pcm = NULL;
+}
+
+static int __devinit snd_ali_pcm(ali_t * codec, int device, snd_pcm_t ** rpcm)
+{
+ snd_pcm_t *pcm;
+ int err;
+
+ if (rpcm) *rpcm = NULL;
+ err = snd_pcm_new(codec->card, "ALI 5451", device, ALI_CHANNELS, 1, &pcm);
+ if (err < 0) {
+ snd_printk("snd_ali_pcm: err called snd_pcm_new.\n");
+ return err;
+ }
+ pcm->private_data = codec;
+ pcm->private_free = snd_ali_pcm_free;
+ pcm->info_flags = 0;
+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ali_playback_ops);
+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ali_capture_ops);
+
+ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
+ snd_dma_pci_data(codec->pci), 64*1024, 128*1024);
+
+ pcm->info_flags = 0;
+ pcm->dev_subclass = SNDRV_PCM_SUBCLASS_GENERIC_MIX;
+ strcpy(pcm->name, "ALI 5451");
+ codec->pcm = pcm;
+ if (rpcm) *rpcm = pcm;
+ return 0;
+}
+
+#define ALI5451_SPDIF(xname, xindex, value) \
+{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex,\
+.info = snd_ali5451_spdif_info, .get = snd_ali5451_spdif_get, \
+.put = snd_ali5451_spdif_put, .private_value = value}
+
+static int snd_ali5451_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
+ uinfo->count = 1;
+ uinfo->value.integer.min = 0;
+ uinfo->value.integer.max = 1;
+ return 0;
+}
+
+static int snd_ali5451_spdif_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ unsigned long flags;
+ ali_t *codec = kcontrol->private_data;
+ unsigned int enable;
+
+ enable = ucontrol->value.integer.value[0] ? 1 : 0;
+
+ spin_lock_irqsave(&codec->reg_lock, flags);
+ switch(kcontrol->private_value) {
+ case 0:
+ enable = (codec->spdif_mask & 0x02) ? 1 : 0;
+ break;
+ case 1:
+ enable = ((codec->spdif_mask & 0x02) && (codec->spdif_mask & 0x04)) ? 1 : 0;
+ break;
+ case 2:
+ enable = (codec->spdif_mask & 0x01) ? 1 : 0;
+ break;
+ default:
+ break;
+ }
+ ucontrol->value.integer.value[0] = enable;
+ spin_unlock_irqrestore(&codec->reg_lock, flags);
+ return 0;
+}
+
+static int snd_ali5451_spdif_put(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ unsigned long flags;
+ ali_t *codec = kcontrol->private_data;
+ unsigned int change = 0, enable = 0;
+
+ enable = ucontrol->value.integer.value[0] ? 1 : 0;
+
+ spin_lock_irqsave(&codec->reg_lock, flags);
+ switch (kcontrol->private_value) {
+ case 0:
+ change = (codec->spdif_mask & 0x02) ? 1 : 0;
+ change = change ^ enable;
+ if (change) {
+ if (enable) {
+ codec->spdif_mask |= 0x02;
+ snd_ali_enable_spdif_out(codec);
+ } else {
+ codec->spdif_mask &= ~(0x02);
+ codec->spdif_mask &= ~(0x04);
+ snd_ali_disable_spdif_out(codec);
+ }
+ }
+ break;
+ case 1:
+ change = (codec->spdif_mask & 0x04) ? 1 : 0;
+ change = change ^ enable;
+ if (change && (codec->spdif_mask & 0x02)) {
+ if (enable) {
+ codec->spdif_mask |= 0x04;
+ snd_ali_enable_spdif_chnout(codec);
+ } else {
+ codec->spdif_mask &= ~(0x04);
+ snd_ali_disable_spdif_chnout(codec);
+ }
+ }
+ break;
+ case 2:
+ change = (codec->spdif_mask & 0x01) ? 1 : 0;
+ change = change ^ enable;
+ if (change) {
+ if (enable) {
+ codec->spdif_mask |= 0x01;
+ snd_ali_enable_spdif_in(codec);
+ } else {
+ codec->spdif_mask &= ~(0x01);
+ snd_ali_disable_spdif_in(codec);
+ }
+ }
+ break;
+ default:
+ break;
+ }
+ spin_unlock_irqrestore(&codec->reg_lock, flags);
+
+ return change;
+}
+
+static snd_kcontrol_new_t snd_ali5451_mixer_spdif[] __devinitdata = {
+ /* spdif aplayback switch */
+ /* FIXME: "IEC958 Playback Switch" may conflict with one on ac97_codec */
+ ALI5451_SPDIF("IEC958 Output switch", 0, 0),
+ /* spdif out to spdif channel */
+ ALI5451_SPDIF("IEC958 Channel Output Switch", 0, 1),
+ /* spdif in from spdif channel */
+ ALI5451_SPDIF(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, 2)
+};
+
+static void snd_ali_mixer_free_ac97_bus(ac97_bus_t *bus)
+{
+ ali_t *codec = bus->private_data;
+ codec->ac97_bus = NULL;
+}
+
+static void snd_ali_mixer_free_ac97(ac97_t *ac97)
+{
+ ali_t *codec = ac97->private_data;
+ codec->ac97 = NULL;
+}
+
+static int __devinit snd_ali_mixer(ali_t * codec)
+{
+ ac97_template_t ac97;
+ unsigned int idx;
+ int err;
+ static ac97_bus_ops_t ops = {
+ .write = snd_ali_codec_write,
+ .read = snd_ali_codec_read,
+ };
+
+ if ((err = snd_ac97_bus(codec->card, 0, &ops, codec, &codec->ac97_bus)) < 0)
+ return err;
+ codec->ac97_bus->private_free = snd_ali_mixer_free_ac97_bus;
+
+ memset(&ac97, 0, sizeof(ac97));
+ ac97.private_data = codec;
+ ac97.private_free = snd_ali_mixer_free_ac97;
+ if ((err = snd_ac97_mixer(codec->ac97_bus, &ac97, &codec->ac97)) < 0) {
+ snd_printk("ali mixer creating error.\n");
+ return err;
+ }
+ if (codec->spdif_support) {
+ for(idx = 0; idx < ARRAY_SIZE(snd_ali5451_mixer_spdif); idx++) {
+ err=snd_ctl_add(codec->card, snd_ctl_new1(&snd_ali5451_mixer_spdif[idx], codec));
+ if (err < 0) return err;
+ }
+ }
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int ali_suspend(snd_card_t *card, pm_message_t state)
+{
+ ali_t *chip = card->pm_private_data;
+ ali_image_t *im;
+ int i, j;
+
+ im = chip->image;
+ if (! im)
+ return 0;
+
+ snd_pcm_suspend_all(chip->pcm);
+ snd_ac97_suspend(chip->ac97);
+
+ spin_lock_irq(&chip->reg_lock);
+
+ im->regs[ALI_MISCINT >> 2] = inl(ALI_REG(chip, ALI_MISCINT));
+ // im->regs[ALI_START >> 2] = inl(ALI_REG(chip, ALI_START));
+ im->regs[ALI_STOP >> 2] = inl(ALI_REG(chip, ALI_STOP));
+
+ // disable all IRQ bits
+ outl(0, ALI_REG(chip, ALI_MISCINT));
+
+ for (i = 0; i < ALI_GLOBAL_REGS; i++) {
+ if ((i*4 == ALI_MISCINT) || (i*4 == ALI_STOP))
+ continue;
+ im->regs[i] = inl(ALI_REG(chip, i*4));
+ }
+
+ for (i = 0; i < ALI_CHANNELS; i++) {
+ outb(i, ALI_REG(chip, ALI_GC_CIR));
+ for (j = 0; j < ALI_CHANNEL_REGS; j++)
+ im->channel_regs[i][j] = inl(ALI_REG(chip, j*4 + 0xe0));
+ }
+
+ // stop all HW channel
+ outl(0xffffffff, ALI_REG(chip, ALI_STOP));
+
+ spin_unlock_irq(&chip->reg_lock);
+ pci_disable_device(chip->pci);
+ return 0;
+}
+
+static int ali_resume(snd_card_t *card)
+{
+ ali_t *chip = card->pm_private_data;
+ ali_image_t *im;
+ int i, j;
+
+ im = chip->image;
+ if (! im)
+ return 0;
+
+ pci_enable_device(chip->pci);
+
+ spin_lock_irq(&chip->reg_lock);
+
+ for (i = 0; i < ALI_CHANNELS; i++) {
+ outb(i, ALI_REG(chip, ALI_GC_CIR));
+ for (j = 0; j < ALI_CHANNEL_REGS; j++)
+ outl(im->channel_regs[i][j], ALI_REG(chip, j*4 + 0xe0));
+ }
+
+ for (i = 0; i < ALI_GLOBAL_REGS; i++) {
+ if ((i*4 == ALI_MISCINT) || (i*4 == ALI_STOP) || (i*4 == ALI_START))
+ continue;
+ outl(im->regs[i], ALI_REG(chip, i*4));
+ }
+
+ // start HW channel
+ outl(im->regs[ALI_START >> 2], ALI_REG(chip, ALI_START));
+ // restore IRQ enable bits
+ outl(im->regs[ALI_MISCINT >> 2], ALI_REG(chip, ALI_MISCINT));
+
+ spin_unlock_irq(&chip->reg_lock);
+
+ snd_ac97_resume(chip->ac97);
+
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+static int snd_ali_free(ali_t * codec)
+{
+ if (codec->hw_initialized)
+ snd_ali_disable_address_interrupt(codec);
+ if (codec->irq >= 0) {
+ synchronize_irq(codec->irq);
+ free_irq(codec->irq, (void *)codec);
+ }
+ if (codec->port)
+ pci_release_regions(codec->pci);
+ pci_disable_device(codec->pci);
+#ifdef CONFIG_PM
+ kfree(codec->image);
+#endif
+ kfree(codec);
+ return 0;
+}
+
+static int snd_ali_chip_init(ali_t *codec)
+{
+ unsigned int legacy;
+ unsigned char temp;
+ struct pci_dev *pci_dev = NULL;
+
+ snd_ali_printk("chip initializing ... \n");
+
+ if (snd_ali_reset_5451(codec)) {
+ snd_printk("ali_chip_init: reset 5451 error.\n");
+ return -1;
+ }
+
+ if (codec->revision == ALI_5451_V02) {
+ pci_dev = codec->pci_m1533;
+ pci_read_config_byte(pci_dev, 0x59, &temp);
+ temp |= 0x80;
+ pci_write_config_byte(pci_dev, 0x59, temp);
+
+ pci_dev = codec->pci_m7101;
+ pci_read_config_byte(pci_dev, 0xb8, &temp);
+ temp |= 0x20;
+ pci_write_config_byte(pci_dev, 0xB8, temp);
+ }
+
+ pci_read_config_dword(codec->pci, 0x44, &legacy);
+ legacy &= 0xff00ff00;
+ legacy |= 0x000800aa;
+ pci_write_config_dword(codec->pci, 0x44, legacy);
+
+ outl(0x80000001, ALI_REG(codec, ALI_GLOBAL_CONTROL));
+ outl(0x00000000, ALI_REG(codec, ALI_AINTEN));
+ outl(0xffffffff, ALI_REG(codec, ALI_AINT));
+ outl(0x00000000, ALI_REG(codec, ALI_VOLUME));
+ outb(0x10, ALI_REG(codec, ALI_MPUR2));
+
+ codec->ac97_ext_id = snd_ali_codec_peek(codec, 0, AC97_EXTENDED_ID);
+ codec->ac97_ext_status = snd_ali_codec_peek(codec, 0, AC97_EXTENDED_STATUS);
+ if (codec->spdif_support) {
+ snd_ali_enable_spdif_out(codec);
+ codec->spdif_mask = 0x00000002;
+ }
+
+ snd_ali_printk("chip initialize succeed.\n");
+ return 0;
+
+}
+
+static int __devinit snd_ali_resources(ali_t *codec)
+{
+ int err;
+
+ snd_ali_printk("resouces allocation ...\n");
+ if ((err = pci_request_regions(codec->pci, "ALI 5451")) < 0)
+ return err;
+ codec->port = pci_resource_start(codec->pci, 0);
+
+ if (request_irq(codec->pci->irq, snd_ali_card_interrupt, SA_INTERRUPT|SA_SHIRQ, "ALI 5451", (void *)codec)) {
+ snd_printk("Unable to request irq.\n");
+ return -EBUSY;
+ }
+ codec->irq = codec->pci->irq;
+ snd_ali_printk("resouces allocated.\n");
+ return 0;
+}
+static int snd_ali_dev_free(snd_device_t *device)
+{
+ ali_t *codec=device->device_data;
+ snd_ali_free(codec);
+ return 0;
+}
+
+static int __devinit snd_ali_create(snd_card_t * card,
+ struct pci_dev *pci,
+ int pcm_streams,
+ int spdif_support,
+ ali_t ** r_ali)
+{
+ ali_t *codec;
+ int i, err;
+ unsigned short cmdw = 0;
+ struct pci_dev *pci_dev = NULL;
+ static snd_device_ops_t ops = {
+ (snd_dev_free_t *)snd_ali_dev_free,
+ NULL,
+ NULL
+ };
+
+ *r_ali = NULL;
+
+ snd_ali_printk("creating ...\n");
+
+ /* enable PCI device */
+ if ((err = pci_enable_device(pci)) < 0)
+ return err;
+ /* check, if we can restrict PCI DMA transfers to 31 bits */
+ if (pci_set_dma_mask(pci, 0x7fffffff) < 0 ||
+ pci_set_consistent_dma_mask(pci, 0x7fffffff) < 0) {
+ snd_printk("architecture does not support 31bit PCI busmaster DMA\n");
+ pci_disable_device(pci);
+ return -ENXIO;
+ }
+
+ if ((codec = kcalloc(1, sizeof(*codec), GFP_KERNEL)) == NULL) {
+ pci_disable_device(pci);
+ return -ENOMEM;
+ }
+
+ spin_lock_init(&codec->reg_lock);
+ spin_lock_init(&codec->voice_alloc);
+
+ codec->card = card;
+ codec->pci = pci;
+ codec->irq = -1;
+ pci_read_config_byte(pci, PCI_REVISION_ID, &codec->revision);
+ codec->spdif_support = spdif_support;
+
+ if (pcm_streams < 1)
+ pcm_streams = 1;
+ if (pcm_streams > 32)
+ pcm_streams = 32;
+
+ pci_set_master(pci);
+ pci_read_config_word(pci, PCI_COMMAND, &cmdw);
+ if ((cmdw & PCI_COMMAND_IO) != PCI_COMMAND_IO) {
+ cmdw |= PCI_COMMAND_IO;
+ pci_write_config_word(pci, PCI_COMMAND, cmdw);
+ }
+ pci_set_master(pci);
+
+ if (snd_ali_resources(codec)) {
+ snd_ali_free(codec);
+ return -EBUSY;
+ }
+
+ synchronize_irq(pci->irq);
+
+ codec->synth.chmap = 0;
+ codec->synth.chcnt = 0;
+ codec->spdif_mask = 0;
+ codec->synth.synthcount = 0;
+
+ if (codec->revision == ALI_5451_V02)
+ codec->chregs.regs.ac97read = ALI_AC97_WRITE;
+ else
+ codec->chregs.regs.ac97read = ALI_AC97_READ;
+ codec->chregs.regs.ac97write = ALI_AC97_WRITE;
+
+ codec->chregs.regs.start = ALI_START;
+ codec->chregs.regs.stop = ALI_STOP;
+ codec->chregs.regs.aint = ALI_AINT;
+ codec->chregs.regs.ainten = ALI_AINTEN;
+
+ codec->chregs.data.start = 0x00;
+ codec->chregs.data.stop = 0x00;
+ codec->chregs.data.aint = 0x00;
+ codec->chregs.data.ainten = 0x00;
+
+ /* M1533: southbridge */
+ pci_dev = pci_find_device(0x10b9, 0x1533, NULL);
+ codec->pci_m1533 = pci_dev;
+ if (! codec->pci_m1533) {
+ snd_printk(KERN_ERR "ali5451: cannot find ALi 1533 chip.\n");
+ snd_ali_free(codec);
+ return -ENODEV;
+ }
+ /* M7101: power management */
+ pci_dev = pci_find_device(0x10b9, 0x7101, NULL);
+ codec->pci_m7101 = pci_dev;
+ if (! codec->pci_m7101 && codec->revision == ALI_5451_V02) {
+ snd_printk(KERN_ERR "ali5451: cannot find ALi 7101 chip.\n");
+ snd_ali_free(codec);
+ return -ENODEV;
+ }
+
+ snd_ali_printk("snd_device_new is called.\n");
+ if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, codec, &ops)) < 0) {
+ snd_ali_free(codec);
+ return err;
+ }
+
+ /* initialise synth voices*/
+ for (i = 0; i < ALI_CHANNELS; i++ ) {
+ codec->synth.voices[i].number = i;
+ }
+
+ if ((err = snd_ali_chip_init(codec)) < 0) {
+ snd_printk("ali create: chip init error.\n");
+ return err;
+ }
+
+#ifdef CONFIG_PM
+ codec->image = kmalloc(sizeof(*codec->image), GFP_KERNEL);
+ if (! codec->image)
+ snd_printk(KERN_WARNING "can't allocate apm buffer\n");
+ else
+ snd_card_set_pm_callback(card, ali_suspend, ali_resume, codec);
+#endif
+
+ snd_ali_enable_address_interrupt(codec);
+ codec->hw_initialized = 1;
+
+ *r_ali = codec;
+ snd_ali_printk("created.\n");
+ return 0;
+}
+
+static int __devinit snd_ali_probe(struct pci_dev *pci,
+ const struct pci_device_id *pci_id)
+{
+ static int dev;
+ snd_card_t *card;
+ ali_t *codec;
+ int err;
+
+ snd_ali_printk("probe ...\n");
+
+ if (dev >= SNDRV_CARDS)
+ return -ENODEV;
+ if (!enable[dev]) {
+ dev++;
+ return -ENOENT;
+ }
+
+ card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
+ if (card == NULL)
+ return -ENOMEM;
+
+ if ((err = snd_ali_create(card, pci, pcm_channels[dev], spdif[dev], &codec)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+
+ snd_ali_printk("mixer building ...\n");
+ if ((err = snd_ali_mixer(codec)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+
+ snd_ali_printk("pcm building ...\n");
+ if ((err = snd_ali_pcm(codec, 0, NULL)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+
+ strcpy(card->driver, "ALI5451");
+ strcpy(card->shortname, "ALI 5451");
+
+ sprintf(card->longname, "%s at 0x%lx, irq %li",
+ card->shortname, codec->port, codec->irq);
+
+ snd_ali_printk("register card.\n");
+ if ((err = snd_card_register(card)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+ pci_set_drvdata(pci, card);
+ dev++;
+ return 0;
+}
+
+static void __devexit snd_ali_remove(struct pci_dev *pci)
+{
+ snd_card_free(pci_get_drvdata(pci));
+ pci_set_drvdata(pci, NULL);
+}
+
+static struct pci_driver driver = {
+ .name = "ALI 5451",
+ .id_table = snd_ali_ids,
+ .probe = snd_ali_probe,
+ .remove = __devexit_p(snd_ali_remove),
+ SND_PCI_PM_CALLBACKS
+};
+
+static int __init alsa_card_ali_init(void)
+{
+ return pci_module_init(&driver);
+}
+
+static void __exit alsa_card_ali_exit(void)
+{
+ pci_unregister_driver(&driver);
+}
+
+module_init(alsa_card_ali_init)
+module_exit(alsa_card_ali_exit)
diff --git a/sound/pci/als4000.c b/sound/pci/als4000.c
new file mode 100644
index 000000000000..f1a5f5723ee6
--- /dev/null
+++ b/sound/pci/als4000.c
@@ -0,0 +1,789 @@
+/*
+ * card-als4000.c - driver for Avance Logic ALS4000 based soundcards.
+ * Copyright (C) 2000 by Bart Hartgers <bart@etpmod.phys.tue.nl>,
+ * Jaroslav Kysela <perex@suse.cz>
+ * Copyright (C) 2002 by Andreas Mohr <hw7oshyuv3001@sneakemail.com>
+ *
+ * Framework borrowed from Massimo Piccioni's card-als100.c.
+ *
+ * NOTES
+ *
+ * Since Avance does not provide any meaningful documentation, and I
+ * bought an ALS4000 based soundcard, I was forced to base this driver
+ * on reverse engineering.
+ *
+ * Note: this is no longer true. Pretty verbose chip docu (ALS4000a.PDF)
+ * can be found on the ALSA web site.
+ *
+ * The ALS4000 seems to be the PCI-cousin of the ALS100. It contains an
+ * ALS100-like SB DSP/mixer, an OPL3 synth, a MPU401 and a gameport
+ * interface. These subsystems can be mapped into ISA io-port space,
+ * using the PCI-interface. In addition, the PCI-bit provides DMA and IRQ
+ * services to the subsystems.
+ *
+ * While ALS4000 is very similar to a SoundBlaster, the differences in
+ * DMA and capturing require more changes to the SoundBlaster than
+ * desirable, so I made this separate driver.
+ *
+ * The ALS4000 can do real full duplex playback/capture.
+ *
+ * FMDAC:
+ * - 0x4f -> port 0x14
+ * - port 0x15 |= 1
+ *
+ * Enable/disable 3D sound:
+ * - 0x50 -> port 0x14
+ * - change bit 6 (0x40) of port 0x15
+ *
+ * Set QSound:
+ * - 0xdb -> port 0x14
+ * - set port 0x15:
+ * 0x3e (mode 3), 0x3c (mode 2), 0x3a (mode 1), 0x38 (mode 0)
+ *
+ * Set KSound:
+ * - value -> some port 0x0c0d
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <sound/driver.h>
+#include <asm/io.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/gameport.h>
+#include <linux/moduleparam.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/rawmidi.h>
+#include <sound/mpu401.h>
+#include <sound/opl3.h>
+#include <sound/sb.h>
+#include <sound/initval.h>
+
+MODULE_AUTHOR("Bart Hartgers <bart@etpmod.phys.tue.nl>");
+MODULE_DESCRIPTION("Avance Logic ALS4000");
+MODULE_LICENSE("GPL");
+MODULE_SUPPORTED_DEVICE("{{Avance Logic,ALS4000}}");
+
+#if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
+#define SUPPORT_JOYSTICK 1
+#endif
+
+static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
+static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
+static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
+#ifdef SUPPORT_JOYSTICK
+static int joystick_port[SNDRV_CARDS];
+#endif
+
+module_param_array(index, int, NULL, 0444);
+MODULE_PARM_DESC(index, "Index value for ALS4000 soundcard.");
+module_param_array(id, charp, NULL, 0444);
+MODULE_PARM_DESC(id, "ID string for ALS4000 soundcard.");
+module_param_array(enable, bool, NULL, 0444);
+MODULE_PARM_DESC(enable, "Enable ALS4000 soundcard.");
+#ifdef SUPPORT_JOYSTICK
+module_param_array(joystick_port, int, NULL, 0444);
+MODULE_PARM_DESC(joystick_port, "Joystick port address for ALS4000 soundcard. (0 = disabled)");
+#endif
+
+typedef struct {
+ struct pci_dev *pci;
+ unsigned long gcr;
+#ifdef SUPPORT_JOYSTICK
+ struct gameport *gameport;
+#endif
+} snd_card_als4000_t;
+
+static struct pci_device_id snd_als4000_ids[] = {
+ { 0x4005, 0x4000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0, }, /* ALS4000 */
+ { 0, }
+};
+
+MODULE_DEVICE_TABLE(pci, snd_als4000_ids);
+
+static inline void snd_als4000_gcr_write_addr(unsigned long port, u32 reg, u32 val)
+{
+ outb(reg, port+0x0c);
+ outl(val, port+0x08);
+}
+
+static inline void snd_als4000_gcr_write(sb_t *sb, u32 reg, u32 val)
+{
+ snd_als4000_gcr_write_addr(sb->alt_port, reg, val);
+}
+
+static inline u32 snd_als4000_gcr_read_addr(unsigned long port, u32 reg)
+{
+ outb(reg, port+0x0c);
+ return inl(port+0x08);
+}
+
+static inline u32 snd_als4000_gcr_read(sb_t *sb, u32 reg)
+{
+ return snd_als4000_gcr_read_addr(sb->alt_port, reg);
+}
+
+static void snd_als4000_set_rate(sb_t *chip, unsigned int rate)
+{
+ if (!(chip->mode & SB_RATE_LOCK)) {
+ snd_sbdsp_command(chip, SB_DSP_SAMPLE_RATE_OUT);
+ snd_sbdsp_command(chip, rate>>8);
+ snd_sbdsp_command(chip, rate);
+ }
+}
+
+static void snd_als4000_set_capture_dma(sb_t *chip, dma_addr_t addr, unsigned size)
+{
+ snd_als4000_gcr_write(chip, 0xa2, addr);
+ snd_als4000_gcr_write(chip, 0xa3, (size-1));
+}
+
+static void snd_als4000_set_playback_dma(sb_t *chip, dma_addr_t addr, unsigned size)
+{
+ snd_als4000_gcr_write(chip, 0x91, addr);
+ snd_als4000_gcr_write(chip, 0x92, (size-1)|0x180000);
+}
+
+#define ALS4000_FORMAT_SIGNED (1<<0)
+#define ALS4000_FORMAT_16BIT (1<<1)
+#define ALS4000_FORMAT_STEREO (1<<2)
+
+static int snd_als4000_get_format(snd_pcm_runtime_t *runtime)
+{
+ int result;
+
+ result = 0;
+ if (snd_pcm_format_signed(runtime->format))
+ result |= ALS4000_FORMAT_SIGNED;
+ if (snd_pcm_format_physical_width(runtime->format) == 16)
+ result |= ALS4000_FORMAT_16BIT;
+ if (runtime->channels > 1)
+ result |= ALS4000_FORMAT_STEREO;
+ return result;
+}
+
+/* structure for setting up playback */
+static struct {
+ unsigned char dsp_cmd, dma_on, dma_off, format;
+} playback_cmd_vals[]={
+/* ALS4000_FORMAT_U8_MONO */
+{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_MONO },
+/* ALS4000_FORMAT_S8_MONO */
+{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_MONO },
+/* ALS4000_FORMAT_U16L_MONO */
+{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_MONO },
+/* ALS4000_FORMAT_S16L_MONO */
+{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_MONO },
+/* ALS4000_FORMAT_U8_STEREO */
+{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_UNS_STEREO },
+/* ALS4000_FORMAT_S8_STEREO */
+{ SB_DSP4_OUT8_AI, SB_DSP_DMA8_ON, SB_DSP_DMA8_OFF, SB_DSP4_MODE_SIGN_STEREO },
+/* ALS4000_FORMAT_U16L_STEREO */
+{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_UNS_STEREO },
+/* ALS4000_FORMAT_S16L_STEREO */
+{ SB_DSP4_OUT16_AI, SB_DSP_DMA16_ON, SB_DSP_DMA16_OFF, SB_DSP4_MODE_SIGN_STEREO },
+};
+#define playback_cmd(chip) (playback_cmd_vals[(chip)->playback_format])
+
+/* structure for setting up capture */
+enum { CMD_WIDTH8=0x04, CMD_SIGNED=0x10, CMD_MONO=0x80, CMD_STEREO=0xA0 };
+static unsigned char capture_cmd_vals[]=
+{
+CMD_WIDTH8|CMD_MONO, /* ALS4000_FORMAT_U8_MONO */
+CMD_WIDTH8|CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S8_MONO */
+CMD_MONO, /* ALS4000_FORMAT_U16L_MONO */
+CMD_SIGNED|CMD_MONO, /* ALS4000_FORMAT_S16L_MONO */
+CMD_WIDTH8|CMD_STEREO, /* ALS4000_FORMAT_U8_STEREO */
+CMD_WIDTH8|CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S8_STEREO */
+CMD_STEREO, /* ALS4000_FORMAT_U16L_STEREO */
+CMD_SIGNED|CMD_STEREO, /* ALS4000_FORMAT_S16L_STEREO */
+};
+#define capture_cmd(chip) (capture_cmd_vals[(chip)->capture_format])
+
+static int snd_als4000_hw_params(snd_pcm_substream_t * substream,
+ snd_pcm_hw_params_t * hw_params)
+{
+ return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
+}
+
+static int snd_als4000_hw_free(snd_pcm_substream_t * substream)
+{
+ snd_pcm_lib_free_pages(substream);
+ return 0;
+}
+
+static int snd_als4000_capture_prepare(snd_pcm_substream_t * substream)
+{
+ unsigned long flags;
+ sb_t *chip = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ unsigned long size;
+ unsigned count;
+
+ chip->capture_format = snd_als4000_get_format(runtime);
+
+ size = snd_pcm_lib_buffer_bytes(substream);
+ count = snd_pcm_lib_period_bytes(substream);
+
+ if (chip->capture_format & ALS4000_FORMAT_16BIT)
+ count >>=1;
+ count--;
+
+ spin_lock_irqsave(&chip->reg_lock, flags);
+ snd_als4000_set_rate(chip, runtime->rate);
+ snd_als4000_set_capture_dma(chip, runtime->dma_addr, size);
+ spin_unlock_irqrestore(&chip->reg_lock, flags);
+ spin_lock_irqsave(&chip->mixer_lock, flags );
+ snd_sbmixer_write(chip, 0xdc, count);
+ snd_sbmixer_write(chip, 0xdd, count>>8);
+ spin_unlock_irqrestore(&chip->mixer_lock, flags );
+ return 0;
+}
+
+static int snd_als4000_playback_prepare(snd_pcm_substream_t *substream)
+{
+ unsigned long flags;
+ sb_t *chip = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ unsigned long size;
+ unsigned count;
+
+ chip->playback_format = snd_als4000_get_format(runtime);
+
+ size = snd_pcm_lib_buffer_bytes(substream);
+ count = snd_pcm_lib_period_bytes(substream);
+
+ if (chip->playback_format & ALS4000_FORMAT_16BIT)
+ count >>=1;
+ count--;
+
+ /* FIXME: from second playback on, there's a lot more clicks and pops
+ * involved here than on first playback. Fiddling with
+ * tons of different settings didn't help (DMA, speaker on/off,
+ * reordering, ...). Something seems to get enabled on playback
+ * that I haven't found out how to disable again, which then causes
+ * the switching pops to reach the speakers the next time here. */
+ spin_lock_irqsave(&chip->reg_lock, flags);
+ snd_als4000_set_rate(chip, runtime->rate);
+ snd_als4000_set_playback_dma(chip, runtime->dma_addr, size);
+
+ /* SPEAKER_ON not needed, since dma_on seems to also enable speaker */
+ /* snd_sbdsp_command(chip, SB_DSP_SPEAKER_ON); */
+ snd_sbdsp_command(chip, playback_cmd(chip).dsp_cmd);
+ snd_sbdsp_command(chip, playback_cmd(chip).format);
+ snd_sbdsp_command(chip, count);
+ snd_sbdsp_command(chip, count>>8);
+ snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
+ spin_unlock_irqrestore(&chip->reg_lock, flags);
+
+ return 0;
+}
+
+static int snd_als4000_capture_trigger(snd_pcm_substream_t * substream, int cmd)
+{
+ sb_t *chip = snd_pcm_substream_chip(substream);
+ int result = 0;
+
+ spin_lock(&chip->mixer_lock);
+ if (cmd == SNDRV_PCM_TRIGGER_START) {
+ chip->mode |= SB_RATE_LOCK_CAPTURE;
+ snd_sbmixer_write(chip, 0xde, capture_cmd(chip));
+ } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
+ chip->mode &= ~SB_RATE_LOCK_CAPTURE;
+ snd_sbmixer_write(chip, 0xde, 0);
+ } else {
+ result = -EINVAL;
+ }
+ spin_unlock(&chip->mixer_lock);
+ return result;
+}
+
+static int snd_als4000_playback_trigger(snd_pcm_substream_t * substream, int cmd)
+{
+ sb_t *chip = snd_pcm_substream_chip(substream);
+ int result = 0;
+
+ spin_lock(&chip->reg_lock);
+ if (cmd == SNDRV_PCM_TRIGGER_START) {
+ chip->mode |= SB_RATE_LOCK_PLAYBACK;
+ snd_sbdsp_command(chip, playback_cmd(chip).dma_on);
+ } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
+ snd_sbdsp_command(chip, playback_cmd(chip).dma_off);
+ chip->mode &= ~SB_RATE_LOCK_PLAYBACK;
+ } else {
+ result = -EINVAL;
+ }
+ spin_unlock(&chip->reg_lock);
+ return result;
+}
+
+static snd_pcm_uframes_t snd_als4000_capture_pointer(snd_pcm_substream_t * substream)
+{
+ sb_t *chip = snd_pcm_substream_chip(substream);
+ unsigned int result;
+
+ spin_lock(&chip->reg_lock);
+ result = snd_als4000_gcr_read(chip, 0xa4) & 0xffff;
+ spin_unlock(&chip->reg_lock);
+ return bytes_to_frames( substream->runtime, result );
+}
+
+static snd_pcm_uframes_t snd_als4000_playback_pointer(snd_pcm_substream_t * substream)
+{
+ sb_t *chip = snd_pcm_substream_chip(substream);
+ unsigned result;
+
+ spin_lock(&chip->reg_lock);
+ result = snd_als4000_gcr_read(chip, 0xa0) & 0xffff;
+ spin_unlock(&chip->reg_lock);
+ return bytes_to_frames( substream->runtime, result );
+}
+
+static irqreturn_t snd_als4000_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+ sb_t *chip = dev_id;
+ unsigned gcr_status;
+ unsigned sb_status;
+
+ /* find out which bit of the ALS4000 produced the interrupt */
+ gcr_status = inb(chip->alt_port + 0xe);
+
+ if ((gcr_status & 0x80) && (chip->playback_substream)) /* playback */
+ snd_pcm_period_elapsed(chip->playback_substream);
+ if ((gcr_status & 0x40) && (chip->capture_substream)) /* capturing */
+ snd_pcm_period_elapsed(chip->capture_substream);
+ if ((gcr_status & 0x10) && (chip->rmidi)) /* MPU401 interrupt */
+ snd_mpu401_uart_interrupt(irq, chip->rmidi, regs);
+ /* release the gcr */
+ outb(gcr_status, chip->alt_port + 0xe);
+
+ spin_lock(&chip->mixer_lock);
+ sb_status = snd_sbmixer_read(chip, SB_DSP4_IRQSTATUS);
+ spin_unlock(&chip->mixer_lock);
+
+ if (sb_status & SB_IRQTYPE_8BIT)
+ snd_sb_ack_8bit(chip);
+ if (sb_status & SB_IRQTYPE_16BIT)
+ snd_sb_ack_16bit(chip);
+ if (sb_status & SB_IRQTYPE_MPUIN)
+ inb(chip->mpu_port);
+ if (sb_status & 0x20)
+ inb(SBP(chip, RESET));
+ return IRQ_HANDLED;
+}
+
+/*****************************************************************/
+
+static snd_pcm_hardware_t snd_als4000_playback =
+{
+ .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_MMAP_VALID),
+ .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
+ SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */
+ .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
+ .rate_min = 4000,
+ .rate_max = 48000,
+ .channels_min = 1,
+ .channels_max = 2,
+ .buffer_bytes_max = 65536,
+ .period_bytes_min = 64,
+ .period_bytes_max = 65536,
+ .periods_min = 1,
+ .periods_max = 1024,
+ .fifo_size = 0
+};
+
+static snd_pcm_hardware_t snd_als4000_capture =
+{
+ .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_MMAP_VALID),
+ .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 |
+ SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE, /* formats */
+ .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
+ .rate_min = 4000,
+ .rate_max = 48000,
+ .channels_min = 1,
+ .channels_max = 2,
+ .buffer_bytes_max = 65536,
+ .period_bytes_min = 64,
+ .period_bytes_max = 65536,
+ .periods_min = 1,
+ .periods_max = 1024,
+ .fifo_size = 0
+};
+
+/*****************************************************************/
+
+static int snd_als4000_playback_open(snd_pcm_substream_t * substream)
+{
+ sb_t *chip = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+
+ chip->playback_substream = substream;
+ runtime->hw = snd_als4000_playback;
+ return 0;
+}
+
+static int snd_als4000_playback_close(snd_pcm_substream_t * substream)
+{
+ sb_t *chip = snd_pcm_substream_chip(substream);
+
+ chip->playback_substream = NULL;
+ snd_pcm_lib_free_pages(substream);
+ return 0;
+}
+
+static int snd_als4000_capture_open(snd_pcm_substream_t * substream)
+{
+ sb_t *chip = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+
+ chip->capture_substream = substream;
+ runtime->hw = snd_als4000_capture;
+ return 0;
+}
+
+static int snd_als4000_capture_close(snd_pcm_substream_t * substream)
+{
+ sb_t *chip = snd_pcm_substream_chip(substream);
+
+ chip->capture_substream = NULL;
+ snd_pcm_lib_free_pages(substream);
+ return 0;
+}
+
+/******************************************************************/
+
+static snd_pcm_ops_t snd_als4000_playback_ops = {
+ .open = snd_als4000_playback_open,
+ .close = snd_als4000_playback_close,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = snd_als4000_hw_params,
+ .hw_free = snd_als4000_hw_free,
+ .prepare = snd_als4000_playback_prepare,
+ .trigger = snd_als4000_playback_trigger,
+ .pointer = snd_als4000_playback_pointer
+};
+
+static snd_pcm_ops_t snd_als4000_capture_ops = {
+ .open = snd_als4000_capture_open,
+ .close = snd_als4000_capture_close,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = snd_als4000_hw_params,
+ .hw_free = snd_als4000_hw_free,
+ .prepare = snd_als4000_capture_prepare,
+ .trigger = snd_als4000_capture_trigger,
+ .pointer = snd_als4000_capture_pointer
+};
+
+static void snd_als4000_pcm_free(snd_pcm_t *pcm)
+{
+ sb_t *chip = pcm->private_data;
+ chip->pcm = NULL;
+ snd_pcm_lib_preallocate_free_for_all(pcm);
+}
+
+static int __devinit snd_als4000_pcm(sb_t *chip, int device)
+{
+ snd_pcm_t *pcm;
+ int err;
+
+ if ((err = snd_pcm_new(chip->card, "ALS4000 DSP", device, 1, 1, &pcm)) < 0)
+ return err;
+ pcm->private_free = snd_als4000_pcm_free;
+ pcm->private_data = chip;
+ pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_als4000_playback_ops);
+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_als4000_capture_ops);
+
+ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
+ 64*1024, 64*1024);
+
+ chip->pcm = pcm;
+
+ return 0;
+}
+
+/******************************************************************/
+
+static void snd_als4000_set_addr(unsigned long gcr,
+ unsigned int sb,
+ unsigned int mpu,
+ unsigned int opl,
+ unsigned int game)
+{
+ u32 confA = 0;
+ u32 confB = 0;
+
+ if (mpu > 0)
+ confB |= (mpu | 1) << 16;
+ if (sb > 0)
+ confB |= (sb | 1);
+ if (game > 0)
+ confA |= (game | 1) << 16;
+ if (opl > 0)
+ confA |= (opl | 1);
+ snd_als4000_gcr_write_addr(gcr, 0xa8, confA);
+ snd_als4000_gcr_write_addr(gcr, 0xa9, confB);
+}
+
+static void __devinit snd_als4000_configure(sb_t *chip)
+{
+ unsigned tmp;
+ int i;
+
+ /* do some more configuration */
+ spin_lock_irq(&chip->mixer_lock);
+ tmp = snd_sbmixer_read(chip, 0xc0);
+ snd_sbmixer_write(chip, 0xc0, tmp|0x80);
+ /* always select DMA channel 0, since we do not actually use DMA */
+ snd_sbmixer_write(chip, SB_DSP4_DMASETUP, SB_DMASETUP_DMA0);
+ snd_sbmixer_write(chip, 0xc0, tmp&0x7f);
+ spin_unlock_irq(&chip->mixer_lock);
+
+ spin_lock_irq(&chip->reg_lock);
+ /* magic number. Enables interrupts(?) */
+ snd_als4000_gcr_write(chip, 0x8c, 0x28000);
+ for(i = 0x91; i <= 0x96; ++i)
+ snd_als4000_gcr_write(chip, i, 0);
+
+ snd_als4000_gcr_write(chip, 0x99, snd_als4000_gcr_read(chip, 0x99));
+ spin_unlock_irq(&chip->reg_lock);
+}
+
+#ifdef SUPPORT_JOYSTICK
+static int __devinit snd_als4000_create_gameport(snd_card_als4000_t *acard, int dev)
+{
+ struct gameport *gp;
+ struct resource *r;
+ int io_port;
+
+ if (joystick_port[dev] == 0)
+ return -ENODEV;
+
+ if (joystick_port[dev] == 1) { /* auto-detect */
+ for (io_port = 0x200; io_port <= 0x218; io_port += 8) {
+ r = request_region(io_port, 8, "ALS4000 gameport");
+ if (r)
+ break;
+ }
+ } else {
+ io_port = joystick_port[dev];
+ r = request_region(io_port, 8, "ALS4000 gameport");
+ }
+
+ if (!r) {
+ printk(KERN_WARNING "als4000: cannot reserve joystick ports\n");
+ return -EBUSY;
+ }
+
+ acard->gameport = gp = gameport_allocate_port();
+ if (!gp) {
+ printk(KERN_ERR "als4000: cannot allocate memory for gameport\n");
+ release_resource(r);
+ kfree_nocheck(r);
+ return -ENOMEM;
+ }
+
+ gameport_set_name(gp, "ALS4000 Gameport");
+ gameport_set_phys(gp, "pci%s/gameport0", pci_name(acard->pci));
+ gameport_set_dev_parent(gp, &acard->pci->dev);
+ gp->io = io_port;
+ gameport_set_port_data(gp, r);
+
+ /* Enable legacy joystick port */
+ snd_als4000_set_addr(acard->gcr, 0, 0, 0, 1);
+
+ gameport_register_port(acard->gameport);
+
+ return 0;
+}
+
+static void snd_als4000_free_gameport(snd_card_als4000_t *acard)
+{
+ if (acard->gameport) {
+ struct resource *r = gameport_get_port_data(acard->gameport);
+
+ gameport_unregister_port(acard->gameport);
+ acard->gameport = NULL;
+
+ snd_als4000_set_addr(acard->gcr, 0, 0, 0, 0); /* disable joystick */
+ release_resource(r);
+ kfree_nocheck(r);
+ }
+}
+#else
+static inline int snd_als4000_create_gameport(snd_card_als4000_t *acard, int dev) { return -ENOSYS; }
+static inline void snd_als4000_free_gameport(snd_card_als4000_t *acard) { }
+#endif
+
+static void snd_card_als4000_free( snd_card_t *card )
+{
+ snd_card_als4000_t * acard = (snd_card_als4000_t *)card->private_data;
+
+ /* make sure that interrupts are disabled */
+ snd_als4000_gcr_write_addr( acard->gcr, 0x8c, 0);
+ /* free resources */
+ snd_als4000_free_gameport(acard);
+ pci_release_regions(acard->pci);
+ pci_disable_device(acard->pci);
+}
+
+static int __devinit snd_card_als4000_probe(struct pci_dev *pci,
+ const struct pci_device_id *pci_id)
+{
+ static int dev;
+ snd_card_t *card;
+ snd_card_als4000_t *acard;
+ unsigned long gcr;
+ sb_t *chip;
+ opl3_t *opl3;
+ unsigned short word;
+ int err;
+
+ if (dev >= SNDRV_CARDS)
+ return -ENODEV;
+ if (!enable[dev]) {
+ dev++;
+ return -ENOENT;
+ }
+
+ /* enable PCI device */
+ if ((err = pci_enable_device(pci)) < 0) {
+ return err;
+ }
+ /* check, if we can restrict PCI DMA transfers to 24 bits */
+ if (pci_set_dma_mask(pci, 0x00ffffff) < 0 ||
+ pci_set_consistent_dma_mask(pci, 0x00ffffff) < 0) {
+ snd_printk("architecture does not support 24bit PCI busmaster DMA\n");
+ pci_disable_device(pci);
+ return -ENXIO;
+ }
+
+ if ((err = pci_request_regions(pci, "ALS4000")) < 0) {
+ pci_disable_device(pci);
+ return err;
+ }
+ gcr = pci_resource_start(pci, 0);
+
+ pci_read_config_word(pci, PCI_COMMAND, &word);
+ pci_write_config_word(pci, PCI_COMMAND, word | PCI_COMMAND_IO);
+ pci_set_master(pci);
+
+ card = snd_card_new(index[dev], id[dev], THIS_MODULE,
+ sizeof( snd_card_als4000_t ) );
+ if (card == NULL) {
+ pci_release_regions(pci);
+ pci_disable_device(pci);
+ return -ENOMEM;
+ }
+
+ acard = (snd_card_als4000_t *)card->private_data;
+ acard->pci = pci;
+ acard->gcr = gcr;
+ card->private_free = snd_card_als4000_free;
+
+ /* disable all legacy ISA stuff */
+ snd_als4000_set_addr(acard->gcr, 0, 0, 0, 0);
+
+ if ((err = snd_sbdsp_create(card,
+ gcr + 0x10,
+ pci->irq,
+ snd_als4000_interrupt,
+ -1,
+ -1,
+ SB_HW_ALS4000,
+ &chip)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+
+ chip->pci = pci;
+ chip->alt_port = gcr;
+ snd_card_set_dev(card, &pci->dev);
+
+ snd_als4000_configure(chip);
+
+ strcpy(card->driver, "ALS4000");
+ strcpy(card->shortname, "Avance Logic ALS4000");
+ sprintf(card->longname, "%s at 0x%lx, irq %i",
+ card->shortname, chip->alt_port, chip->irq);
+
+ if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_ALS4000,
+ gcr+0x30, 1, pci->irq, 0,
+ &chip->rmidi)) < 0) {
+ snd_card_free(card);
+ printk(KERN_ERR "als4000: no MPU-401device at 0x%lx ?\n", gcr+0x30);
+ return err;
+ }
+
+ if ((err = snd_als4000_pcm(chip, 0)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+ if ((err = snd_sbmixer_new(chip)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+
+ if (snd_opl3_create(card, gcr+0x10, gcr+0x12,
+ OPL3_HW_AUTO, 1, &opl3) < 0) {
+ printk(KERN_ERR "als4000: no OPL device at 0x%lx-0x%lx ?\n",
+ gcr+0x10, gcr+0x12 );
+ } else {
+ if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+ }
+
+ snd_als4000_create_gameport(acard, dev);
+
+ if ((err = snd_card_register(card)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+ pci_set_drvdata(pci, card);
+ dev++;
+ return 0;
+}
+
+static void __devexit snd_card_als4000_remove(struct pci_dev *pci)
+{
+ snd_card_free(pci_get_drvdata(pci));
+ pci_set_drvdata(pci, NULL);
+}
+
+static struct pci_driver driver = {
+ .name = "ALS4000",
+ .id_table = snd_als4000_ids,
+ .probe = snd_card_als4000_probe,
+ .remove = __devexit_p(snd_card_als4000_remove),
+};
+
+static int __init alsa_card_als4000_init(void)
+{
+ return pci_module_init(&driver);
+}
+
+static void __exit alsa_card_als4000_exit(void)
+{
+ pci_unregister_driver(&driver);
+}
+
+module_init(alsa_card_als4000_init)
+module_exit(alsa_card_als4000_exit)
diff --git a/sound/pci/atiixp.c b/sound/pci/atiixp.c
new file mode 100644
index 000000000000..6b04c0acc6f7
--- /dev/null
+++ b/sound/pci/atiixp.c
@@ -0,0 +1,1657 @@
+/*
+ * ALSA driver for ATI IXP 150/200/250/300 AC97 controllers
+ *
+ * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <sound/driver.h>
+#include <asm/io.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/moduleparam.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/info.h>
+#include <sound/ac97_codec.h>
+#include <sound/initval.h>
+
+MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
+MODULE_DESCRIPTION("ATI IXP AC97 controller");
+MODULE_LICENSE("GPL");
+MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250/300/400}}");
+
+static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
+static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
+static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
+static int ac97_clock[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 48000};
+static char *ac97_quirk[SNDRV_CARDS];
+static int spdif_aclink[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1};
+
+module_param_array(index, int, NULL, 0444);
+MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
+module_param_array(id, charp, NULL, 0444);
+MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
+module_param_array(enable, bool, NULL, 0444);
+MODULE_PARM_DESC(enable, "Enable audio part of ATI IXP controller.");
+module_param_array(ac97_clock, int, NULL, 0444);
+MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
+module_param_array(ac97_quirk, charp, NULL, 0444);
+MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
+module_param_array(spdif_aclink, bool, NULL, 0444);
+MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
+
+
+/*
+ */
+
+#define ATI_REG_ISR 0x00 /* interrupt source */
+#define ATI_REG_ISR_IN_XRUN (1U<<0)
+#define ATI_REG_ISR_IN_STATUS (1U<<1)
+#define ATI_REG_ISR_OUT_XRUN (1U<<2)
+#define ATI_REG_ISR_OUT_STATUS (1U<<3)
+#define ATI_REG_ISR_SPDF_XRUN (1U<<4)
+#define ATI_REG_ISR_SPDF_STATUS (1U<<5)
+#define ATI_REG_ISR_PHYS_INTR (1U<<8)
+#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
+#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
+#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
+#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
+#define ATI_REG_ISR_NEW_FRAME (1U<<13)
+
+#define ATI_REG_IER 0x04 /* interrupt enable */
+#define ATI_REG_IER_IN_XRUN_EN (1U<<0)
+#define ATI_REG_IER_IO_STATUS_EN (1U<<1)
+#define ATI_REG_IER_OUT_XRUN_EN (1U<<2)
+#define ATI_REG_IER_OUT_XRUN_COND (1U<<3)
+#define ATI_REG_IER_SPDF_XRUN_EN (1U<<4)
+#define ATI_REG_IER_SPDF_STATUS_EN (1U<<5)
+#define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
+#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
+#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
+#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
+#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
+#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
+#define ATI_REG_IER_SET_BUS_BUSY (1U<<14) /* (WO) audio is running */
+
+#define ATI_REG_CMD 0x08 /* command */
+#define ATI_REG_CMD_POWERDOWN (1U<<0)
+#define ATI_REG_CMD_RECEIVE_EN (1U<<1)
+#define ATI_REG_CMD_SEND_EN (1U<<2)
+#define ATI_REG_CMD_STATUS_MEM (1U<<3)
+#define ATI_REG_CMD_SPDF_OUT_EN (1U<<4)
+#define ATI_REG_CMD_SPDF_STATUS_MEM (1U<<5)
+#define ATI_REG_CMD_SPDF_THRESHOLD (3U<<6)
+#define ATI_REG_CMD_SPDF_THRESHOLD_SHIFT 6
+#define ATI_REG_CMD_IN_DMA_EN (1U<<8)
+#define ATI_REG_CMD_OUT_DMA_EN (1U<<9)
+#define ATI_REG_CMD_SPDF_DMA_EN (1U<<10)
+#define ATI_REG_CMD_SPDF_OUT_STOPPED (1U<<11)
+#define ATI_REG_CMD_SPDF_CONFIG_MASK (7U<<12)
+#define ATI_REG_CMD_SPDF_CONFIG_34 (1U<<12)
+#define ATI_REG_CMD_SPDF_CONFIG_78 (2U<<12)
+#define ATI_REG_CMD_SPDF_CONFIG_69 (3U<<12)
+#define ATI_REG_CMD_SPDF_CONFIG_01 (4U<<12)
+#define ATI_REG_CMD_INTERLEAVE_SPDF (1U<<16)
+#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
+#define ATI_REG_CMD_INTERLEAVE_IN (1U<<21)
+#define ATI_REG_CMD_INTERLEAVE_OUT (1U<<22)
+#define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
+#define ATI_REG_CMD_PACKED_DIS (1U<<24)
+#define ATI_REG_CMD_BURST_EN (1U<<25)
+#define ATI_REG_CMD_PANIC_EN (1U<<26)
+#define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
+#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
+#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
+#define ATI_REG_CMD_AC_SYNC (1U<<30)
+#define ATI_REG_CMD_AC_RESET (1U<<31)
+
+#define ATI_REG_PHYS_OUT_ADDR 0x0c
+#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
+#define ATI_REG_PHYS_OUT_RW (1U<<2)
+#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
+#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
+#define ATI_REG_PHYS_OUT_DATA_SHIFT 16
+
+#define ATI_REG_PHYS_IN_ADDR 0x10
+#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
+#define ATI_REG_PHYS_IN_ADDR_SHIFT 9
+#define ATI_REG_PHYS_IN_DATA_SHIFT 16
+
+#define ATI_REG_SLOTREQ 0x14
+
+#define ATI_REG_COUNTER 0x18
+#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
+#define ATI_REG_COUNTER_BITCLOCK (31U<<8)
+
+#define ATI_REG_IN_FIFO_THRESHOLD 0x1c
+
+#define ATI_REG_IN_DMA_LINKPTR 0x20
+#define ATI_REG_IN_DMA_DT_START 0x24 /* RO */
+#define ATI_REG_IN_DMA_DT_NEXT 0x28 /* RO */
+#define ATI_REG_IN_DMA_DT_CUR 0x2c /* RO */
+#define ATI_REG_IN_DMA_DT_SIZE 0x30
+
+#define ATI_REG_OUT_DMA_SLOT 0x34
+#define ATI_REG_OUT_DMA_SLOT_BIT(x) (1U << ((x) - 3))
+#define ATI_REG_OUT_DMA_SLOT_MASK 0x1ff
+#define ATI_REG_OUT_DMA_THRESHOLD_MASK 0xf800
+#define ATI_REG_OUT_DMA_THRESHOLD_SHIFT 11
+
+#define ATI_REG_OUT_DMA_LINKPTR 0x38
+#define ATI_REG_OUT_DMA_DT_START 0x3c /* RO */
+#define ATI_REG_OUT_DMA_DT_NEXT 0x40 /* RO */
+#define ATI_REG_OUT_DMA_DT_CUR 0x44 /* RO */
+#define ATI_REG_OUT_DMA_DT_SIZE 0x48
+
+#define ATI_REG_SPDF_CMD 0x4c
+#define ATI_REG_SPDF_CMD_LFSR (1U<<4)
+#define ATI_REG_SPDF_CMD_SINGLE_CH (1U<<5)
+#define ATI_REG_SPDF_CMD_LFSR_ACC (0xff<<8) /* RO */
+
+#define ATI_REG_SPDF_DMA_LINKPTR 0x50
+#define ATI_REG_SPDF_DMA_DT_START 0x54 /* RO */
+#define ATI_REG_SPDF_DMA_DT_NEXT 0x58 /* RO */
+#define ATI_REG_SPDF_DMA_DT_CUR 0x5c /* RO */
+#define ATI_REG_SPDF_DMA_DT_SIZE 0x60
+
+#define ATI_REG_MODEM_MIRROR 0x7c
+#define ATI_REG_AUDIO_MIRROR 0x80
+
+#define ATI_REG_6CH_REORDER 0x84 /* reorder slots for 6ch */
+#define ATI_REG_6CH_REORDER_EN (1U<<0) /* 3,4,7,8,6,9 -> 3,4,6,9,7,8 */
+
+#define ATI_REG_FIFO_FLUSH 0x88
+#define ATI_REG_FIFO_OUT_FLUSH (1U<<0)
+#define ATI_REG_FIFO_IN_FLUSH (1U<<1)
+
+/* LINKPTR */
+#define ATI_REG_LINKPTR_EN (1U<<0)
+
+/* [INT|OUT|SPDIF]_DMA_DT_SIZE */
+#define ATI_REG_DMA_DT_SIZE (0xffffU<<0)
+#define ATI_REG_DMA_FIFO_USED (0x1fU<<16)
+#define ATI_REG_DMA_FIFO_FREE (0x1fU<<21)
+#define ATI_REG_DMA_STATE (7U<<26)
+
+
+#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
+
+
+/*
+ */
+
+typedef struct snd_atiixp atiixp_t;
+typedef struct snd_atiixp_dma atiixp_dma_t;
+typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
+
+
+/*
+ * DMA packate descriptor
+ */
+
+typedef struct atiixp_dma_desc {
+ u32 addr; /* DMA buffer address */
+ u16 status; /* status bits */
+ u16 size; /* size of the packet in dwords */
+ u32 next; /* address of the next packet descriptor */
+} atiixp_dma_desc_t;
+
+/*
+ * stream enum
+ */
+enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, ATI_DMA_SPDIF, NUM_ATI_DMAS }; /* DMAs */
+enum { ATI_PCM_OUT, ATI_PCM_IN, ATI_PCM_SPDIF, NUM_ATI_PCMS }; /* AC97 pcm slots */
+enum { ATI_PCMDEV_ANALOG, ATI_PCMDEV_DIGITAL, NUM_ATI_PCMDEVS }; /* pcm devices */
+
+#define NUM_ATI_CODECS 3
+
+
+/*
+ * constants and callbacks for each DMA type
+ */
+struct snd_atiixp_dma_ops {
+ int type; /* ATI_DMA_XXX */
+ unsigned int llp_offset; /* LINKPTR offset */
+ unsigned int dt_cur; /* DT_CUR offset */
+ void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
+ void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
+ void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
+};
+
+/*
+ * DMA stream
+ */
+struct snd_atiixp_dma {
+ const atiixp_dma_ops_t *ops;
+ struct snd_dma_buffer desc_buf;
+ snd_pcm_substream_t *substream; /* assigned PCM substream */
+ unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
+ unsigned int period_bytes, periods;
+ int opened;
+ int running;
+ int pcm_open_flag;
+ int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
+ unsigned int saved_curptr;
+};
+
+/*
+ * ATI IXP chip
+ */
+struct snd_atiixp {
+ snd_card_t *card;
+ struct pci_dev *pci;
+
+ unsigned long addr;
+ void __iomem *remap_addr;
+ int irq;
+
+ ac97_bus_t *ac97_bus;
+ ac97_t *ac97[NUM_ATI_CODECS];
+
+ spinlock_t reg_lock;
+
+ atiixp_dma_t dmas[NUM_ATI_DMAS];
+ struct ac97_pcm *pcms[NUM_ATI_PCMS];
+ snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
+
+ int max_channels; /* max. channels for PCM out */
+
+ unsigned int codec_not_ready_bits; /* for codec detection */
+
+ int spdif_over_aclink; /* passed from the module option */
+ struct semaphore open_mutex; /* playback open mutex */
+};
+
+
+/*
+ */
+static struct pci_device_id snd_atiixp_ids[] = {
+ { 0x1002, 0x4341, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
+ { 0x1002, 0x4361, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB300 */
+ { 0x1002, 0x4370, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB400 */
+ { 0, }
+};
+
+MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
+
+
+/*
+ * lowlevel functions
+ */
+
+/*
+ * update the bits of the given register.
+ * return 1 if the bits changed.
+ */
+static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
+ unsigned int mask, unsigned int value)
+{
+ void __iomem *addr = chip->remap_addr + reg;
+ unsigned int data, old_data;
+ old_data = data = readl(addr);
+ data &= ~mask;
+ data |= value;
+ if (old_data == data)
+ return 0;
+ writel(data, addr);
+ return 1;
+}
+
+/*
+ * macros for easy use
+ */
+#define atiixp_write(chip,reg,value) \
+ writel(value, chip->remap_addr + ATI_REG_##reg)
+#define atiixp_read(chip,reg) \
+ readl(chip->remap_addr + ATI_REG_##reg)
+#define atiixp_update(chip,reg,mask,val) \
+ snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
+
+/* delay for one tick */
+#define do_delay() do { \
+ set_current_state(TASK_UNINTERRUPTIBLE); \
+ schedule_timeout(1); \
+} while (0)
+
+
+/*
+ * handling DMA packets
+ *
+ * we allocate a linear buffer for the DMA, and split it to each packet.
+ * in a future version, a scatter-gather buffer should be implemented.
+ */
+
+#define ATI_DESC_LIST_SIZE \
+ PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
+
+/*
+ * build packets ring for the given buffer size.
+ *
+ * IXP handles the buffer descriptors, which are connected as a linked
+ * list. although we can change the list dynamically, in this version,
+ * a static RING of buffer descriptors is used.
+ *
+ * the ring is built in this function, and is set up to the hardware.
+ */
+static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
+ snd_pcm_substream_t *substream,
+ unsigned int periods,
+ unsigned int period_bytes)
+{
+ unsigned int i;
+ u32 addr, desc_addr;
+ unsigned long flags;
+
+ if (periods > ATI_MAX_DESCRIPTORS)
+ return -ENOMEM;
+
+ if (dma->desc_buf.area == NULL) {
+ if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
+ ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
+ return -ENOMEM;
+ dma->period_bytes = dma->periods = 0; /* clear */
+ }
+
+ if (dma->periods == periods && dma->period_bytes == period_bytes)
+ return 0;
+
+ /* reset DMA before changing the descriptor table */
+ spin_lock_irqsave(&chip->reg_lock, flags);
+ writel(0, chip->remap_addr + dma->ops->llp_offset);
+ dma->ops->enable_dma(chip, 0);
+ dma->ops->enable_dma(chip, 1);
+ spin_unlock_irqrestore(&chip->reg_lock, flags);
+
+ /* fill the entries */
+ addr = (u32)substream->runtime->dma_addr;
+ desc_addr = (u32)dma->desc_buf.addr;
+ for (i = 0; i < periods; i++) {
+ atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
+ desc->addr = cpu_to_le32(addr);
+ desc->status = 0;
+ desc->size = period_bytes >> 2; /* in dwords */
+ desc_addr += sizeof(atiixp_dma_desc_t);
+ if (i == periods - 1)
+ desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
+ else
+ desc->next = cpu_to_le32(desc_addr);
+ addr += period_bytes;
+ }
+
+ writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
+ chip->remap_addr + dma->ops->llp_offset);
+
+ dma->period_bytes = period_bytes;
+ dma->periods = periods;
+
+ return 0;
+}
+
+/*
+ * remove the ring buffer and release it if assigned
+ */
+static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
+{
+ if (dma->desc_buf.area) {
+ writel(0, chip->remap_addr + dma->ops->llp_offset);
+ snd_dma_free_pages(&dma->desc_buf);
+ dma->desc_buf.area = NULL;
+ }
+}
+
+/*
+ * AC97 interface
+ */
+static int snd_atiixp_acquire_codec(atiixp_t *chip)
+{
+ int timeout = 1000;
+
+ while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
+ if (! timeout--) {
+ snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
+ return -EBUSY;
+ }
+ udelay(1);
+ }
+ return 0;
+}
+
+static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
+{
+ unsigned int data;
+ int timeout;
+
+ if (snd_atiixp_acquire_codec(chip) < 0)
+ return 0xffff;
+ data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
+ ATI_REG_PHYS_OUT_ADDR_EN |
+ ATI_REG_PHYS_OUT_RW |
+ codec;
+ atiixp_write(chip, PHYS_OUT_ADDR, data);
+ if (snd_atiixp_acquire_codec(chip) < 0)
+ return 0xffff;
+ timeout = 1000;
+ do {
+ data = atiixp_read(chip, PHYS_IN_ADDR);
+ if (data & ATI_REG_PHYS_IN_READ_FLAG)
+ return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
+ udelay(1);
+ } while (--timeout);
+ /* time out may happen during reset */
+ if (reg < 0x7c)
+ snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
+ return 0xffff;
+}
+
+
+static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
+{
+ unsigned int data;
+
+ if (snd_atiixp_acquire_codec(chip) < 0)
+ return;
+ data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
+ ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
+ ATI_REG_PHYS_OUT_ADDR_EN | codec;
+ atiixp_write(chip, PHYS_OUT_ADDR, data);
+}
+
+
+static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
+{
+ atiixp_t *chip = ac97->private_data;
+ return snd_atiixp_codec_read(chip, ac97->num, reg);
+
+}
+
+static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
+{
+ atiixp_t *chip = ac97->private_data;
+ snd_atiixp_codec_write(chip, ac97->num, reg, val);
+}
+
+/*
+ * reset AC link
+ */
+static int snd_atiixp_aclink_reset(atiixp_t *chip)
+{
+ int timeout;
+
+ /* reset powerdoewn */
+ if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
+ udelay(10);
+
+ /* perform a software reset */
+ atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
+ atiixp_read(chip, CMD);
+ udelay(10);
+ atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
+
+ timeout = 10;
+ while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
+ /* do a hard reset */
+ atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
+ ATI_REG_CMD_AC_SYNC);
+ atiixp_read(chip, CMD);
+ do_delay();
+ atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
+ if (--timeout) {
+ snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
+ break;
+ }
+ }
+
+ /* deassert RESET and assert SYNC to make sure */
+ atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
+ ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int snd_atiixp_aclink_down(atiixp_t *chip)
+{
+ // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
+ // return -EBUSY;
+ atiixp_update(chip, CMD,
+ ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
+ ATI_REG_CMD_POWERDOWN);
+ return 0;
+}
+#endif
+
+/*
+ * auto-detection of codecs
+ *
+ * the IXP chip can generate interrupts for the non-existing codecs.
+ * NEW_FRAME interrupt is used to make sure that the interrupt is generated
+ * even if all three codecs are connected.
+ */
+
+#define ALL_CODEC_NOT_READY \
+ (ATI_REG_ISR_CODEC0_NOT_READY |\
+ ATI_REG_ISR_CODEC1_NOT_READY |\
+ ATI_REG_ISR_CODEC2_NOT_READY)
+#define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
+
+static int snd_atiixp_codec_detect(atiixp_t *chip)
+{
+ int timeout;
+
+ chip->codec_not_ready_bits = 0;
+ atiixp_write(chip, IER, CODEC_CHECK_BITS);
+ /* wait for the interrupts */
+ timeout = HZ / 10;
+ while (timeout-- > 0) {
+ do_delay();
+ if (chip->codec_not_ready_bits)
+ break;
+ }
+ atiixp_write(chip, IER, 0); /* disable irqs */
+
+ if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
+ snd_printk(KERN_ERR "atiixp: no codec detected!\n");
+ return -ENXIO;
+ }
+ return 0;
+}
+
+
+/*
+ * enable DMA and irqs
+ */
+static int snd_atiixp_chip_start(atiixp_t *chip)
+{
+ unsigned int reg;
+
+ /* set up spdif, enable burst mode */
+ reg = atiixp_read(chip, CMD);
+ reg |= 0x02 << ATI_REG_CMD_SPDF_THRESHOLD_SHIFT;
+ reg |= ATI_REG_CMD_BURST_EN;
+ atiixp_write(chip, CMD, reg);
+
+ reg = atiixp_read(chip, SPDF_CMD);
+ reg &= ~(ATI_REG_SPDF_CMD_LFSR|ATI_REG_SPDF_CMD_SINGLE_CH);
+ atiixp_write(chip, SPDF_CMD, reg);
+
+ /* clear all interrupt source */
+ atiixp_write(chip, ISR, 0xffffffff);
+ /* enable irqs */
+ atiixp_write(chip, IER,
+ ATI_REG_IER_IO_STATUS_EN |
+ ATI_REG_IER_IN_XRUN_EN |
+ ATI_REG_IER_OUT_XRUN_EN |
+ ATI_REG_IER_SPDF_XRUN_EN |
+ ATI_REG_IER_SPDF_STATUS_EN);
+ return 0;
+}
+
+
+/*
+ * disable DMA and IRQs
+ */
+static int snd_atiixp_chip_stop(atiixp_t *chip)
+{
+ /* clear interrupt source */
+ atiixp_write(chip, ISR, atiixp_read(chip, ISR));
+ /* disable irqs */
+ atiixp_write(chip, IER, 0);
+ return 0;
+}
+
+
+/*
+ * PCM section
+ */
+
+/*
+ * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
+ * position. when SG-buffer is implemented, the offset must be calculated
+ * correctly...
+ */
+static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
+ unsigned int curptr;
+ int timeout = 1000;
+
+ while (timeout--) {
+ curptr = readl(chip->remap_addr + dma->ops->dt_cur);
+ if (curptr < dma->buf_addr)
+ continue;
+ curptr -= dma->buf_addr;
+ if (curptr >= dma->buf_bytes)
+ continue;
+ return bytes_to_frames(runtime, curptr);
+ }
+ snd_printd("atiixp: invalid DMA pointer read 0x%x (buf=%x)\n",
+ readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
+ return 0;
+}
+
+/*
+ * XRUN detected, and stop the PCM substream
+ */
+static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
+{
+ if (! dma->substream || ! dma->running)
+ return;
+ snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
+ snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
+}
+
+/*
+ * the period ack. update the substream.
+ */
+static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
+{
+ if (! dma->substream || ! dma->running)
+ return;
+ snd_pcm_period_elapsed(dma->substream);
+}
+
+/* set BUS_BUSY interrupt bit if any DMA is running */
+/* call with spinlock held */
+static void snd_atiixp_check_bus_busy(atiixp_t *chip)
+{
+ unsigned int bus_busy;
+ if (atiixp_read(chip, CMD) & (ATI_REG_CMD_SEND_EN |
+ ATI_REG_CMD_RECEIVE_EN |
+ ATI_REG_CMD_SPDF_OUT_EN))
+ bus_busy = ATI_REG_IER_SET_BUS_BUSY;
+ else
+ bus_busy = 0;
+ atiixp_update(chip, IER, ATI_REG_IER_SET_BUS_BUSY, bus_busy);
+}
+
+/* common trigger callback
+ * calling the lowlevel callbacks in it
+ */
+static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
+ int err = 0;
+
+ snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
+
+ spin_lock(&chip->reg_lock);
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ dma->ops->enable_transfer(chip, 1);
+ dma->running = 1;
+ break;
+ case SNDRV_PCM_TRIGGER_STOP:
+ dma->ops->enable_transfer(chip, 0);
+ dma->running = 0;
+ break;
+ default:
+ err = -EINVAL;
+ break;
+ }
+ if (! err) {
+ snd_atiixp_check_bus_busy(chip);
+ if (cmd == SNDRV_PCM_TRIGGER_STOP) {
+ dma->ops->flush_dma(chip);
+ snd_atiixp_check_bus_busy(chip);
+ }
+ }
+ spin_unlock(&chip->reg_lock);
+ return err;
+}
+
+
+/*
+ * lowlevel callbacks for each DMA type
+ *
+ * every callback is supposed to be called in chip->reg_lock spinlock
+ */
+
+/* flush FIFO of analog OUT DMA */
+static void atiixp_out_flush_dma(atiixp_t *chip)
+{
+ atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_OUT_FLUSH);
+}
+
+/* enable/disable analog OUT DMA */
+static void atiixp_out_enable_dma(atiixp_t *chip, int on)
+{
+ unsigned int data;
+ data = atiixp_read(chip, CMD);
+ if (on) {
+ if (data & ATI_REG_CMD_OUT_DMA_EN)
+ return;
+ atiixp_out_flush_dma(chip);
+ data |= ATI_REG_CMD_OUT_DMA_EN;
+ } else
+ data &= ~ATI_REG_CMD_OUT_DMA_EN;
+ atiixp_write(chip, CMD, data);
+}
+
+/* start/stop transfer over OUT DMA */
+static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
+{
+ atiixp_update(chip, CMD, ATI_REG_CMD_SEND_EN,
+ on ? ATI_REG_CMD_SEND_EN : 0);
+}
+
+/* enable/disable analog IN DMA */
+static void atiixp_in_enable_dma(atiixp_t *chip, int on)
+{
+ atiixp_update(chip, CMD, ATI_REG_CMD_IN_DMA_EN,
+ on ? ATI_REG_CMD_IN_DMA_EN : 0);
+}
+
+/* start/stop analog IN DMA */
+static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
+{
+ if (on) {
+ unsigned int data = atiixp_read(chip, CMD);
+ if (! (data & ATI_REG_CMD_RECEIVE_EN)) {
+ data |= ATI_REG_CMD_RECEIVE_EN;
+#if 0 /* FIXME: this causes the endless loop */
+ /* wait until slot 3/4 are finished */
+ while ((atiixp_read(chip, COUNTER) &
+ ATI_REG_COUNTER_SLOT) != 5)
+ ;
+#endif
+ atiixp_write(chip, CMD, data);
+ }
+ } else
+ atiixp_update(chip, CMD, ATI_REG_CMD_RECEIVE_EN, 0);
+}
+
+/* flush FIFO of analog IN DMA */
+static void atiixp_in_flush_dma(atiixp_t *chip)
+{
+ atiixp_write(chip, FIFO_FLUSH, ATI_REG_FIFO_IN_FLUSH);
+}
+
+/* enable/disable SPDIF OUT DMA */
+static void atiixp_spdif_enable_dma(atiixp_t *chip, int on)
+{
+ atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_DMA_EN,
+ on ? ATI_REG_CMD_SPDF_DMA_EN : 0);
+}
+
+/* start/stop SPDIF OUT DMA */
+static void atiixp_spdif_enable_transfer(atiixp_t *chip, int on)
+{
+ unsigned int data;
+ data = atiixp_read(chip, CMD);
+ if (on)
+ data |= ATI_REG_CMD_SPDF_OUT_EN;
+ else
+ data &= ~ATI_REG_CMD_SPDF_OUT_EN;
+ atiixp_write(chip, CMD, data);
+}
+
+/* flush FIFO of SPDIF OUT DMA */
+static void atiixp_spdif_flush_dma(atiixp_t *chip)
+{
+ int timeout;
+
+ /* DMA off, transfer on */
+ atiixp_spdif_enable_dma(chip, 0);
+ atiixp_spdif_enable_transfer(chip, 1);
+
+ timeout = 100;
+ do {
+ if (! (atiixp_read(chip, SPDF_DMA_DT_SIZE) & ATI_REG_DMA_FIFO_USED))
+ break;
+ udelay(1);
+ } while (timeout-- > 0);
+
+ atiixp_spdif_enable_transfer(chip, 0);
+}
+
+/* set up slots and formats for SPDIF OUT */
+static int snd_atiixp_spdif_prepare(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+
+ spin_lock_irq(&chip->reg_lock);
+ if (chip->spdif_over_aclink) {
+ unsigned int data;
+ /* enable slots 10/11 */
+ atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK,
+ ATI_REG_CMD_SPDF_CONFIG_01);
+ data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
+ data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
+ ATI_REG_OUT_DMA_SLOT_BIT(11);
+ data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
+ atiixp_write(chip, OUT_DMA_SLOT, data);
+ atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
+ substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
+ ATI_REG_CMD_INTERLEAVE_OUT : 0);
+ } else {
+ atiixp_update(chip, CMD, ATI_REG_CMD_SPDF_CONFIG_MASK, 0);
+ atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_SPDF, 0);
+ }
+ spin_unlock_irq(&chip->reg_lock);
+ return 0;
+}
+
+/* set up slots and formats for analog OUT */
+static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ unsigned int data;
+
+ spin_lock_irq(&chip->reg_lock);
+ data = atiixp_read(chip, OUT_DMA_SLOT) & ~ATI_REG_OUT_DMA_SLOT_MASK;
+ switch (substream->runtime->channels) {
+ case 8:
+ data |= ATI_REG_OUT_DMA_SLOT_BIT(10) |
+ ATI_REG_OUT_DMA_SLOT_BIT(11);
+ /* fallthru */
+ case 6:
+ data |= ATI_REG_OUT_DMA_SLOT_BIT(7) |
+ ATI_REG_OUT_DMA_SLOT_BIT(8);
+ /* fallthru */
+ case 4:
+ data |= ATI_REG_OUT_DMA_SLOT_BIT(6) |
+ ATI_REG_OUT_DMA_SLOT_BIT(9);
+ /* fallthru */
+ default:
+ data |= ATI_REG_OUT_DMA_SLOT_BIT(3) |
+ ATI_REG_OUT_DMA_SLOT_BIT(4);
+ break;
+ }
+
+ /* set output threshold */
+ data |= 0x04 << ATI_REG_OUT_DMA_THRESHOLD_SHIFT;
+ atiixp_write(chip, OUT_DMA_SLOT, data);
+
+ atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_OUT,
+ substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
+ ATI_REG_CMD_INTERLEAVE_OUT : 0);
+
+ /*
+ * enable 6 channel re-ordering bit if needed
+ */
+ atiixp_update(chip, 6CH_REORDER, ATI_REG_6CH_REORDER_EN,
+ substream->runtime->channels >= 6 ? ATI_REG_6CH_REORDER_EN: 0);
+
+ spin_unlock_irq(&chip->reg_lock);
+ return 0;
+}
+
+/* set up slots and formats for analog IN */
+static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+
+ spin_lock_irq(&chip->reg_lock);
+ atiixp_update(chip, CMD, ATI_REG_CMD_INTERLEAVE_IN,
+ substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE ?
+ ATI_REG_CMD_INTERLEAVE_IN : 0);
+ spin_unlock_irq(&chip->reg_lock);
+ return 0;
+}
+
+/*
+ * hw_params - allocate the buffer and set up buffer descriptors
+ */
+static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
+ snd_pcm_hw_params_t *hw_params)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
+ int err;
+
+ err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
+ if (err < 0)
+ return err;
+ dma->buf_addr = substream->runtime->dma_addr;
+ dma->buf_bytes = params_buffer_bytes(hw_params);
+
+ err = atiixp_build_dma_packets(chip, dma, substream,
+ params_periods(hw_params),
+ params_period_bytes(hw_params));
+ if (err < 0)
+ return err;
+
+ if (dma->ac97_pcm_type >= 0) {
+ struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
+ /* PCM is bound to AC97 codec(s)
+ * set up the AC97 codecs
+ */
+ if (dma->pcm_open_flag) {
+ snd_ac97_pcm_close(pcm);
+ dma->pcm_open_flag = 0;
+ }
+ err = snd_ac97_pcm_open(pcm, params_rate(hw_params),
+ params_channels(hw_params),
+ pcm->r[0].slots);
+ if (err >= 0)
+ dma->pcm_open_flag = 1;
+ }
+
+ return err;
+}
+
+static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
+
+ if (dma->pcm_open_flag) {
+ struct ac97_pcm *pcm = chip->pcms[dma->ac97_pcm_type];
+ snd_ac97_pcm_close(pcm);
+ dma->pcm_open_flag = 0;
+ }
+ atiixp_clear_dma_packets(chip, dma, substream);
+ snd_pcm_lib_free_pages(substream);
+ return 0;
+}
+
+
+/*
+ * pcm hardware definition, identical for all DMA types
+ */
+static snd_pcm_hardware_t snd_atiixp_pcm_hw =
+{
+ .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_RESUME |
+ SNDRV_PCM_INFO_MMAP_VALID),
+ .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
+ .rates = SNDRV_PCM_RATE_48000,
+ .rate_min = 48000,
+ .rate_max = 48000,
+ .channels_min = 2,
+ .channels_max = 2,
+ .buffer_bytes_max = 256 * 1024,
+ .period_bytes_min = 32,
+ .period_bytes_max = 128 * 1024,
+ .periods_min = 2,
+ .periods_max = ATI_MAX_DESCRIPTORS,
+};
+
+static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ int err;
+
+ snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
+
+ if (dma->opened)
+ return -EBUSY;
+ dma->substream = substream;
+ runtime->hw = snd_atiixp_pcm_hw;
+ dma->ac97_pcm_type = pcm_type;
+ if (pcm_type >= 0) {
+ runtime->hw.rates = chip->pcms[pcm_type]->rates;
+ snd_pcm_limit_hw_rates(runtime);
+ } else {
+ /* direct SPDIF */
+ runtime->hw.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE;
+ }
+ if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
+ return err;
+ runtime->private_data = dma;
+
+ /* enable DMA bits */
+ spin_lock_irq(&chip->reg_lock);
+ dma->ops->enable_dma(chip, 1);
+ spin_unlock_irq(&chip->reg_lock);
+ dma->opened = 1;
+
+ return 0;
+}
+
+static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ /* disable DMA bits */
+ snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
+ spin_lock_irq(&chip->reg_lock);
+ dma->ops->enable_dma(chip, 0);
+ spin_unlock_irq(&chip->reg_lock);
+ dma->substream = NULL;
+ dma->opened = 0;
+ return 0;
+}
+
+/*
+ */
+static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ int err;
+
+ down(&chip->open_mutex);
+ err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
+ up(&chip->open_mutex);
+ if (err < 0)
+ return err;
+ substream->runtime->hw.channels_max = chip->max_channels;
+ if (chip->max_channels > 2)
+ /* channels must be even */
+ snd_pcm_hw_constraint_step(substream->runtime, 0,
+ SNDRV_PCM_HW_PARAM_CHANNELS, 2);
+ return 0;
+}
+
+static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ int err;
+ down(&chip->open_mutex);
+ err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
+ up(&chip->open_mutex);
+ return err;
+}
+
+static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
+}
+
+static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
+}
+
+static int snd_atiixp_spdif_open(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ int err;
+ down(&chip->open_mutex);
+ if (chip->spdif_over_aclink) /* share DMA_PLAYBACK */
+ err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 2);
+ else
+ err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_SPDIF], -1);
+ up(&chip->open_mutex);
+ return err;
+}
+
+static int snd_atiixp_spdif_close(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ int err;
+ down(&chip->open_mutex);
+ if (chip->spdif_over_aclink)
+ err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
+ else
+ err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_SPDIF]);
+ up(&chip->open_mutex);
+ return err;
+}
+
+/* AC97 playback */
+static snd_pcm_ops_t snd_atiixp_playback_ops = {
+ .open = snd_atiixp_playback_open,
+ .close = snd_atiixp_playback_close,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = snd_atiixp_pcm_hw_params,
+ .hw_free = snd_atiixp_pcm_hw_free,
+ .prepare = snd_atiixp_playback_prepare,
+ .trigger = snd_atiixp_pcm_trigger,
+ .pointer = snd_atiixp_pcm_pointer,
+};
+
+/* AC97 capture */
+static snd_pcm_ops_t snd_atiixp_capture_ops = {
+ .open = snd_atiixp_capture_open,
+ .close = snd_atiixp_capture_close,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = snd_atiixp_pcm_hw_params,
+ .hw_free = snd_atiixp_pcm_hw_free,
+ .prepare = snd_atiixp_capture_prepare,
+ .trigger = snd_atiixp_pcm_trigger,
+ .pointer = snd_atiixp_pcm_pointer,
+};
+
+/* SPDIF playback */
+static snd_pcm_ops_t snd_atiixp_spdif_ops = {
+ .open = snd_atiixp_spdif_open,
+ .close = snd_atiixp_spdif_close,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = snd_atiixp_pcm_hw_params,
+ .hw_free = snd_atiixp_pcm_hw_free,
+ .prepare = snd_atiixp_spdif_prepare,
+ .trigger = snd_atiixp_pcm_trigger,
+ .pointer = snd_atiixp_pcm_pointer,
+};
+
+static struct ac97_pcm atiixp_pcm_defs[] __devinitdata = {
+ /* front PCM */
+ {
+ .exclusive = 1,
+ .r = { {
+ .slots = (1 << AC97_SLOT_PCM_LEFT) |
+ (1 << AC97_SLOT_PCM_RIGHT) |
+ (1 << AC97_SLOT_PCM_CENTER) |
+ (1 << AC97_SLOT_PCM_SLEFT) |
+ (1 << AC97_SLOT_PCM_SRIGHT) |
+ (1 << AC97_SLOT_LFE)
+ }
+ }
+ },
+ /* PCM IN #1 */
+ {
+ .stream = 1,
+ .exclusive = 1,
+ .r = { {
+ .slots = (1 << AC97_SLOT_PCM_LEFT) |
+ (1 << AC97_SLOT_PCM_RIGHT)
+ }
+ }
+ },
+ /* S/PDIF OUT (optional) */
+ {
+ .exclusive = 1,
+ .spdif = 1,
+ .r = { {
+ .slots = (1 << AC97_SLOT_SPDIF_LEFT2) |
+ (1 << AC97_SLOT_SPDIF_RIGHT2)
+ }
+ }
+ },
+};
+
+static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
+ .type = ATI_DMA_PLAYBACK,
+ .llp_offset = ATI_REG_OUT_DMA_LINKPTR,
+ .dt_cur = ATI_REG_OUT_DMA_DT_CUR,
+ .enable_dma = atiixp_out_enable_dma,
+ .enable_transfer = atiixp_out_enable_transfer,
+ .flush_dma = atiixp_out_flush_dma,
+};
+
+static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
+ .type = ATI_DMA_CAPTURE,
+ .llp_offset = ATI_REG_IN_DMA_LINKPTR,
+ .dt_cur = ATI_REG_IN_DMA_DT_CUR,
+ .enable_dma = atiixp_in_enable_dma,
+ .enable_transfer = atiixp_in_enable_transfer,
+ .flush_dma = atiixp_in_flush_dma,
+};
+
+static atiixp_dma_ops_t snd_atiixp_spdif_dma_ops = {
+ .type = ATI_DMA_SPDIF,
+ .llp_offset = ATI_REG_SPDF_DMA_LINKPTR,
+ .dt_cur = ATI_REG_SPDF_DMA_DT_CUR,
+ .enable_dma = atiixp_spdif_enable_dma,
+ .enable_transfer = atiixp_spdif_enable_transfer,
+ .flush_dma = atiixp_spdif_flush_dma,
+};
+
+
+static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
+{
+ snd_pcm_t *pcm;
+ ac97_bus_t *pbus = chip->ac97_bus;
+ int err, i, num_pcms;
+
+ /* initialize constants */
+ chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
+ chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
+ if (! chip->spdif_over_aclink)
+ chip->dmas[ATI_DMA_SPDIF].ops = &snd_atiixp_spdif_dma_ops;
+
+ /* assign AC97 pcm */
+ if (chip->spdif_over_aclink)
+ num_pcms = 3;
+ else
+ num_pcms = 2;
+ err = snd_ac97_pcm_assign(pbus, num_pcms, atiixp_pcm_defs);
+ if (err < 0)
+ return err;
+ for (i = 0; i < num_pcms; i++)
+ chip->pcms[i] = &pbus->pcms[i];
+
+ chip->max_channels = 2;
+ if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
+ if (pbus->pcms[ATI_PCM_OUT].r[0].slots & (1 << AC97_SLOT_LFE))
+ chip->max_channels = 6;
+ else
+ chip->max_channels = 4;
+ }
+
+ /* PCM #0: analog I/O */
+ err = snd_pcm_new(chip->card, "ATI IXP AC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
+ if (err < 0)
+ return err;
+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
+ pcm->private_data = chip;
+ strcpy(pcm->name, "ATI IXP AC97");
+ chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
+
+ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
+ snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
+
+ /* no SPDIF support on codec? */
+ if (chip->pcms[ATI_PCM_SPDIF] && ! chip->pcms[ATI_PCM_SPDIF]->rates)
+ return 0;
+
+ /* FIXME: non-48k sample rate doesn't work on my test machine with AD1888 */
+ if (chip->pcms[ATI_PCM_SPDIF])
+ chip->pcms[ATI_PCM_SPDIF]->rates = SNDRV_PCM_RATE_48000;
+
+ /* PCM #1: spdif playback */
+ err = snd_pcm_new(chip->card, "ATI IXP IEC958", ATI_PCMDEV_DIGITAL, 1, 0, &pcm);
+ if (err < 0)
+ return err;
+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_spdif_ops);
+ pcm->private_data = chip;
+ if (chip->spdif_over_aclink)
+ strcpy(pcm->name, "ATI IXP IEC958 (AC97)");
+ else
+ strcpy(pcm->name, "ATI IXP IEC958 (Direct)");
+ chip->pcmdevs[ATI_PCMDEV_DIGITAL] = pcm;
+
+ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
+ snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
+
+ /* pre-select AC97 SPDIF slots 10/11 */
+ for (i = 0; i < NUM_ATI_CODECS; i++) {
+ if (chip->ac97[i])
+ snd_ac97_update_bits(chip->ac97[i], AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
+ }
+
+ return 0;
+}
+
+
+
+/*
+ * interrupt handler
+ */
+static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+ atiixp_t *chip = dev_id;
+ unsigned int status;
+
+ status = atiixp_read(chip, ISR);
+
+ if (! status)
+ return IRQ_NONE;
+
+ /* process audio DMA */
+ if (status & ATI_REG_ISR_OUT_XRUN)
+ snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
+ else if (status & ATI_REG_ISR_OUT_STATUS)
+ snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
+ if (status & ATI_REG_ISR_IN_XRUN)
+ snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
+ else if (status & ATI_REG_ISR_IN_STATUS)
+ snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
+ if (! chip->spdif_over_aclink) {
+ if (status & ATI_REG_ISR_SPDF_XRUN)
+ snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
+ else if (status & ATI_REG_ISR_SPDF_STATUS)
+ snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_SPDIF]);
+ }
+
+ /* for codec detection */
+ if (status & CODEC_CHECK_BITS) {
+ unsigned int detected;
+ detected = status & CODEC_CHECK_BITS;
+ spin_lock(&chip->reg_lock);
+ chip->codec_not_ready_bits |= detected;
+ atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
+ spin_unlock(&chip->reg_lock);
+ }
+
+ /* ack */
+ atiixp_write(chip, ISR, status);
+
+ return IRQ_HANDLED;
+}
+
+
+/*
+ * ac97 mixer section
+ */
+
+static struct ac97_quirk ac97_quirks[] __devinitdata = {
+ {
+ .vendor = 0x103c,
+ .device = 0x006b,
+ .name = "HP Pavilion ZV5030US",
+ .type = AC97_TUNE_MUTE_LED
+ },
+ { } /* terminator */
+};
+
+static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock, const char *quirk_override)
+{
+ ac97_bus_t *pbus;
+ ac97_template_t ac97;
+ int i, err;
+ int codec_count;
+ static ac97_bus_ops_t ops = {
+ .write = snd_atiixp_ac97_write,
+ .read = snd_atiixp_ac97_read,
+ };
+ static unsigned int codec_skip[NUM_ATI_CODECS] = {
+ ATI_REG_ISR_CODEC0_NOT_READY,
+ ATI_REG_ISR_CODEC1_NOT_READY,
+ ATI_REG_ISR_CODEC2_NOT_READY,
+ };
+
+ if (snd_atiixp_codec_detect(chip) < 0)
+ return -ENXIO;
+
+ if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
+ return err;
+ pbus->clock = clock;
+ pbus->shared_type = AC97_SHARED_TYPE_ATIIXP; /* shared with modem driver */
+ chip->ac97_bus = pbus;
+
+ codec_count = 0;
+ for (i = 0; i < NUM_ATI_CODECS; i++) {
+ if (chip->codec_not_ready_bits & codec_skip[i])
+ continue;
+ memset(&ac97, 0, sizeof(ac97));
+ ac97.private_data = chip;
+ ac97.pci = chip->pci;
+ ac97.num = i;
+ ac97.scaps = AC97_SCAP_SKIP_MODEM;
+ if (! chip->spdif_over_aclink)
+ ac97.scaps |= AC97_SCAP_NO_SPDIF;
+ if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
+ chip->ac97[i] = NULL; /* to be sure */
+ snd_printdd("atiixp: codec %d not available for audio\n", i);
+ continue;
+ }
+ codec_count++;
+ }
+
+ if (! codec_count) {
+ snd_printk(KERN_ERR "atiixp: no codec available\n");
+ return -ENODEV;
+ }
+
+ snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
+
+ return 0;
+}
+
+
+#ifdef CONFIG_PM
+/*
+ * power management
+ */
+static int snd_atiixp_suspend(snd_card_t *card, pm_message_t state)
+{
+ atiixp_t *chip = card->pm_private_data;
+ int i;
+
+ for (i = 0; i < NUM_ATI_PCMDEVS; i++)
+ if (chip->pcmdevs[i]) {
+ atiixp_dma_t *dma = &chip->dmas[i];
+ if (dma->substream && dma->running)
+ dma->saved_curptr = readl(chip->remap_addr + dma->ops->dt_cur);
+ snd_pcm_suspend_all(chip->pcmdevs[i]);
+ }
+ for (i = 0; i < NUM_ATI_CODECS; i++)
+ if (chip->ac97[i])
+ snd_ac97_suspend(chip->ac97[i]);
+ snd_atiixp_aclink_down(chip);
+ snd_atiixp_chip_stop(chip);
+
+ pci_set_power_state(chip->pci, 3);
+ pci_disable_device(chip->pci);
+ return 0;
+}
+
+static int snd_atiixp_resume(snd_card_t *card)
+{
+ atiixp_t *chip = card->pm_private_data;
+ int i;
+
+ pci_enable_device(chip->pci);
+ pci_set_power_state(chip->pci, 0);
+ pci_set_master(chip->pci);
+
+ snd_atiixp_aclink_reset(chip);
+ snd_atiixp_chip_start(chip);
+
+ for (i = 0; i < NUM_ATI_CODECS; i++)
+ if (chip->ac97[i])
+ snd_ac97_resume(chip->ac97[i]);
+
+ for (i = 0; i < NUM_ATI_PCMDEVS; i++)
+ if (chip->pcmdevs[i]) {
+ atiixp_dma_t *dma = &chip->dmas[i];
+ if (dma->substream && dma->running) {
+ dma->ops->enable_dma(chip, 1);
+ writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
+ chip->remap_addr + dma->ops->llp_offset);
+ writel(dma->saved_curptr, chip->remap_addr + dma->ops->dt_cur);
+ }
+ }
+
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+
+/*
+ * proc interface for register dump
+ */
+
+static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
+{
+ atiixp_t *chip = entry->private_data;
+ int i;
+
+ for (i = 0; i < 256; i += 4)
+ snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
+}
+
+static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
+{
+ snd_info_entry_t *entry;
+
+ if (! snd_card_proc_new(chip->card, "atiixp", &entry))
+ snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
+}
+
+
+
+/*
+ * destructor
+ */
+
+static int snd_atiixp_free(atiixp_t *chip)
+{
+ if (chip->irq < 0)
+ goto __hw_end;
+ snd_atiixp_chip_stop(chip);
+ synchronize_irq(chip->irq);
+ __hw_end:
+ if (chip->irq >= 0)
+ free_irq(chip->irq, (void *)chip);
+ if (chip->remap_addr)
+ iounmap(chip->remap_addr);
+ pci_release_regions(chip->pci);
+ pci_disable_device(chip->pci);
+ kfree(chip);
+ return 0;
+}
+
+static int snd_atiixp_dev_free(snd_device_t *device)
+{
+ atiixp_t *chip = device->device_data;
+ return snd_atiixp_free(chip);
+}
+
+/*
+ * constructor for chip instance
+ */
+static int __devinit snd_atiixp_create(snd_card_t *card,
+ struct pci_dev *pci,
+ atiixp_t **r_chip)
+{
+ static snd_device_ops_t ops = {
+ .dev_free = snd_atiixp_dev_free,
+ };
+ atiixp_t *chip;
+ int err;
+
+ if ((err = pci_enable_device(pci)) < 0)
+ return err;
+
+ chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
+ if (chip == NULL) {
+ pci_disable_device(pci);
+ return -ENOMEM;
+ }
+
+ spin_lock_init(&chip->reg_lock);
+ init_MUTEX(&chip->open_mutex);
+ chip->card = card;
+ chip->pci = pci;
+ chip->irq = -1;
+ if ((err = pci_request_regions(pci, "ATI IXP AC97")) < 0) {
+ pci_disable_device(pci);
+ kfree(chip);
+ return err;
+ }
+ chip->addr = pci_resource_start(pci, 0);
+ chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
+ if (chip->remap_addr == NULL) {
+ snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
+ snd_atiixp_free(chip);
+ return -EIO;
+ }
+
+ if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
+ snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
+ snd_atiixp_free(chip);
+ return -EBUSY;
+ }
+ chip->irq = pci->irq;
+ pci_set_master(pci);
+ synchronize_irq(chip->irq);
+
+ if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
+ snd_atiixp_free(chip);
+ return err;
+ }
+
+ snd_card_set_dev(card, &pci->dev);
+
+ *r_chip = chip;
+ return 0;
+}
+
+
+static int __devinit snd_atiixp_probe(struct pci_dev *pci,
+ const struct pci_device_id *pci_id)
+{
+ static int dev;
+ snd_card_t *card;
+ atiixp_t *chip;
+ unsigned char revision;
+ int err;
+
+ if (dev >= SNDRV_CARDS)
+ return -ENODEV;
+ if (!enable[dev]) {
+ dev++;
+ return -ENOENT;
+ }
+
+ card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
+ if (card == NULL)
+ return -ENOMEM;
+
+ pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
+
+ strcpy(card->driver, spdif_aclink[dev] ? "ATIIXP" : "ATIIXP-SPDMA");
+ strcpy(card->shortname, "ATI IXP");
+ if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
+ goto __error;
+
+ if ((err = snd_atiixp_aclink_reset(chip)) < 0)
+ goto __error;
+
+ chip->spdif_over_aclink = spdif_aclink[dev];
+
+ if ((err = snd_atiixp_mixer_new(chip, ac97_clock[dev], ac97_quirk[dev])) < 0)
+ goto __error;
+
+ if ((err = snd_atiixp_pcm_new(chip)) < 0)
+ goto __error;
+
+ snd_atiixp_proc_init(chip);
+
+ snd_atiixp_chip_start(chip);
+
+ snprintf(card->longname, sizeof(card->longname),
+ "%s rev %x with %s at %#lx, irq %i", card->shortname, revision,
+ chip->ac97[0] ? snd_ac97_get_short_name(chip->ac97[0]) : "?",
+ chip->addr, chip->irq);
+
+ snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
+
+ if ((err = snd_card_register(card)) < 0)
+ goto __error;
+
+ pci_set_drvdata(pci, card);
+ dev++;
+ return 0;
+
+ __error:
+ snd_card_free(card);
+ return err;
+}
+
+static void __devexit snd_atiixp_remove(struct pci_dev *pci)
+{
+ snd_card_free(pci_get_drvdata(pci));
+ pci_set_drvdata(pci, NULL);
+}
+
+static struct pci_driver driver = {
+ .name = "ATI IXP AC97 controller",
+ .id_table = snd_atiixp_ids,
+ .probe = snd_atiixp_probe,
+ .remove = __devexit_p(snd_atiixp_remove),
+ SND_PCI_PM_CALLBACKS
+};
+
+
+static int __init alsa_card_atiixp_init(void)
+{
+ return pci_module_init(&driver);
+}
+
+static void __exit alsa_card_atiixp_exit(void)
+{
+ pci_unregister_driver(&driver);
+}
+
+module_init(alsa_card_atiixp_init)
+module_exit(alsa_card_atiixp_exit)
diff --git a/sound/pci/atiixp_modem.c b/sound/pci/atiixp_modem.c
new file mode 100644
index 000000000000..5d3e537339f9
--- /dev/null
+++ b/sound/pci/atiixp_modem.c
@@ -0,0 +1,1344 @@
+/*
+ * ALSA driver for ATI IXP 150/200/250 AC97 modem controllers
+ *
+ * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#include <sound/driver.h>
+#include <asm/io.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/moduleparam.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/info.h>
+#include <sound/ac97_codec.h>
+#include <sound/initval.h>
+
+MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
+MODULE_DESCRIPTION("ATI IXP MC97 controller");
+MODULE_LICENSE("GPL");
+MODULE_SUPPORTED_DEVICE("{{ATI,IXP150/200/250}}");
+
+static int index[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -2}; /* Exclude the first card */
+static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
+static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
+static int ac97_clock[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 48000};
+
+module_param_array(index, int, NULL, 0444);
+MODULE_PARM_DESC(index, "Index value for ATI IXP controller.");
+module_param_array(id, charp, NULL, 0444);
+MODULE_PARM_DESC(id, "ID string for ATI IXP controller.");
+module_param_array(enable, bool, NULL, 0444);
+MODULE_PARM_DESC(enable, "Enable audio part of ATI IXP controller.");
+module_param_array(ac97_clock, int, NULL, 0444);
+MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (default 48000Hz).");
+
+
+/*
+ */
+
+#define ATI_REG_ISR 0x00 /* interrupt source */
+#define ATI_REG_ISR_MODEM_IN_XRUN (1U<<0)
+#define ATI_REG_ISR_MODEM_IN_STATUS (1U<<1)
+#define ATI_REG_ISR_MODEM_OUT1_XRUN (1U<<2)
+#define ATI_REG_ISR_MODEM_OUT1_STATUS (1U<<3)
+#define ATI_REG_ISR_MODEM_OUT2_XRUN (1U<<4)
+#define ATI_REG_ISR_MODEM_OUT2_STATUS (1U<<5)
+#define ATI_REG_ISR_MODEM_OUT3_XRUN (1U<<6)
+#define ATI_REG_ISR_MODEM_OUT3_STATUS (1U<<7)
+#define ATI_REG_ISR_PHYS_INTR (1U<<8)
+#define ATI_REG_ISR_PHYS_MISMATCH (1U<<9)
+#define ATI_REG_ISR_CODEC0_NOT_READY (1U<<10)
+#define ATI_REG_ISR_CODEC1_NOT_READY (1U<<11)
+#define ATI_REG_ISR_CODEC2_NOT_READY (1U<<12)
+#define ATI_REG_ISR_NEW_FRAME (1U<<13)
+#define ATI_REG_ISR_MODEM_GPIO_DATA (1U<<14)
+
+#define ATI_REG_IER 0x04 /* interrupt enable */
+#define ATI_REG_IER_MODEM_IN_XRUN_EN (1U<<0)
+#define ATI_REG_IER_MODEM_STATUS_EN (1U<<1)
+#define ATI_REG_IER_MODEM_OUT1_XRUN_EN (1U<<2)
+#define ATI_REG_IER_MODEM_OUT2_XRUN_EN (1U<<4)
+#define ATI_REG_IER_MODEM_OUT3_XRUN_EN (1U<<6)
+#define ATI_REG_IER_PHYS_INTR_EN (1U<<8)
+#define ATI_REG_IER_PHYS_MISMATCH_EN (1U<<9)
+#define ATI_REG_IER_CODEC0_INTR_EN (1U<<10)
+#define ATI_REG_IER_CODEC1_INTR_EN (1U<<11)
+#define ATI_REG_IER_CODEC2_INTR_EN (1U<<12)
+#define ATI_REG_IER_NEW_FRAME_EN (1U<<13) /* (RO */
+#define ATI_REG_IER_MODEM_GPIO_DATA_EN (1U<<14) /* (WO) modem is running */
+#define ATI_REG_IER_MODEM_SET_BUS_BUSY (1U<<15)
+
+#define ATI_REG_CMD 0x08 /* command */
+#define ATI_REG_CMD_POWERDOWN (1U<<0)
+#define ATI_REG_CMD_MODEM_RECEIVE_EN (1U<<1) /* modem only */
+#define ATI_REG_CMD_MODEM_SEND1_EN (1U<<2) /* modem only */
+#define ATI_REG_CMD_MODEM_SEND2_EN (1U<<3) /* modem only */
+#define ATI_REG_CMD_MODEM_SEND3_EN (1U<<4) /* modem only */
+#define ATI_REG_CMD_MODEM_STATUS_MEM (1U<<5) /* modem only */
+#define ATI_REG_CMD_MODEM_IN_DMA_EN (1U<<8) /* modem only */
+#define ATI_REG_CMD_MODEM_OUT_DMA1_EN (1U<<9) /* modem only */
+#define ATI_REG_CMD_MODEM_OUT_DMA2_EN (1U<<10) /* modem only */
+#define ATI_REG_CMD_MODEM_OUT_DMA3_EN (1U<<11) /* modem only */
+#define ATI_REG_CMD_AUDIO_PRESENT (1U<<20)
+#define ATI_REG_CMD_MODEM_GPIO_THRU_DMA (1U<<22) /* modem only */
+#define ATI_REG_CMD_LOOPBACK_EN (1U<<23)
+#define ATI_REG_CMD_PACKED_DIS (1U<<24)
+#define ATI_REG_CMD_BURST_EN (1U<<25)
+#define ATI_REG_CMD_PANIC_EN (1U<<26)
+#define ATI_REG_CMD_MODEM_PRESENT (1U<<27)
+#define ATI_REG_CMD_ACLINK_ACTIVE (1U<<28)
+#define ATI_REG_CMD_AC_SOFT_RESET (1U<<29)
+#define ATI_REG_CMD_AC_SYNC (1U<<30)
+#define ATI_REG_CMD_AC_RESET (1U<<31)
+
+#define ATI_REG_PHYS_OUT_ADDR 0x0c
+#define ATI_REG_PHYS_OUT_CODEC_MASK (3U<<0)
+#define ATI_REG_PHYS_OUT_RW (1U<<2)
+#define ATI_REG_PHYS_OUT_ADDR_EN (1U<<8)
+#define ATI_REG_PHYS_OUT_ADDR_SHIFT 9
+#define ATI_REG_PHYS_OUT_DATA_SHIFT 16
+
+#define ATI_REG_PHYS_IN_ADDR 0x10
+#define ATI_REG_PHYS_IN_READ_FLAG (1U<<8)
+#define ATI_REG_PHYS_IN_ADDR_SHIFT 9
+#define ATI_REG_PHYS_IN_DATA_SHIFT 16
+
+#define ATI_REG_SLOTREQ 0x14
+
+#define ATI_REG_COUNTER 0x18
+#define ATI_REG_COUNTER_SLOT (3U<<0) /* slot # */
+#define ATI_REG_COUNTER_BITCLOCK (31U<<8)
+
+#define ATI_REG_IN_FIFO_THRESHOLD 0x1c
+
+#define ATI_REG_MODEM_IN_DMA_LINKPTR 0x20
+#define ATI_REG_MODEM_IN_DMA_DT_START 0x24 /* RO */
+#define ATI_REG_MODEM_IN_DMA_DT_NEXT 0x28 /* RO */
+#define ATI_REG_MODEM_IN_DMA_DT_CUR 0x2c /* RO */
+#define ATI_REG_MODEM_IN_DMA_DT_SIZE 0x30
+#define ATI_REG_MODEM_OUT_FIFO 0x34 /* output threshold */
+#define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK (0xf<<16)
+#define ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT 16
+#define ATI_REG_MODEM_OUT_DMA1_LINKPTR 0x38
+#define ATI_REG_MODEM_OUT_DMA2_LINKPTR 0x3c
+#define ATI_REG_MODEM_OUT_DMA3_LINKPTR 0x40
+#define ATI_REG_MODEM_OUT_DMA1_DT_START 0x44
+#define ATI_REG_MODEM_OUT_DMA1_DT_NEXT 0x48
+#define ATI_REG_MODEM_OUT_DMA1_DT_CUR 0x4c
+#define ATI_REG_MODEM_OUT_DMA2_DT_START 0x50
+#define ATI_REG_MODEM_OUT_DMA2_DT_NEXT 0x54
+#define ATI_REG_MODEM_OUT_DMA2_DT_CUR 0x58
+#define ATI_REG_MODEM_OUT_DMA3_DT_START 0x5c
+#define ATI_REG_MODEM_OUT_DMA3_DT_NEXT 0x60
+#define ATI_REG_MODEM_OUT_DMA3_DT_CUR 0x64
+#define ATI_REG_MODEM_OUT_DMA12_DT_SIZE 0x68
+#define ATI_REG_MODEM_OUT_DMA3_DT_SIZE 0x6c
+#define ATI_REG_MODEM_OUT_FIFO_USED 0x70
+#define ATI_REG_MODEM_OUT_GPIO 0x74
+#define ATI_REG_MODEM_OUT_GPIO_EN 1
+#define ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT 5
+#define ATI_REG_MODEM_IN_GPIO 0x78
+
+#define ATI_REG_MODEM_MIRROR 0x7c
+#define ATI_REG_AUDIO_MIRROR 0x80
+
+#define ATI_REG_MODEM_FIFO_FLUSH 0x88
+#define ATI_REG_MODEM_FIFO_OUT1_FLUSH (1U<<0)
+#define ATI_REG_MODEM_FIFO_OUT2_FLUSH (1U<<1)
+#define ATI_REG_MODEM_FIFO_OUT3_FLUSH (1U<<2)
+#define ATI_REG_MODEM_FIFO_IN_FLUSH (1U<<3)
+
+/* LINKPTR */
+#define ATI_REG_LINKPTR_EN (1U<<0)
+
+#define ATI_MAX_DESCRIPTORS 256 /* max number of descriptor packets */
+
+
+/*
+ */
+
+typedef struct snd_atiixp atiixp_t;
+typedef struct snd_atiixp_dma atiixp_dma_t;
+typedef struct snd_atiixp_dma_ops atiixp_dma_ops_t;
+
+
+/*
+ * DMA packate descriptor
+ */
+
+typedef struct atiixp_dma_desc {
+ u32 addr; /* DMA buffer address */
+ u16 status; /* status bits */
+ u16 size; /* size of the packet in dwords */
+ u32 next; /* address of the next packet descriptor */
+} atiixp_dma_desc_t;
+
+/*
+ * stream enum
+ */
+enum { ATI_DMA_PLAYBACK, ATI_DMA_CAPTURE, NUM_ATI_DMAS }; /* DMAs */
+enum { ATI_PCM_OUT, ATI_PCM_IN, NUM_ATI_PCMS }; /* AC97 pcm slots */
+enum { ATI_PCMDEV_ANALOG, NUM_ATI_PCMDEVS }; /* pcm devices */
+
+#define NUM_ATI_CODECS 3
+
+
+/*
+ * constants and callbacks for each DMA type
+ */
+struct snd_atiixp_dma_ops {
+ int type; /* ATI_DMA_XXX */
+ unsigned int llp_offset; /* LINKPTR offset */
+ unsigned int dt_cur; /* DT_CUR offset */
+ void (*enable_dma)(atiixp_t *chip, int on); /* called from open callback */
+ void (*enable_transfer)(atiixp_t *chip, int on); /* called from trigger (START/STOP) */
+ void (*flush_dma)(atiixp_t *chip); /* called from trigger (STOP only) */
+};
+
+/*
+ * DMA stream
+ */
+struct snd_atiixp_dma {
+ const atiixp_dma_ops_t *ops;
+ struct snd_dma_buffer desc_buf;
+ snd_pcm_substream_t *substream; /* assigned PCM substream */
+ unsigned int buf_addr, buf_bytes; /* DMA buffer address, bytes */
+ unsigned int period_bytes, periods;
+ int opened;
+ int running;
+ int pcm_open_flag;
+ int ac97_pcm_type; /* index # of ac97_pcm to access, -1 = not used */
+};
+
+/*
+ * ATI IXP chip
+ */
+struct snd_atiixp {
+ snd_card_t *card;
+ struct pci_dev *pci;
+
+ struct resource *res; /* memory i/o */
+ unsigned long addr;
+ void __iomem *remap_addr;
+ int irq;
+
+ ac97_bus_t *ac97_bus;
+ ac97_t *ac97[NUM_ATI_CODECS];
+
+ spinlock_t reg_lock;
+
+ atiixp_dma_t dmas[NUM_ATI_DMAS];
+ struct ac97_pcm *pcms[NUM_ATI_PCMS];
+ snd_pcm_t *pcmdevs[NUM_ATI_PCMDEVS];
+
+ int max_channels; /* max. channels for PCM out */
+
+ unsigned int codec_not_ready_bits; /* for codec detection */
+
+ int spdif_over_aclink; /* passed from the module option */
+ struct semaphore open_mutex; /* playback open mutex */
+};
+
+
+/*
+ */
+static struct pci_device_id snd_atiixp_ids[] = {
+ { 0x1002, 0x434d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* SB200 */
+ { 0, }
+};
+
+MODULE_DEVICE_TABLE(pci, snd_atiixp_ids);
+
+
+/*
+ * lowlevel functions
+ */
+
+/*
+ * update the bits of the given register.
+ * return 1 if the bits changed.
+ */
+static int snd_atiixp_update_bits(atiixp_t *chip, unsigned int reg,
+ unsigned int mask, unsigned int value)
+{
+ void __iomem *addr = chip->remap_addr + reg;
+ unsigned int data, old_data;
+ old_data = data = readl(addr);
+ data &= ~mask;
+ data |= value;
+ if (old_data == data)
+ return 0;
+ writel(data, addr);
+ return 1;
+}
+
+/*
+ * macros for easy use
+ */
+#define atiixp_write(chip,reg,value) \
+ writel(value, chip->remap_addr + ATI_REG_##reg)
+#define atiixp_read(chip,reg) \
+ readl(chip->remap_addr + ATI_REG_##reg)
+#define atiixp_update(chip,reg,mask,val) \
+ snd_atiixp_update_bits(chip, ATI_REG_##reg, mask, val)
+
+/* delay for one tick */
+#define do_delay() do { \
+ set_current_state(TASK_UNINTERRUPTIBLE); \
+ schedule_timeout(1); \
+} while (0)
+
+
+/*
+ * handling DMA packets
+ *
+ * we allocate a linear buffer for the DMA, and split it to each packet.
+ * in a future version, a scatter-gather buffer should be implemented.
+ */
+
+#define ATI_DESC_LIST_SIZE \
+ PAGE_ALIGN(ATI_MAX_DESCRIPTORS * sizeof(atiixp_dma_desc_t))
+
+/*
+ * build packets ring for the given buffer size.
+ *
+ * IXP handles the buffer descriptors, which are connected as a linked
+ * list. although we can change the list dynamically, in this version,
+ * a static RING of buffer descriptors is used.
+ *
+ * the ring is built in this function, and is set up to the hardware.
+ */
+static int atiixp_build_dma_packets(atiixp_t *chip, atiixp_dma_t *dma,
+ snd_pcm_substream_t *substream,
+ unsigned int periods,
+ unsigned int period_bytes)
+{
+ unsigned int i;
+ u32 addr, desc_addr;
+ unsigned long flags;
+
+ if (periods > ATI_MAX_DESCRIPTORS)
+ return -ENOMEM;
+
+ if (dma->desc_buf.area == NULL) {
+ if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
+ ATI_DESC_LIST_SIZE, &dma->desc_buf) < 0)
+ return -ENOMEM;
+ dma->period_bytes = dma->periods = 0; /* clear */
+ }
+
+ if (dma->periods == periods && dma->period_bytes == period_bytes)
+ return 0;
+
+ /* reset DMA before changing the descriptor table */
+ spin_lock_irqsave(&chip->reg_lock, flags);
+ writel(0, chip->remap_addr + dma->ops->llp_offset);
+ dma->ops->enable_dma(chip, 0);
+ dma->ops->enable_dma(chip, 1);
+ spin_unlock_irqrestore(&chip->reg_lock, flags);
+
+ /* fill the entries */
+ addr = (u32)substream->runtime->dma_addr;
+ desc_addr = (u32)dma->desc_buf.addr;
+ for (i = 0; i < periods; i++) {
+ atiixp_dma_desc_t *desc = &((atiixp_dma_desc_t *)dma->desc_buf.area)[i];
+ desc->addr = cpu_to_le32(addr);
+ desc->status = 0;
+ desc->size = period_bytes >> 2; /* in dwords */
+ desc_addr += sizeof(atiixp_dma_desc_t);
+ if (i == periods - 1)
+ desc->next = cpu_to_le32((u32)dma->desc_buf.addr);
+ else
+ desc->next = cpu_to_le32(desc_addr);
+ addr += period_bytes;
+ }
+
+ writel((u32)dma->desc_buf.addr | ATI_REG_LINKPTR_EN,
+ chip->remap_addr + dma->ops->llp_offset);
+
+ dma->period_bytes = period_bytes;
+ dma->periods = periods;
+
+ return 0;
+}
+
+/*
+ * remove the ring buffer and release it if assigned
+ */
+static void atiixp_clear_dma_packets(atiixp_t *chip, atiixp_dma_t *dma, snd_pcm_substream_t *substream)
+{
+ if (dma->desc_buf.area) {
+ writel(0, chip->remap_addr + dma->ops->llp_offset);
+ snd_dma_free_pages(&dma->desc_buf);
+ dma->desc_buf.area = NULL;
+ }
+}
+
+/*
+ * AC97 interface
+ */
+static int snd_atiixp_acquire_codec(atiixp_t *chip)
+{
+ int timeout = 1000;
+
+ while (atiixp_read(chip, PHYS_OUT_ADDR) & ATI_REG_PHYS_OUT_ADDR_EN) {
+ if (! timeout--) {
+ snd_printk(KERN_WARNING "atiixp: codec acquire timeout\n");
+ return -EBUSY;
+ }
+ udelay(1);
+ }
+ return 0;
+}
+
+static unsigned short snd_atiixp_codec_read(atiixp_t *chip, unsigned short codec, unsigned short reg)
+{
+ unsigned int data;
+ int timeout;
+
+ if (snd_atiixp_acquire_codec(chip) < 0)
+ return 0xffff;
+ data = (reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
+ ATI_REG_PHYS_OUT_ADDR_EN |
+ ATI_REG_PHYS_OUT_RW |
+ codec;
+ atiixp_write(chip, PHYS_OUT_ADDR, data);
+ if (snd_atiixp_acquire_codec(chip) < 0)
+ return 0xffff;
+ timeout = 1000;
+ do {
+ data = atiixp_read(chip, PHYS_IN_ADDR);
+ if (data & ATI_REG_PHYS_IN_READ_FLAG)
+ return data >> ATI_REG_PHYS_IN_DATA_SHIFT;
+ udelay(1);
+ } while (--timeout);
+ /* time out may happen during reset */
+ if (reg < 0x7c)
+ snd_printk(KERN_WARNING "atiixp: codec read timeout (reg %x)\n", reg);
+ return 0xffff;
+}
+
+
+static void snd_atiixp_codec_write(atiixp_t *chip, unsigned short codec, unsigned short reg, unsigned short val)
+{
+ unsigned int data;
+
+ if (snd_atiixp_acquire_codec(chip) < 0)
+ return;
+ data = ((unsigned int)val << ATI_REG_PHYS_OUT_DATA_SHIFT) |
+ ((unsigned int)reg << ATI_REG_PHYS_OUT_ADDR_SHIFT) |
+ ATI_REG_PHYS_OUT_ADDR_EN | codec;
+ atiixp_write(chip, PHYS_OUT_ADDR, data);
+}
+
+
+static unsigned short snd_atiixp_ac97_read(ac97_t *ac97, unsigned short reg)
+{
+ atiixp_t *chip = ac97->private_data;
+ return snd_atiixp_codec_read(chip, ac97->num, reg);
+
+}
+
+static void snd_atiixp_ac97_write(ac97_t *ac97, unsigned short reg, unsigned short val)
+{
+ atiixp_t *chip = ac97->private_data;
+ snd_atiixp_codec_write(chip, ac97->num, reg, val);
+}
+
+/*
+ * reset AC link
+ */
+static int snd_atiixp_aclink_reset(atiixp_t *chip)
+{
+ int timeout;
+
+ /* reset powerdoewn */
+ if (atiixp_update(chip, CMD, ATI_REG_CMD_POWERDOWN, 0))
+ udelay(10);
+
+ /* perform a software reset */
+ atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, ATI_REG_CMD_AC_SOFT_RESET);
+ atiixp_read(chip, CMD);
+ udelay(10);
+ atiixp_update(chip, CMD, ATI_REG_CMD_AC_SOFT_RESET, 0);
+
+ timeout = 10;
+ while (! (atiixp_read(chip, CMD) & ATI_REG_CMD_ACLINK_ACTIVE)) {
+ /* do a hard reset */
+ atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
+ ATI_REG_CMD_AC_SYNC);
+ atiixp_read(chip, CMD);
+ do_delay();
+ atiixp_update(chip, CMD, ATI_REG_CMD_AC_RESET, ATI_REG_CMD_AC_RESET);
+ if (--timeout) {
+ snd_printk(KERN_ERR "atiixp: codec reset timeout\n");
+ break;
+ }
+ }
+
+ /* deassert RESET and assert SYNC to make sure */
+ atiixp_update(chip, CMD, ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET,
+ ATI_REG_CMD_AC_SYNC|ATI_REG_CMD_AC_RESET);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int snd_atiixp_aclink_down(atiixp_t *chip)
+{
+ // if (atiixp_read(chip, MODEM_MIRROR) & 0x1) /* modem running, too? */
+ // return -EBUSY;
+ atiixp_update(chip, CMD,
+ ATI_REG_CMD_POWERDOWN | ATI_REG_CMD_AC_RESET,
+ ATI_REG_CMD_POWERDOWN);
+ return 0;
+}
+#endif
+
+/*
+ * auto-detection of codecs
+ *
+ * the IXP chip can generate interrupts for the non-existing codecs.
+ * NEW_FRAME interrupt is used to make sure that the interrupt is generated
+ * even if all three codecs are connected.
+ */
+
+#define ALL_CODEC_NOT_READY \
+ (ATI_REG_ISR_CODEC0_NOT_READY |\
+ ATI_REG_ISR_CODEC1_NOT_READY |\
+ ATI_REG_ISR_CODEC2_NOT_READY)
+#define CODEC_CHECK_BITS (ALL_CODEC_NOT_READY|ATI_REG_ISR_NEW_FRAME)
+
+static int snd_atiixp_codec_detect(atiixp_t *chip)
+{
+ int timeout;
+
+ chip->codec_not_ready_bits = 0;
+ atiixp_write(chip, IER, CODEC_CHECK_BITS);
+ /* wait for the interrupts */
+ timeout = HZ / 10;
+ while (timeout-- > 0) {
+ do_delay();
+ if (chip->codec_not_ready_bits)
+ break;
+ }
+ atiixp_write(chip, IER, 0); /* disable irqs */
+
+ if ((chip->codec_not_ready_bits & ALL_CODEC_NOT_READY) == ALL_CODEC_NOT_READY) {
+ snd_printk(KERN_ERR "atiixp: no codec detected!\n");
+ return -ENXIO;
+ }
+ return 0;
+}
+
+
+/*
+ * enable DMA and irqs
+ */
+static int snd_atiixp_chip_start(atiixp_t *chip)
+{
+ unsigned int reg;
+
+ /* set up spdif, enable burst mode */
+ reg = atiixp_read(chip, CMD);
+ reg |= ATI_REG_CMD_BURST_EN;
+ if(!(reg & ATI_REG_CMD_MODEM_PRESENT))
+ reg |= ATI_REG_CMD_MODEM_PRESENT;
+ atiixp_write(chip, CMD, reg);
+
+ /* clear all interrupt source */
+ atiixp_write(chip, ISR, 0xffffffff);
+ /* enable irqs */
+ atiixp_write(chip, IER,
+ ATI_REG_IER_MODEM_STATUS_EN |
+ ATI_REG_IER_MODEM_IN_XRUN_EN |
+ ATI_REG_IER_MODEM_OUT1_XRUN_EN);
+ return 0;
+}
+
+
+/*
+ * disable DMA and IRQs
+ */
+static int snd_atiixp_chip_stop(atiixp_t *chip)
+{
+ /* clear interrupt source */
+ atiixp_write(chip, ISR, atiixp_read(chip, ISR));
+ /* disable irqs */
+ atiixp_write(chip, IER, 0);
+ return 0;
+}
+
+
+/*
+ * PCM section
+ */
+
+/*
+ * pointer callback simplly reads XXX_DMA_DT_CUR register as the current
+ * position. when SG-buffer is implemented, the offset must be calculated
+ * correctly...
+ */
+static snd_pcm_uframes_t snd_atiixp_pcm_pointer(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ atiixp_dma_t *dma = (atiixp_dma_t *)runtime->private_data;
+ unsigned int curptr;
+ int timeout = 1000;
+
+ while (timeout--) {
+ curptr = readl(chip->remap_addr + dma->ops->dt_cur);
+ if (curptr < dma->buf_addr)
+ continue;
+ curptr -= dma->buf_addr;
+ if (curptr >= dma->buf_bytes)
+ continue;
+ return bytes_to_frames(runtime, curptr);
+ }
+ snd_printd("atiixp-modem: invalid DMA pointer read 0x%x (buf=%x)\n",
+ readl(chip->remap_addr + dma->ops->dt_cur), dma->buf_addr);
+ return 0;
+}
+
+/*
+ * XRUN detected, and stop the PCM substream
+ */
+static void snd_atiixp_xrun_dma(atiixp_t *chip, atiixp_dma_t *dma)
+{
+ if (! dma->substream || ! dma->running)
+ return;
+ snd_printdd("atiixp: XRUN detected (DMA %d)\n", dma->ops->type);
+ snd_pcm_stop(dma->substream, SNDRV_PCM_STATE_XRUN);
+}
+
+/*
+ * the period ack. update the substream.
+ */
+static void snd_atiixp_update_dma(atiixp_t *chip, atiixp_dma_t *dma)
+{
+ if (! dma->substream || ! dma->running)
+ return;
+ snd_pcm_period_elapsed(dma->substream);
+}
+
+/* set BUS_BUSY interrupt bit if any DMA is running */
+/* call with spinlock held */
+static void snd_atiixp_check_bus_busy(atiixp_t *chip)
+{
+ unsigned int bus_busy;
+ if (atiixp_read(chip, CMD) & (ATI_REG_CMD_MODEM_SEND1_EN |
+ ATI_REG_CMD_MODEM_RECEIVE_EN))
+ bus_busy = ATI_REG_IER_MODEM_SET_BUS_BUSY;
+ else
+ bus_busy = 0;
+ atiixp_update(chip, IER, ATI_REG_IER_MODEM_SET_BUS_BUSY, bus_busy);
+}
+
+/* common trigger callback
+ * calling the lowlevel callbacks in it
+ */
+static int snd_atiixp_pcm_trigger(snd_pcm_substream_t *substream, int cmd)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
+ unsigned int reg = 0;
+ int i;
+
+ snd_assert(dma->ops->enable_transfer && dma->ops->flush_dma, return -EINVAL);
+
+ if (cmd != SNDRV_PCM_TRIGGER_START && cmd != SNDRV_PCM_TRIGGER_STOP)
+ return -EINVAL;
+
+ spin_lock(&chip->reg_lock);
+
+ /* hook off/on: via GPIO_OUT */
+ for (i = 0; i < NUM_ATI_CODECS; i++) {
+ if (chip->ac97[i]) {
+ reg = snd_ac97_read(chip->ac97[i], AC97_GPIO_STATUS);
+ break;
+ }
+ }
+ if(cmd == SNDRV_PCM_TRIGGER_START)
+ reg |= AC97_GPIO_LINE1_OH;
+ else
+ reg &= ~AC97_GPIO_LINE1_OH;
+ reg = (reg << ATI_REG_MODEM_OUT_GPIO_DATA_SHIFT) | ATI_REG_MODEM_OUT_GPIO_EN ;
+ atiixp_write(chip, MODEM_OUT_GPIO, reg);
+
+ if (cmd == SNDRV_PCM_TRIGGER_START) {
+ dma->ops->enable_transfer(chip, 1);
+ dma->running = 1;
+ } else {
+ dma->ops->enable_transfer(chip, 0);
+ dma->running = 0;
+ }
+ snd_atiixp_check_bus_busy(chip);
+ if (cmd == SNDRV_PCM_TRIGGER_STOP) {
+ dma->ops->flush_dma(chip);
+ snd_atiixp_check_bus_busy(chip);
+ }
+ spin_unlock(&chip->reg_lock);
+ return 0;
+}
+
+
+/*
+ * lowlevel callbacks for each DMA type
+ *
+ * every callback is supposed to be called in chip->reg_lock spinlock
+ */
+
+/* flush FIFO of analog OUT DMA */
+static void atiixp_out_flush_dma(atiixp_t *chip)
+{
+ atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_OUT1_FLUSH);
+}
+
+/* enable/disable analog OUT DMA */
+static void atiixp_out_enable_dma(atiixp_t *chip, int on)
+{
+ unsigned int data;
+ data = atiixp_read(chip, CMD);
+ if (on) {
+ if (data & ATI_REG_CMD_MODEM_OUT_DMA1_EN)
+ return;
+ atiixp_out_flush_dma(chip);
+ data |= ATI_REG_CMD_MODEM_OUT_DMA1_EN;
+ } else
+ data &= ~ATI_REG_CMD_MODEM_OUT_DMA1_EN;
+ atiixp_write(chip, CMD, data);
+}
+
+/* start/stop transfer over OUT DMA */
+static void atiixp_out_enable_transfer(atiixp_t *chip, int on)
+{
+ atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_SEND1_EN,
+ on ? ATI_REG_CMD_MODEM_SEND1_EN : 0);
+}
+
+/* enable/disable analog IN DMA */
+static void atiixp_in_enable_dma(atiixp_t *chip, int on)
+{
+ atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_IN_DMA_EN,
+ on ? ATI_REG_CMD_MODEM_IN_DMA_EN : 0);
+}
+
+/* start/stop analog IN DMA */
+static void atiixp_in_enable_transfer(atiixp_t *chip, int on)
+{
+ if (on) {
+ unsigned int data = atiixp_read(chip, CMD);
+ if (! (data & ATI_REG_CMD_MODEM_RECEIVE_EN)) {
+ data |= ATI_REG_CMD_MODEM_RECEIVE_EN;
+ atiixp_write(chip, CMD, data);
+ }
+ } else
+ atiixp_update(chip, CMD, ATI_REG_CMD_MODEM_RECEIVE_EN, 0);
+}
+
+/* flush FIFO of analog IN DMA */
+static void atiixp_in_flush_dma(atiixp_t *chip)
+{
+ atiixp_write(chip, MODEM_FIFO_FLUSH, ATI_REG_MODEM_FIFO_IN_FLUSH);
+}
+
+/* set up slots and formats for analog OUT */
+static int snd_atiixp_playback_prepare(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ unsigned int data;
+
+ spin_lock_irq(&chip->reg_lock);
+ /* set output threshold */
+ data = atiixp_read(chip, MODEM_OUT_FIFO);
+ data &= ~ATI_REG_MODEM_OUT1_DMA_THRESHOLD_MASK;
+ data |= 0x04 << ATI_REG_MODEM_OUT1_DMA_THRESHOLD_SHIFT;
+ atiixp_write(chip, MODEM_OUT_FIFO, data);
+ spin_unlock_irq(&chip->reg_lock);
+ return 0;
+}
+
+/* set up slots and formats for analog IN */
+static int snd_atiixp_capture_prepare(snd_pcm_substream_t *substream)
+{
+ return 0;
+}
+
+/*
+ * hw_params - allocate the buffer and set up buffer descriptors
+ */
+static int snd_atiixp_pcm_hw_params(snd_pcm_substream_t *substream,
+ snd_pcm_hw_params_t *hw_params)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
+ int err;
+ int i;
+
+ err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
+ if (err < 0)
+ return err;
+ dma->buf_addr = substream->runtime->dma_addr;
+ dma->buf_bytes = params_buffer_bytes(hw_params);
+
+ err = atiixp_build_dma_packets(chip, dma, substream,
+ params_periods(hw_params),
+ params_period_bytes(hw_params));
+ if (err < 0)
+ return err;
+
+ /* set up modem rate */
+ for (i = 0; i < NUM_ATI_CODECS; i++) {
+ if (! chip->ac97[i])
+ continue;
+ snd_ac97_write(chip->ac97[i], AC97_LINE1_RATE, params_rate(hw_params));
+ snd_ac97_write(chip->ac97[i], AC97_LINE1_LEVEL, 0);
+ }
+
+ return err;
+}
+
+static int snd_atiixp_pcm_hw_free(snd_pcm_substream_t * substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ atiixp_dma_t *dma = (atiixp_dma_t *)substream->runtime->private_data;
+
+ atiixp_clear_dma_packets(chip, dma, substream);
+ snd_pcm_lib_free_pages(substream);
+ return 0;
+}
+
+
+/*
+ * pcm hardware definition, identical for all DMA types
+ */
+static snd_pcm_hardware_t snd_atiixp_pcm_hw =
+{
+ .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_BLOCK_TRANSFER |
+ SNDRV_PCM_INFO_MMAP_VALID),
+ .formats = SNDRV_PCM_FMTBIT_S16_LE,
+ .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_KNOT,
+ .rate_min = 8000,
+ .rate_max = 16000,
+ .channels_min = 2,
+ .channels_max = 2,
+ .buffer_bytes_max = 256 * 1024,
+ .period_bytes_min = 32,
+ .period_bytes_max = 128 * 1024,
+ .periods_min = 2,
+ .periods_max = ATI_MAX_DESCRIPTORS,
+};
+
+static int snd_atiixp_pcm_open(snd_pcm_substream_t *substream, atiixp_dma_t *dma, int pcm_type)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ snd_pcm_runtime_t *runtime = substream->runtime;
+ int err;
+ static unsigned int rates[] = { 8000, 9600, 12000, 16000 };
+ static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
+ .count = ARRAY_SIZE(rates),
+ .list = rates,
+ .mask = 0,
+ };
+
+ snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
+
+ if (dma->opened)
+ return -EBUSY;
+ dma->substream = substream;
+ runtime->hw = snd_atiixp_pcm_hw;
+ dma->ac97_pcm_type = pcm_type;
+ if ((err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates)) < 0)
+ return err;
+ if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
+ return err;
+ runtime->private_data = dma;
+
+ /* enable DMA bits */
+ spin_lock_irq(&chip->reg_lock);
+ dma->ops->enable_dma(chip, 1);
+ spin_unlock_irq(&chip->reg_lock);
+ dma->opened = 1;
+
+ return 0;
+}
+
+static int snd_atiixp_pcm_close(snd_pcm_substream_t *substream, atiixp_dma_t *dma)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ /* disable DMA bits */
+ snd_assert(dma->ops && dma->ops->enable_dma, return -EINVAL);
+ spin_lock_irq(&chip->reg_lock);
+ dma->ops->enable_dma(chip, 0);
+ spin_unlock_irq(&chip->reg_lock);
+ dma->substream = NULL;
+ dma->opened = 0;
+ return 0;
+}
+
+/*
+ */
+static int snd_atiixp_playback_open(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ int err;
+
+ down(&chip->open_mutex);
+ err = snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_PLAYBACK], 0);
+ up(&chip->open_mutex);
+ if (err < 0)
+ return err;
+ return 0;
+}
+
+static int snd_atiixp_playback_close(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ int err;
+ down(&chip->open_mutex);
+ err = snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_PLAYBACK]);
+ up(&chip->open_mutex);
+ return err;
+}
+
+static int snd_atiixp_capture_open(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ return snd_atiixp_pcm_open(substream, &chip->dmas[ATI_DMA_CAPTURE], 1);
+}
+
+static int snd_atiixp_capture_close(snd_pcm_substream_t *substream)
+{
+ atiixp_t *chip = snd_pcm_substream_chip(substream);
+ return snd_atiixp_pcm_close(substream, &chip->dmas[ATI_DMA_CAPTURE]);
+}
+
+
+/* AC97 playback */
+static snd_pcm_ops_t snd_atiixp_playback_ops = {
+ .open = snd_atiixp_playback_open,
+ .close = snd_atiixp_playback_close,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = snd_atiixp_pcm_hw_params,
+ .hw_free = snd_atiixp_pcm_hw_free,
+ .prepare = snd_atiixp_playback_prepare,
+ .trigger = snd_atiixp_pcm_trigger,
+ .pointer = snd_atiixp_pcm_pointer,
+};
+
+/* AC97 capture */
+static snd_pcm_ops_t snd_atiixp_capture_ops = {
+ .open = snd_atiixp_capture_open,
+ .close = snd_atiixp_capture_close,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = snd_atiixp_pcm_hw_params,
+ .hw_free = snd_atiixp_pcm_hw_free,
+ .prepare = snd_atiixp_capture_prepare,
+ .trigger = snd_atiixp_pcm_trigger,
+ .pointer = snd_atiixp_pcm_pointer,
+};
+
+static atiixp_dma_ops_t snd_atiixp_playback_dma_ops = {
+ .type = ATI_DMA_PLAYBACK,
+ .llp_offset = ATI_REG_MODEM_OUT_DMA1_LINKPTR,
+ .dt_cur = ATI_REG_MODEM_OUT_DMA1_DT_CUR,
+ .enable_dma = atiixp_out_enable_dma,
+ .enable_transfer = atiixp_out_enable_transfer,
+ .flush_dma = atiixp_out_flush_dma,
+};
+
+static atiixp_dma_ops_t snd_atiixp_capture_dma_ops = {
+ .type = ATI_DMA_CAPTURE,
+ .llp_offset = ATI_REG_MODEM_IN_DMA_LINKPTR,
+ .dt_cur = ATI_REG_MODEM_IN_DMA_DT_CUR,
+ .enable_dma = atiixp_in_enable_dma,
+ .enable_transfer = atiixp_in_enable_transfer,
+ .flush_dma = atiixp_in_flush_dma,
+};
+
+static int __devinit snd_atiixp_pcm_new(atiixp_t *chip)
+{
+ snd_pcm_t *pcm;
+ int err;
+
+ /* initialize constants */
+ chip->dmas[ATI_DMA_PLAYBACK].ops = &snd_atiixp_playback_dma_ops;
+ chip->dmas[ATI_DMA_CAPTURE].ops = &snd_atiixp_capture_dma_ops;
+
+ /* PCM #0: analog I/O */
+ err = snd_pcm_new(chip->card, "ATI IXP MC97", ATI_PCMDEV_ANALOG, 1, 1, &pcm);
+ if (err < 0)
+ return err;
+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_atiixp_playback_ops);
+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_atiixp_capture_ops);
+ pcm->private_data = chip;
+ strcpy(pcm->name, "ATI IXP MC97");
+ chip->pcmdevs[ATI_PCMDEV_ANALOG] = pcm;
+
+ snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
+ snd_dma_pci_data(chip->pci), 64*1024, 128*1024);
+
+ return 0;
+}
+
+
+
+/*
+ * interrupt handler
+ */
+static irqreturn_t snd_atiixp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
+{
+ atiixp_t *chip = dev_id;
+ unsigned int status;
+
+ status = atiixp_read(chip, ISR);
+
+ if (! status)
+ return IRQ_NONE;
+
+ /* process audio DMA */
+ if (status & ATI_REG_ISR_MODEM_OUT1_XRUN)
+ snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
+ else if (status & ATI_REG_ISR_MODEM_OUT1_STATUS)
+ snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_PLAYBACK]);
+ if (status & ATI_REG_ISR_MODEM_IN_XRUN)
+ snd_atiixp_xrun_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
+ else if (status & ATI_REG_ISR_MODEM_IN_STATUS)
+ snd_atiixp_update_dma(chip, &chip->dmas[ATI_DMA_CAPTURE]);
+
+ /* for codec detection */
+ if (status & CODEC_CHECK_BITS) {
+ unsigned int detected;
+ detected = status & CODEC_CHECK_BITS;
+ spin_lock(&chip->reg_lock);
+ chip->codec_not_ready_bits |= detected;
+ atiixp_update(chip, IER, detected, 0); /* disable the detected irqs */
+ spin_unlock(&chip->reg_lock);
+ }
+
+ /* ack */
+ atiixp_write(chip, ISR, status);
+
+ return IRQ_HANDLED;
+}
+
+
+/*
+ * ac97 mixer section
+ */
+
+static int __devinit snd_atiixp_mixer_new(atiixp_t *chip, int clock)
+{
+ ac97_bus_t *pbus;
+ ac97_template_t ac97;
+ int i, err;
+ int codec_count;
+ static ac97_bus_ops_t ops = {
+ .write = snd_atiixp_ac97_write,
+ .read = snd_atiixp_ac97_read,
+ };
+ static unsigned int codec_skip[NUM_ATI_CODECS] = {
+ ATI_REG_ISR_CODEC0_NOT_READY,
+ ATI_REG_ISR_CODEC1_NOT_READY,
+ ATI_REG_ISR_CODEC2_NOT_READY,
+ };
+
+ if (snd_atiixp_codec_detect(chip) < 0)
+ return -ENXIO;
+
+ if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus)) < 0)
+ return err;
+ pbus->clock = clock;
+ pbus->shared_type = AC97_SHARED_TYPE_ATIIXP; /* shared with audio driver */
+ chip->ac97_bus = pbus;
+
+ codec_count = 0;
+ for (i = 0; i < NUM_ATI_CODECS; i++) {
+ if (chip->codec_not_ready_bits & codec_skip[i])
+ continue;
+ memset(&ac97, 0, sizeof(ac97));
+ ac97.private_data = chip;
+ ac97.pci = chip->pci;
+ ac97.num = i;
+ ac97.scaps = AC97_SCAP_SKIP_AUDIO;
+ if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i])) < 0) {
+ chip->ac97[i] = NULL; /* to be sure */
+ snd_printdd("atiixp: codec %d not available for modem\n", i);
+ continue;
+ }
+ codec_count++;
+ }
+
+ if (! codec_count) {
+ snd_printk(KERN_ERR "atiixp: no codec available\n");
+ return -ENODEV;
+ }
+
+ /* snd_ac97_tune_hardware(chip->ac97, ac97_quirks); */
+
+ return 0;
+}
+
+
+#ifdef CONFIG_PM
+/*
+ * power management
+ */
+static int snd_atiixp_suspend(snd_card_t *card, pm_message_t state)
+{
+ atiixp_t *chip = card->pm_private_data;
+ int i;
+
+ for (i = 0; i < NUM_ATI_PCMDEVS; i++)
+ if (chip->pcmdevs[i])
+ snd_pcm_suspend_all(chip->pcmdevs[i]);
+ for (i = 0; i < NUM_ATI_CODECS; i++)
+ if (chip->ac97[i])
+ snd_ac97_suspend(chip->ac97[i]);
+ snd_atiixp_aclink_down(chip);
+ snd_atiixp_chip_stop(chip);
+
+ pci_set_power_state(chip->pci, 3);
+ pci_disable_device(chip->pci);
+ return 0;
+}
+
+static int snd_atiixp_resume(snd_card_t *card)
+{
+ atiixp_t *chip = card->pm_private_data;
+ int i;
+
+ pci_enable_device(chip->pci);
+ pci_set_power_state(chip->pci, 0);
+ pci_set_master(chip->pci);
+
+ snd_atiixp_aclink_reset(chip);
+ snd_atiixp_chip_start(chip);
+
+ for (i = 0; i < NUM_ATI_CODECS; i++)
+ if (chip->ac97[i])
+ snd_ac97_resume(chip->ac97[i]);
+
+ return 0;
+}
+#endif /* CONFIG_PM */
+
+
+/*
+ * proc interface for register dump
+ */
+
+static void snd_atiixp_proc_read(snd_info_entry_t *entry, snd_info_buffer_t *buffer)
+{
+ atiixp_t *chip = entry->private_data;
+ int i;
+
+ for (i = 0; i < 256; i += 4)
+ snd_iprintf(buffer, "%02x: %08x\n", i, readl(chip->remap_addr + i));
+}
+
+static void __devinit snd_atiixp_proc_init(atiixp_t *chip)
+{
+ snd_info_entry_t *entry;
+
+ if (! snd_card_proc_new(chip->card, "atiixp", &entry))
+ snd_info_set_text_ops(entry, chip, 1024, snd_atiixp_proc_read);
+}
+
+
+
+/*
+ * destructor
+ */
+
+static int snd_atiixp_free(atiixp_t *chip)
+{
+ if (chip->irq < 0)
+ goto __hw_end;
+ snd_atiixp_chip_stop(chip);
+ synchronize_irq(chip->irq);
+ __hw_end:
+ if (chip->irq >= 0)
+ free_irq(chip->irq, (void *)chip);
+ if (chip->remap_addr)
+ iounmap(chip->remap_addr);
+ pci_release_regions(chip->pci);
+ pci_disable_device(chip->pci);
+ kfree(chip);
+ return 0;
+}
+
+static int snd_atiixp_dev_free(snd_device_t *device)
+{
+ atiixp_t *chip = device->device_data;
+ return snd_atiixp_free(chip);
+}
+
+/*
+ * constructor for chip instance
+ */
+static int __devinit snd_atiixp_create(snd_card_t *card,
+ struct pci_dev *pci,
+ atiixp_t **r_chip)
+{
+ static snd_device_ops_t ops = {
+ .dev_free = snd_atiixp_dev_free,
+ };
+ atiixp_t *chip;
+ int err;
+
+ if ((err = pci_enable_device(pci)) < 0)
+ return err;
+
+ chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
+ if (chip == NULL) {
+ pci_disable_device(pci);
+ return -ENOMEM;
+ }
+
+ spin_lock_init(&chip->reg_lock);
+ init_MUTEX(&chip->open_mutex);
+ chip->card = card;
+ chip->pci = pci;
+ chip->irq = -1;
+ if ((err = pci_request_regions(pci, "ATI IXP MC97")) < 0) {
+ kfree(chip);
+ pci_disable_device(pci);
+ return err;
+ }
+ chip->addr = pci_resource_start(pci, 0);
+ chip->remap_addr = ioremap_nocache(chip->addr, pci_resource_len(pci, 0));
+ if (chip->remap_addr == NULL) {
+ snd_printk(KERN_ERR "AC'97 space ioremap problem\n");
+ snd_atiixp_free(chip);
+ return -EIO;
+ }
+
+ if (request_irq(pci->irq, snd_atiixp_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) {
+ snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
+ snd_atiixp_free(chip);
+ return -EBUSY;
+ }
+ chip->irq = pci->irq;
+ pci_set_master(pci);
+ synchronize_irq(chip->irq);
+
+ if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
+ snd_atiixp_free(chip);
+ return err;
+ }
+
+ snd_card_set_dev(card, &pci->dev);
+
+ *r_chip = chip;
+ return 0;
+}
+
+
+static int __devinit snd_atiixp_probe(struct pci_dev *pci,
+ const struct pci_device_id *pci_id)
+{
+ static int dev;
+ snd_card_t *card;
+ atiixp_t *chip;
+ unsigned char revision;
+ int err;
+
+ if (dev >= SNDRV_CARDS)
+ return -ENODEV;
+ if (!enable[dev]) {
+ dev++;
+ return -ENOENT;
+ }
+
+ card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
+ if (card == NULL)
+ return -ENOMEM;
+
+ pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
+
+ strcpy(card->driver, "ATIIXP-MODEM");
+ strcpy(card->shortname, "ATI IXP Modem");
+ if ((err = snd_atiixp_create(card, pci, &chip)) < 0)
+ goto __error;
+
+ if ((err = snd_atiixp_aclink_reset(chip)) < 0)
+ goto __error;
+
+ if ((err = snd_atiixp_mixer_new(chip, ac97_clock[dev])) < 0)
+ goto __error;
+
+ if ((err = snd_atiixp_pcm_new(chip)) < 0)
+ goto __error;
+
+ snd_atiixp_proc_init(chip);
+
+ snd_atiixp_chip_start(chip);
+
+ sprintf(card->longname, "%s rev %x at 0x%lx, irq %i",
+ card->shortname, revision, chip->addr, chip->irq);
+
+ snd_card_set_pm_callback(card, snd_atiixp_suspend, snd_atiixp_resume, chip);
+
+ if ((err = snd_card_register(card)) < 0)
+ goto __error;
+
+ pci_set_drvdata(pci, card);
+ dev++;
+ return 0;
+
+ __error:
+ snd_card_free(card);
+ return err;
+}
+
+static void __devexit snd_atiixp_remove(struct pci_dev *pci)
+{
+ snd_card_free(pci_get_drvdata(pci));
+ pci_set_drvdata(pci, NULL);
+}
+
+static struct pci_driver driver = {
+ .name = "ATI IXP MC97 controller",
+ .id_table = snd_atiixp_ids,
+ .probe = snd_atiixp_probe,
+ .remove = __devexit_p(snd_atiixp_remove),
+ SND_PCI_PM_CALLBACKS
+};
+
+
+static int __init alsa_card_atiixp_init(void)
+{
+ return pci_module_init(&driver);
+}
+
+static void __exit alsa_card_atiixp_exit(void)
+{
+ pci_unregister_driver(&driver);
+}
+
+module_init(alsa_card_atiixp_init)
+module_exit(alsa_card_atiixp_exit)
diff --git a/sound/pci/au88x0/Makefile b/sound/pci/au88x0/Makefile
new file mode 100644
index 000000000000..d0a66bc5d4a7
--- /dev/null
+++ b/sound/pci/au88x0/Makefile
@@ -0,0 +1,7 @@
+snd-au8810-objs := au8810.o
+snd-au8820-objs := au8820.o
+snd-au8830-objs := au8830.o
+
+obj-$(CONFIG_SND_AU8810) += snd-au8810.o
+obj-$(CONFIG_SND_AU8820) += snd-au8820.o
+obj-$(CONFIG_SND_AU8830) += snd-au8830.o
diff --git a/sound/pci/au88x0/au8810.c b/sound/pci/au88x0/au8810.c
new file mode 100644
index 000000000000..fce22c7af0ea
--- /dev/null
+++ b/sound/pci/au88x0/au8810.c
@@ -0,0 +1,17 @@
+#include "au8810.h"
+#include "au88x0.h"
+static struct pci_device_id snd_vortex_ids[] = {
+ {PCI_VENDOR_ID_AUREAL, PCI_DEVICE_ID_AUREAL_ADVANTAGE,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1,},
+ {0,}
+};
+
+#include "au88x0_core.c"
+#include "au88x0_pcm.c"
+#include "au88x0_mixer.c"
+#include "au88x0_mpu401.c"
+#include "au88x0_game.c"
+#include "au88x0_eq.c"
+#include "au88x0_a3d.c"
+#include "au88x0_xtalk.c"
+#include "au88x0.c"
diff --git a/sound/pci/au88x0/au8810.h b/sound/pci/au88x0/au8810.h
new file mode 100644
index 000000000000..3837d2ba5e67
--- /dev/null
+++ b/sound/pci/au88x0/au8810.h
@@ -0,0 +1,229 @@
+/*
+ Aureal Advantage Soundcard driver.
+ */
+
+#define CHIP_AU8810
+
+#define CARD_NAME "Aureal Advantage 3D Sound Processor"
+#define CARD_NAME_SHORT "au8810"
+
+#define NR_ADB 0x10
+#define NR_WT 0x00
+#define NR_SRC 0x10
+#define NR_A3D 0x10
+#define NR_MIXIN 0x20
+#define NR_MIXOUT 0x10
+
+
+/* ADBDMA */
+#define VORTEX_ADBDMA_STAT 0x27e00 /* read only, subbuffer, DMA pos */
+#define POS_MASK 0x00000fff
+#define POS_SHIFT 0x0
+#define ADB_SUBBUF_MASK 0x00003000 /* ADB only. */
+#define ADB_SUBBUF_SHIFT 0xc /* ADB only. */
+#define VORTEX_ADBDMA_CTRL 0x27180 /* write only; format, flags, DMA pos */
+#define OFFSET_MASK 0x00000fff
+#define OFFSET_SHIFT 0x0
+#define IE_MASK 0x00001000 /* interrupt enable. */
+#define IE_SHIFT 0xc
+#define DIR_MASK 0x00002000 /* Direction */
+#define DIR_SHIFT 0xd
+#define FMT_MASK 0x0003c000
+#define FMT_SHIFT 0xe
+// The ADB masks and shift also are valid for the wtdma, except if specified otherwise.
+#define VORTEX_ADBDMA_BUFCFG0 0x27100
+#define VORTEX_ADBDMA_BUFCFG1 0x27104
+#define VORTEX_ADBDMA_BUFBASE 0x27000
+#define VORTEX_ADBDMA_START 0x27c00 /* Which subbuffer starts */
+
+#define VORTEX_ADBDMA_STATUS 0x27A90 /* stored at AdbDma->this_10 / 2 DWORD in size. */
+
+/* WTDMA */
+#define VORTEX_WTDMA_CTRL 0x27fd8 /* format, DMA pos */
+#define VORTEX_WTDMA_STAT 0x27fe8 /* DMA subbuf, DMA pos */
+#define WT_SUBBUF_MASK 0x3
+#define WT_SUBBUF_SHIFT 0xc
+#define VORTEX_WTDMA_BUFBASE 0x27fc0
+#define VORTEX_WTDMA_BUFCFG0 0x27fd0
+#define VORTEX_WTDMA_BUFCFG1 0x27fd4
+#define VORTEX_WTDMA_START 0x27fe4 /* which subbuffer is first */
+
+/* ADB */
+#define VORTEX_ADB_SR 0x28400 /* Samplerates enable/disable */
+#define VORTEX_ADB_RTBASE 0x28000
+#define VORTEX_ADB_RTBASE_COUNT 173
+#define VORTEX_ADB_CHNBASE 0x282b4
+#define VORTEX_ADB_CHNBASE_COUNT 24
+#define ROUTE_MASK 0xffff
+#define SOURCE_MASK 0xff00
+#define ADB_MASK 0xff
+#define ADB_SHIFT 0x8
+
+/* ADB address */
+#define OFFSET_ADBDMA 0x00
+#define OFFSET_SRCIN 0x40
+#define OFFSET_SRCOUT 0x20
+#define OFFSET_MIXIN 0x50
+#define OFFSET_MIXOUT 0x30
+#define OFFSET_CODECIN 0x70
+#define OFFSET_CODECOUT 0x88
+#define OFFSET_SPORTIN 0x78 /* ch 0x13 */
+#define OFFSET_SPORTOUT 0x90
+#define OFFSET_SPDIFOUT 0x92 /* ch 0x14 check this! */
+#define OFFSET_EQIN 0xa0
+#define OFFSET_EQOUT 0x7e /* 2 routes on ch 0x11 */
+#define OFFSET_XTALKOUT 0x66 /* crosstalk canceller (source) */
+#define OFFSET_XTALKIN 0x96 /* crosstalk canceller (sink) */
+#define OFFSET_A3DIN 0x70 /* ADB sink. */
+#define OFFSET_A3DOUT 0xA6 /* ADB source. 2 routes per slice = 8 */
+#define OFFSET_EFXIN 0x80 /* ADB sink. */
+#define OFFSET_EFXOUT 0x68 /* ADB source. */
+
+/* ADB route translate helper */
+#define ADB_DMA(x) (x)
+#define ADB_SRCOUT(x) (x + OFFSET_SRCOUT)
+#define ADB_SRCIN(x) (x + OFFSET_SRCIN)
+#define ADB_MIXOUT(x) (x + OFFSET_MIXOUT)
+#define ADB_MIXIN(x) (x + OFFSET_MIXIN)
+#define ADB_CODECIN(x) (x + OFFSET_CODECIN)
+#define ADB_CODECOUT(x) (x + OFFSET_CODECOUT)
+#define ADB_SPORTIN(x) (x + OFFSET_SPORTIN)
+#define ADB_SPORTOUT(x) (x + OFFSET_SPORTOUT)
+#define ADB_SPDIFOUT(x) (x + OFFSET_SPDIFOUT)
+#define ADB_EQIN(x) (x + OFFSET_EQIN)
+#define ADB_EQOUT(x) (x + OFFSET_EQOUT)
+#define ADB_A3DOUT(x) (x + OFFSET_A3DOUT) /* 0x10 A3D blocks */
+#define ADB_A3DIN(x) (x + OFFSET_A3DIN)
+#define ADB_XTALKIN(x) (x + OFFSET_XTALKIN)
+#define ADB_XTALKOUT(x) (x + OFFSET_XTALKOUT)
+
+#define MIX_OUTL 0xe
+#define MIX_OUTR 0xf
+#define MIX_INL 0x1e
+#define MIX_INR 0x1f
+#define MIX_DEFIGAIN 0x08 /* 0x8 => 6dB */
+#define MIX_DEFOGAIN 0x08
+
+/* MIXER */
+#define VORTEX_MIXER_SR 0x21f00
+#define VORTEX_MIXER_CLIP 0x21f80
+#define VORTEX_MIXER_CHNBASE 0x21e40
+#define VORTEX_MIXER_RTBASE 0x21e00
+#define MIXER_RTBASE_SIZE 0x38
+#define VORTEX_MIX_ENIN 0x21a00 /* Input enable bits. 4 bits wide. */
+#define VORTEX_MIX_SMP 0x21c00 /* AU8820: 0x9c00 */
+
+/* MIX */
+#define VORTEX_MIX_INVOL_A 0x21000 /* in? */
+#define VORTEX_MIX_INVOL_B 0x20000 /* out? */
+#define VORTEX_MIX_VOL_A 0x21800
+#define VORTEX_MIX_VOL_B 0x20800
+
+#define VOL_MIN 0x80 /* Input volume when muted. */
+#define VOL_MAX 0x7f /* FIXME: Not confirmed! Just guessed. */
+
+/* SRC */
+#define VORTEX_SRC_CHNBASE 0x26c40
+#define VORTEX_SRC_RTBASE 0x26c00
+#define VORTEX_SRCBLOCK_SR 0x26cc0
+#define VORTEX_SRC_SOURCE 0x26cc4
+#define VORTEX_SRC_SOURCESIZE 0x26cc8
+/* Params
+ 0x26e00 : 1 U0
+ 0x26e40 : 2 CR
+ 0x26e80 : 3 U3
+ 0x26ec0 : 4 DRIFT1
+ 0x26f00 : 5 U1
+ 0x26f40 : 6 DRIFT2
+ 0x26f80 : 7 U2 : Target rate, direction
+*/
+
+#define VORTEX_SRC_CONVRATIO 0x26e40
+#define VORTEX_SRC_DRIFT0 0x26e80
+#define VORTEX_SRC_DRIFT1 0x26ec0
+#define VORTEX_SRC_DRIFT2 0x26f40
+#define VORTEX_SRC_U0 0x26e00
+#define U0_SLOWLOCK 0x200
+#define VORTEX_SRC_U1 0x26f00
+#define VORTEX_SRC_U2 0x26f80
+#define VORTEX_SRC_DATA 0x26800 /* 0xc800 */
+#define VORTEX_SRC_DATA0 0x26000
+
+/* FIFO */
+#define VORTEX_FIFO_ADBCTRL 0x16100 /* Control bits. */
+#define VORTEX_FIFO_WTCTRL 0x16000
+#define FIFO_RDONLY 0x00000001
+#define FIFO_CTRL 0x00000002 /* Allow ctrl. ? */
+#define FIFO_VALID 0x00000010
+#define FIFO_EMPTY 0x00000020
+#define FIFO_U0 0x00001000 /* Unknown. */
+#define FIFO_U1 0x00010000
+#define FIFO_SIZE_BITS 5
+#define FIFO_SIZE (1<<FIFO_SIZE_BITS) // 0x20
+#define FIFO_MASK (FIFO_SIZE-1) //0x1f /* at shift left 0xc */
+//#define FIFO_MASK 0x1f /* at shift left 0xb */
+//#define FIFO_SIZE 0x20
+#define FIFO_BITS 0x03880000
+#define VORTEX_FIFO_ADBDATA 0x14000
+#define VORTEX_FIFO_WTDATA 0x10000
+
+/* CODEC */
+#define VORTEX_CODEC_CTRL 0x29184
+#define VORTEX_CODEC_EN 0x29190
+#define EN_CODEC0 0x00000300
+#define EN_AC98 0x00000c00 /* Modem AC98 slots. */
+#define EN_CODEC1 0x00003000
+#define EN_CODEC (EN_CODEC0 | EN_CODEC1)
+#define EN_SPORT 0x00030000
+#define EN_SPDIF 0x000c0000
+
+#define VORTEX_CODEC_CHN 0x29080
+#define VORTEX_CODEC_WRITE 0x00800000
+#define VORTEX_CODEC_ADDSHIFT 16
+#define VORTEX_CODEC_ADDMASK 0x7f0000 /* 0x000f0000 */
+#define VORTEX_CODEC_DATSHIFT 0
+#define VORTEX_CODEC_DATMASK 0xffff
+#define VORTEX_CODEC_IO 0x29188
+
+/* SPDIF */
+#define VORTEX_SPDIF_FLAGS 0x2205c
+#define VORTEX_SPDIF_CFG0 0x291D0
+#define VORTEX_SPDIF_CFG1 0x291D4
+#define VORTEX_SPDIF_SMPRATE 0x29194
+
+/* Sample timer */
+#define VORTEX_SMP_TIME 0x29198
+
+#define VORTEX_MODEM_CTRL 0x291ac
+
+/* IRQ */
+#define VORTEX_IRQ_SOURCE 0x2a000 /* Interrupt source flags. */
+#define VORTEX_IRQ_CTRL 0x2a004 /* Interrupt source mask. */
+
+#define VORTEX_STAT 0x2a008 /* Status */
+
+#define VORTEX_CTRL 0x2a00c
+#define CTRL_MIDI_EN 0x00000001
+#define CTRL_MIDI_PORT 0x00000060
+#define CTRL_GAME_EN 0x00000008
+#define CTRL_GAME_PORT 0x00000e00
+//#define CTRL_IRQ_ENABLE 0x01004000
+#define CTRL_IRQ_ENABLE 0x00004000
+
+/* write: Timer period config / read: TIMER IRQ ack. */
+#define VORTEX_IRQ_STAT 0x2919c
+
+/* DMA */
+#define VORTEX_ENGINE_CTRL 0x27ae8
+#define ENGINE_INIT 0x1380000
+
+/* MIDI *//* GAME. */
+#define VORTEX_MIDI_DATA 0x28800
+#define VORTEX_MIDI_CMD 0x28804 /* Write command / Read status */
+
+#define VORTEX_CTRL2 0x2880c
+#define CTRL2_GAME_ADCMODE 0x40
+#define VORTEX_GAME_LEGACY 0x28808
+#define VORTEX_GAME_AXIS 0x28810
+#define AXIS_SIZE 4
+#define AXIS_RANGE 0x1fff
diff --git a/sound/pci/au88x0/au8820.c b/sound/pci/au88x0/au8820.c
new file mode 100644
index 000000000000..d1fbcce07257
--- /dev/null
+++ b/sound/pci/au88x0/au8820.c
@@ -0,0 +1,15 @@
+#include "au8820.h"
+#include "au88x0.h"
+static struct pci_device_id snd_vortex_ids[] = {
+ {PCI_VENDOR_ID_AUREAL, PCI_DEVICE_ID_AUREAL_VORTEX_1,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
+ {0,}
+};
+
+#include "au88x0_synth.c"
+#include "au88x0_core.c"
+#include "au88x0_pcm.c"
+#include "au88x0_mpu401.c"
+#include "au88x0_game.c"
+#include "au88x0_mixer.c"
+#include "au88x0.c"
diff --git a/sound/pci/au88x0/au8820.h b/sound/pci/au88x0/au8820.h
new file mode 100644
index 000000000000..be8022e78714
--- /dev/null
+++ b/sound/pci/au88x0/au8820.h
@@ -0,0 +1,209 @@
+/*
+ Aureal Vortex Soundcard driver.
+
+ IO addr collected from asp4core.vxd:
+ function address
+ 0005D5A0 13004
+ 00080674 14004
+ 00080AFF 12818
+
+ */
+
+#define CHIP_AU8820
+
+#define CARD_NAME "Aureal Vortex 3D Sound Processor"
+#define CARD_NAME_SHORT "au8820"
+
+/* Number of ADB and WT channels */
+#define NR_ADB 0x10
+#define NR_WT 0x20
+#define NR_SRC 0x10
+#define NR_A3D 0x00
+#define NR_MIXIN 0x10
+#define NR_MIXOUT 0x10
+
+
+/* ADBDMA */
+#define VORTEX_ADBDMA_STAT 0x105c0 /* read only, subbuffer, DMA pos */
+#define POS_MASK 0x00000fff
+#define POS_SHIFT 0x0
+#define ADB_SUBBUF_MASK 0x00003000 /* ADB only. */
+#define ADB_SUBBUF_SHIFT 0xc /* ADB only. */
+#define VORTEX_ADBDMA_CTRL 0x10580 /* write only, format, flags, DMA pos */
+#define OFFSET_MASK 0x00000fff
+#define OFFSET_SHIFT 0x0
+#define IE_MASK 0x00001000 /* interrupt enable. */
+#define IE_SHIFT 0xc
+#define DIR_MASK 0x00002000 /* Direction. */
+#define DIR_SHIFT 0xd
+#define FMT_MASK 0x0003c000
+#define FMT_SHIFT 0xe
+// The masks and shift also work for the wtdma, if not specified otherwise.
+#define VORTEX_ADBDMA_BUFCFG0 0x10400
+#define VORTEX_ADBDMA_BUFCFG1 0x10404
+#define VORTEX_ADBDMA_BUFBASE 0x10200
+#define VORTEX_ADBDMA_START 0x106c0 /* Which subbuffer starts */
+#define VORTEX_ADBDMA_STATUS 0x10600 /* stored at AdbDma->this_10 / 2 DWORD in size. */
+
+/* ADB */
+#define VORTEX_ADB_SR 0x10a00 /* Samplerates enable/disable */
+#define VORTEX_ADB_RTBASE 0x10800
+#define VORTEX_ADB_RTBASE_COUNT 103
+#define VORTEX_ADB_CHNBASE 0x1099c
+#define VORTEX_ADB_CHNBASE_COUNT 22
+#define ROUTE_MASK 0x3fff
+#define ADB_MASK 0x7f
+#define ADB_SHIFT 0x7
+//#define ADB_MIX_MASK 0xf
+/* ADB address */
+#define OFFSET_ADBDMA 0x00
+#define OFFSET_SRCOUT 0x10 /* on channel 0x11 */
+#define OFFSET_SRCIN 0x10 /* on channel < 0x11 */
+#define OFFSET_MIXOUT 0x20 /* source */
+#define OFFSET_MIXIN 0x30 /* sink */
+#define OFFSET_CODECIN 0x48 /* ADB source */
+#define OFFSET_CODECOUT 0x58 /* ADB sink/target */
+#define OFFSET_SPORTOUT 0x60 /* sink */
+#define OFFSET_SPORTIN 0x50 /* source */
+#define OFFSET_EFXOUT 0x50 /* sink */
+#define OFFSET_EFXIN 0x40 /* source */
+#define OFFSET_A3DOUT 0x00 /* This card has no HRTF :( */
+#define OFFSET_A3DIN 0x00
+#define OFFSET_WTOUT 0x58 /* */
+
+/* ADB route translate helper */
+#define ADB_DMA(x) (x + OFFSET_ADBDMA)
+#define ADB_SRCOUT(x) (x + OFFSET_SRCOUT)
+#define ADB_SRCIN(x) (x + OFFSET_SRCIN)
+#define ADB_MIXOUT(x) (x + OFFSET_MIXOUT)
+#define ADB_MIXIN(x) (x + OFFSET_MIXIN)
+#define ADB_CODECIN(x) (x + OFFSET_CODECIN)
+#define ADB_CODECOUT(x) (x + OFFSET_CODECOUT)
+#define ADB_SPORTOUT(x) (x + OFFSET_SPORTOUT)
+#define ADB_SPORTIN(x) (x + OFFSET_SPORTIN) /* */
+#define ADB_A3DOUT(x) (x + OFFSET_A3DOUT) /* 8 A3D blocks */
+#define ADB_A3DIN(x) (x + OFFSET_A3DIN)
+#define ADB_WTOUT(x,y) (y + OFFSET_WTOUT)
+
+/* WTDMA */
+#define VORTEX_WTDMA_CTRL 0x10500 /* format, DMA pos */
+#define VORTEX_WTDMA_STAT 0x10500 /* DMA subbuf, DMA pos */
+#define WT_SUBBUF_MASK (0x3 << WT_SUBBUF_SHIFT)
+#define WT_SUBBUF_SHIFT 0x15
+#define VORTEX_WTDMA_BUFBASE 0x10000
+#define VORTEX_WTDMA_BUFCFG0 0x10300
+#define VORTEX_WTDMA_BUFCFG1 0x10304
+#define VORTEX_WTDMA_START 0x10640 /* which subbuffer is first */
+
+#define VORTEX_WT_BASE 0x9000
+
+/* MIXER */
+#define VORTEX_MIXER_SR 0x9f00
+#define VORTEX_MIXER_CLIP 0x9f80
+#define VORTEX_MIXER_CHNBASE 0x9e40
+#define VORTEX_MIXER_RTBASE 0x9e00
+#define MIXER_RTBASE_SIZE 0x26
+#define VORTEX_MIX_ENIN 0x9a00 /* Input enable bits. 4 bits wide. */
+#define VORTEX_MIX_SMP 0x9c00
+
+/* MIX */
+#define VORTEX_MIX_INVOL_A 0x9000 /* in? */
+#define VORTEX_MIX_INVOL_B 0x8000 /* out? */
+#define VORTEX_MIX_VOL_A 0x9800
+#define VORTEX_MIX_VOL_B 0x8800
+
+#define VOL_MIN 0x80 /* Input volume when muted. */
+#define VOL_MAX 0x7f /* FIXME: Not confirmed! Just guessed. */
+
+//#define MIX_OUTL 0xe
+//#define MIX_OUTR 0xf
+//#define MIX_INL 0xe
+//#define MIX_INR 0xf
+#define MIX_DEFIGAIN 0x08 /* 0x8 => 6dB */
+#define MIX_DEFOGAIN 0x08
+
+/* SRC */
+#define VORTEX_SRCBLOCK_SR 0xccc0
+#define VORTEX_SRC_CHNBASE 0xcc40
+#define VORTEX_SRC_RTBASE 0xcc00
+#define VORTEX_SRC_SOURCE 0xccc4
+#define VORTEX_SRC_SOURCESIZE 0xccc8
+#define VORTEX_SRC_U0 0xce00
+#define VORTEX_SRC_DRIFT0 0xce80
+#define VORTEX_SRC_DRIFT1 0xcec0
+#define VORTEX_SRC_U1 0xcf00
+#define VORTEX_SRC_DRIFT2 0xcf40
+#define VORTEX_SRC_U2 0xcf80
+#define VORTEX_SRC_DATA 0xc800
+#define VORTEX_SRC_DATA0 0xc000
+#define VORTEX_SRC_CONVRATIO 0xce40
+//#define SRC_RATIO(x) ((((x<<15)/48000) + 1)/2) /* Playback */
+//#define SRC_RATIO2(x) ((((48000<<15)/x) + 1)/2) /* Recording */
+
+/* FIFO */
+#define VORTEX_FIFO_ADBCTRL 0xf800 /* Control bits. */
+#define VORTEX_FIFO_WTCTRL 0xf840
+#define FIFO_RDONLY 0x00000001
+#define FIFO_CTRL 0x00000002 /* Allow ctrl. ? */
+#define FIFO_VALID 0x00000010
+#define FIFO_EMPTY 0x00000020
+#define FIFO_U0 0x00001000 /* Unknown. */
+#define FIFO_U1 0x00010000
+#define FIFO_SIZE_BITS 5
+#define FIFO_SIZE (1<<FIFO_SIZE_BITS) // 0x20
+#define FIFO_MASK (FIFO_SIZE-1) //0x1f /* at shift left 0xc */
+#define VORTEX_FIFO_ADBDATA 0xe000
+#define VORTEX_FIFO_WTDATA 0xe800
+
+/* CODEC */
+#define VORTEX_CODEC_CTRL 0x11984
+#define VORTEX_CODEC_EN 0x11990
+#define EN_CODEC 0x00000300
+#define EN_SPORT 0x00030000
+#define EN_SPDIF 0x000c0000
+#define VORTEX_CODEC_CHN 0x11880
+#define VORTEX_CODEC_WRITE 0x00800000
+#define VORTEX_CODEC_ADDSHIFT 16
+#define VORTEX_CODEC_ADDMASK 0x7f0000 /* 0x000f0000 */
+#define VORTEX_CODEC_DATSHIFT 0
+#define VORTEX_CODEC_DATMASK 0xffff
+#define VORTEX_CODEC_IO 0x11988
+
+#define VORTEX_SPDIF_FLAGS 0x1005c /* FIXME */
+#define VORTEX_SPDIF_CFG0 0x119D0
+#define VORTEX_SPDIF_CFG1 0x119D4
+#define VORTEX_SPDIF_SMPRATE 0x11994
+
+/* Sample timer */
+#define VORTEX_SMP_TIME 0x11998
+
+/* IRQ */
+#define VORTEX_IRQ_SOURCE 0x12800 /* Interrupt source flags. */
+#define VORTEX_IRQ_CTRL 0x12804 /* Interrupt source mask. */
+
+#define VORTEX_STAT 0x12808 /* ?? */
+
+#define VORTEX_CTRL 0x1280c
+#define CTRL_MIDI_EN 0x00000001
+#define CTRL_MIDI_PORT 0x00000060
+#define CTRL_GAME_EN 0x00000008
+#define CTRL_GAME_PORT 0x00000e00
+#define CTRL_IRQ_ENABLE 0x4000
+
+/* write: Timer period config / read: TIMER IRQ ack. */
+#define VORTEX_IRQ_STAT 0x1199c
+
+/* DMA */
+#define VORTEX_DMA_BUFFER 0x10200
+#define VORTEX_ENGINE_CTRL 0x1060c
+#define ENGINE_INIT 0x0L
+
+ /* MIDI *//* GAME. */
+#define VORTEX_MIDI_DATA 0x11000
+#define VORTEX_MIDI_CMD 0x11004 /* Write command / Read status */
+#define VORTEX_GAME_LEGACY 0x11008
+#define VORTEX_CTRL2 0x1100c
+#define CTRL2_GAME_ADCMODE 0x40
+#define VORTEX_GAME_AXIS 0x11010
+#define AXIS_SIZE 4
+#define AXIS_RANGE 0x1fff
diff --git a/sound/pci/au88x0/au8830.c b/sound/pci/au88x0/au8830.c
new file mode 100644
index 000000000000..d4f2717c14fb
--- /dev/null
+++ b/sound/pci/au88x0/au8830.c
@@ -0,0 +1,18 @@
+#include "au8830.h"
+#include "au88x0.h"
+static struct pci_device_id snd_vortex_ids[] = {
+ {PCI_VENDOR_ID_AUREAL, PCI_DEVICE_ID_AUREAL_VORTEX_2,
+ PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
+ {0,}
+};
+
+#include "au88x0_synth.c"
+#include "au88x0_core.c"
+#include "au88x0_pcm.c"
+#include "au88x0_mixer.c"
+#include "au88x0_mpu401.c"
+#include "au88x0_game.c"
+#include "au88x0_eq.c"
+#include "au88x0_a3d.c"
+#include "au88x0_xtalk.c"
+#include "au88x0.c"
diff --git a/sound/pci/au88x0/au8830.h b/sound/pci/au88x0/au8830.h
new file mode 100644
index 000000000000..aa77826b5e59
--- /dev/null
+++ b/sound/pci/au88x0/au8830.h
@@ -0,0 +1,256 @@
+/*
+ Aureal Vortex Soundcard driver.
+
+ IO addr collected from asp4core.vxd:
+ function address
+ 0005D5A0 13004
+ 00080674 14004
+ 00080AFF 12818
+
+ */
+
+#define CHIP_AU8830
+
+#define CARD_NAME "Aureal Vortex 2 3D Sound Processor"
+#define CARD_NAME_SHORT "au8830"
+
+#define NR_ADB 0x20
+#define NR_SRC 0x10
+#define NR_A3D 0x10
+#define NR_MIXIN 0x20
+#define NR_MIXOUT 0x10
+#define NR_WT 0x40
+
+/* ADBDMA */
+#define VORTEX_ADBDMA_STAT 0x27e00 /* read only, subbuffer, DMA pos */
+#define POS_MASK 0x00000fff
+#define POS_SHIFT 0x0
+#define ADB_SUBBUF_MASK 0x00003000 /* ADB only. */
+#define ADB_SUBBUF_SHIFT 0xc /* ADB only. */
+#define VORTEX_ADBDMA_CTRL 0x27a00 /* write only; format, flags, DMA pos */
+#define OFFSET_MASK 0x00000fff
+#define OFFSET_SHIFT 0x0
+#define IE_MASK 0x00001000 /* interrupt enable. */
+#define IE_SHIFT 0xc
+#define DIR_MASK 0x00002000 /* Direction. */
+#define DIR_SHIFT 0xd
+#define FMT_MASK 0x0003c000
+#define FMT_SHIFT 0xe
+#define ADB_FIFO_EN_SHIFT 0x15
+#define ADB_FIFO_EN (1 << 0x15)
+// The ADB masks and shift also are valid for the wtdma, except if specified otherwise.
+#define VORTEX_ADBDMA_BUFCFG0 0x27800
+#define VORTEX_ADBDMA_BUFCFG1 0x27804
+#define VORTEX_ADBDMA_BUFBASE 0x27400
+#define VORTEX_ADBDMA_START 0x27c00 /* Which subbuffer starts */
+
+#define VORTEX_ADBDMA_STATUS 0x27A90 /* stored at AdbDma->this_10 / 2 DWORD in size. */
+/* Starting at the MSB, each pair of bits seem to be the current DMA page. */
+/* This current page bits are consistent (same value) with VORTEX_ADBDMA_STAT) */
+
+/* DMA */
+#define VORTEX_ENGINE_CTRL 0x27ae8
+#define ENGINE_INIT 0x1380000
+
+/* WTDMA */
+#define VORTEX_WTDMA_CTRL 0x27900 /* format, DMA pos */
+#define VORTEX_WTDMA_STAT 0x27d00 /* DMA subbuf, DMA pos */
+#define WT_SUBBUF_MASK 0x3
+#define WT_SUBBUF_SHIFT 0xc
+#define VORTEX_WTDMA_BUFBASE 0x27000
+#define VORTEX_WTDMA_BUFCFG0 0x27600
+#define VORTEX_WTDMA_BUFCFG1 0x27604
+#define VORTEX_WTDMA_START 0x27b00 /* which subbuffer is first */
+
+/* ADB */
+#define VORTEX_ADB_SR 0x28400 /* Samplerates enable/disable */
+#define VORTEX_ADB_RTBASE 0x28000
+#define VORTEX_ADB_RTBASE_COUNT 173
+#define VORTEX_ADB_CHNBASE 0x282b4
+#define VORTEX_ADB_CHNBASE_COUNT 24
+#define ROUTE_MASK 0xffff
+#define SOURCE_MASK 0xff00
+#define ADB_MASK 0xff
+#define ADB_SHIFT 0x8
+/* ADB address */
+#define OFFSET_ADBDMA 0x00
+#define OFFSET_ADBDMAB 0x20
+#define OFFSET_SRCIN 0x40
+#define OFFSET_SRCOUT 0x20 /* ch 0x11 */
+#define OFFSET_MIXIN 0x50 /* ch 0x11 */
+#define OFFSET_MIXOUT 0x30 /* ch 0x11 */
+#define OFFSET_CODECIN 0x70 /* ch 0x11 */ /* adb source */
+#define OFFSET_CODECOUT 0x88 /* ch 0x11 */ /* adb target */
+#define OFFSET_SPORTIN 0x78 /* ch 0x13 ADB source. 2 routes. */
+#define OFFSET_SPORTOUT 0x90 /* ch 0x13 ADB sink. 2 routes. */
+#define OFFSET_SPDIFIN 0x7A /* ch 0x14 ADB source. */
+#define OFFSET_SPDIFOUT 0x92 /* ch 0x14 ADB sink. */
+#define OFFSET_AC98IN 0x7c /* ch 0x14 ADB source. */
+#define OFFSET_AC98OUT 0x94 /* ch 0x14 ADB sink. */
+#define OFFSET_EQIN 0xa0 /* ch 0x11 */
+#define OFFSET_EQOUT 0x7e /* ch 0x11 */ /* 2 routes on ch 0x11 */
+#define OFFSET_A3DIN 0x70 /* ADB sink. */
+#define OFFSET_A3DOUT 0xA6 /* ADB source. 2 routes per slice = 8 */
+#define OFFSET_WT0 0x40 /* WT bank 0 output. 0x40 - 0x65 */
+#define OFFSET_WT1 0x80 /* WT bank 1 output. 0x80 - 0xA5 */
+/* WT sources offset : 0x00-0x1f Direct stream. */
+/* WT sources offset : 0x20-0x25 Mixed Output. */
+#define OFFSET_XTALKOUT 0x66 /* crosstalk canceller (source) 2 routes */
+#define OFFSET_XTALKIN 0x96 /* crosstalk canceller (sink). 10 routes */
+#define OFFSET_EFXOUT 0x68 /* ADB source. 8 routes. */
+#define OFFSET_EFXIN 0x80 /* ADB sink. 8 routes. */
+
+/* ADB route translate helper */
+#define ADB_DMA(x) (x)
+#define ADB_SRCOUT(x) (x + OFFSET_SRCOUT)
+#define ADB_SRCIN(x) (x + OFFSET_SRCIN)
+#define ADB_MIXOUT(x) (x + OFFSET_MIXOUT)
+#define ADB_MIXIN(x) (x + OFFSET_MIXIN)
+#define ADB_CODECIN(x) (x + OFFSET_CODECIN)
+#define ADB_CODECOUT(x) (x + OFFSET_CODECOUT)
+#define ADB_SPORTIN(x) (x + OFFSET_SPORTIN)
+#define ADB_SPORTOUT(x) (x + OFFSET_SPORTOUT)
+#define ADB_SPDIFIN(x) (x + OFFSET_SPDIFIN)
+#define ADB_SPDIFOUT(x) (x + OFFSET_SPDIFOUT)
+#define ADB_EQIN(x) (x + OFFSET_EQIN)
+#define ADB_EQOUT(x) (x + OFFSET_EQOUT)
+#define ADB_A3DOUT(x) (x + OFFSET_A3DOUT) /* 0x10 A3D blocks */
+#define ADB_A3DIN(x) (x + OFFSET_A3DIN)
+//#define ADB_WTOUT(x) ((x<x20)?(x + OFFSET_WT0):(x + OFFSET_WT1))
+#define ADB_WTOUT(x,y) (((x)==0)?((y) + OFFSET_WT0):((y) + OFFSET_WT1))
+#define ADB_XTALKIN(x) ((x) + OFFSET_XTALKIN)
+#define ADB_XTALKOUT(x) ((x) + OFFSET_XTALKOUT)
+
+#define MIX_DEFIGAIN 0x08
+#define MIX_DEFOGAIN 0x08 /* 0x8->6dB (6dB = x4) 16 to 18 bit conversion? */
+
+/* MIXER */
+#define VORTEX_MIXER_SR 0x21f00
+#define VORTEX_MIXER_CLIP 0x21f80
+#define VORTEX_MIXER_CHNBASE 0x21e40
+#define VORTEX_MIXER_RTBASE 0x21e00
+#define MIXER_RTBASE_SIZE 0x38
+#define VORTEX_MIX_ENIN 0x21a00 /* Input enable bits. 4 bits wide. */
+#define VORTEX_MIX_SMP 0x21c00 /* wave data buffers. AU8820: 0x9c00 */
+
+/* MIX */
+#define VORTEX_MIX_INVOL_B 0x20000 /* Input volume current */
+#define VORTEX_MIX_VOL_B 0x20800 /* Output Volume current */
+#define VORTEX_MIX_INVOL_A 0x21000 /* Input Volume target */
+#define VORTEX_MIX_VOL_A 0x21800 /* Output Volume target */
+
+#define VOL_MIN 0x80 /* Input volume when muted. */
+#define VOL_MAX 0x7f /* FIXME: Not confirmed! Just guessed. */
+
+/* SRC */
+#define VORTEX_SRC_CHNBASE 0x26c40
+#define VORTEX_SRC_RTBASE 0x26c00
+#define VORTEX_SRCBLOCK_SR 0x26cc0
+#define VORTEX_SRC_SOURCE 0x26cc4
+#define VORTEX_SRC_SOURCESIZE 0x26cc8
+/* Params
+ 0x26e00 : 1 U0
+ 0x26e40 : 2 CR
+ 0x26e80 : 3 U3
+ 0x26ec0 : 4 DRIFT1
+ 0x26f00 : 5 U1
+ 0x26f40 : 6 DRIFT2
+ 0x26f80 : 7 U2 : Target rate, direction
+*/
+
+#define VORTEX_SRC_CONVRATIO 0x26e40
+#define VORTEX_SRC_DRIFT0 0x26e80
+#define VORTEX_SRC_DRIFT1 0x26ec0
+#define VORTEX_SRC_DRIFT2 0x26f40
+#define VORTEX_SRC_U0 0x26e00
+#define U0_SLOWLOCK 0x200
+#define VORTEX_SRC_U1 0x26f00
+#define VORTEX_SRC_U2 0x26f80
+#define VORTEX_SRC_DATA 0x26800 /* 0xc800 */
+#define VORTEX_SRC_DATA0 0x26000
+
+/* FIFO */
+#define VORTEX_FIFO_ADBCTRL 0x16100 /* Control bits. */
+#define VORTEX_FIFO_WTCTRL 0x16000
+#define FIFO_RDONLY 0x00000001
+#define FIFO_CTRL 0x00000002 /* Allow ctrl. ? */
+#define FIFO_VALID 0x00000010
+#define FIFO_EMPTY 0x00000020
+#define FIFO_U0 0x00002000 /* Unknown. */
+#define FIFO_U1 0x00040000
+#define FIFO_SIZE_BITS 6
+#define FIFO_SIZE (1<<(FIFO_SIZE_BITS)) // 0x40
+#define FIFO_MASK (FIFO_SIZE-1) //0x3f /* at shift left 0xc */
+#define FIFO_BITS 0x1c400000
+#define VORTEX_FIFO_ADBDATA 0x14000
+#define VORTEX_FIFO_WTDATA 0x10000
+
+#define VORTEX_FIFO_GIRT 0x17000 /* wt0, wt1, adb */
+#define GIRT_COUNT 3
+
+/* CODEC */
+
+#define VORTEX_CODEC_CHN 0x29080 /* The name "CHN" is wrong. */
+
+#define VORTEX_CODEC_CTRL 0x29184
+#define VORTEX_CODEC_IO 0x29188
+#define VORTEX_CODEC_WRITE 0x00800000
+#define VORTEX_CODEC_ADDSHIFT 16
+#define VORTEX_CODEC_ADDMASK 0x7f0000 /* 0x000f0000 */
+#define VORTEX_CODEC_DATSHIFT 0
+#define VORTEX_CODEC_DATMASK 0xffff
+
+#define VORTEX_CODEC_SPORTCTRL 0x2918c
+
+#define VORTEX_CODEC_EN 0x29190
+#define EN_AUDIO0 0x00000300
+#define EN_MODEM 0x00000c00
+#define EN_AUDIO1 0x00003000
+#define EN_SPORT 0x00030000
+#define EN_SPDIF 0x000c0000
+#define EN_CODEC (EN_AUDIO1 | EN_AUDIO0)
+
+#define VORTEX_SPDIF_SMPRATE 0x29194
+
+#define VORTEX_SPDIF_FLAGS 0x2205c
+#define VORTEX_SPDIF_CFG0 0x291D0 /* status data */
+#define VORTEX_SPDIF_CFG1 0x291D4
+
+#define VORTEX_SMP_TIME 0x29198 /* Sample counter/timer */
+#define VORTEX_SMP_TIMER 0x2919c
+#define VORTEX_CODEC2_CTRL 0x291a0
+
+#define VORTEX_MODEM_CTRL 0x291ac
+
+/* IRQ */
+#define VORTEX_IRQ_SOURCE 0x2a000 /* Interrupt source flags. */
+#define VORTEX_IRQ_CTRL 0x2a004 /* Interrupt source mask. */
+
+//#define VORTEX_IRQ_U0 0x2a008 /* ?? */
+#define VORTEX_STAT 0x2a008 /* Some sort of status */
+#define STAT_IRQ 0x00000001 /* This bitis set if the IRQ is valid. */
+
+#define VORTEX_CTRL 0x2a00c
+#define CTRL_MIDI_EN 0x00000001
+#define CTRL_MIDI_PORT 0x00000060
+#define CTRL_GAME_EN 0x00000008
+#define CTRL_GAME_PORT 0x00000e00
+#define CTRL_IRQ_ENABLE 0x00004000
+#define CTRL_SPDIF 0x00000000 /* unknown. Please find this value */
+#define CTRL_SPORT 0x00200000
+#define CTRL_RST 0x00800000
+#define CTRL_UNKNOWN 0x01000000
+
+/* write: Timer period config / read: TIMER IRQ ack. */
+#define VORTEX_IRQ_STAT 0x2919c
+
+ /* MIDI *//* GAME. */
+#define VORTEX_MIDI_DATA 0x28800
+#define VORTEX_MIDI_CMD 0x28804 /* Write command / Read status */
+
+#define VORTEX_GAME_LEGACY 0x28808
+#define VORTEX_CTRL2 0x2880c
+#define CTRL2_GAME_ADCMODE 0x40
+#define VORTEX_GAME_AXIS 0x28810 /* Axis base register. 4 axis's */
+#define AXIS_SIZE 4
+#define AXIS_RANGE 0x1fff
diff --git a/sound/pci/au88x0/au88x0.c b/sound/pci/au88x0/au88x0.c
new file mode 100644
index 000000000000..889b4a1a51a1
--- /dev/null
+++ b/sound/pci/au88x0/au88x0.c
@@ -0,0 +1,388 @@
+/*
+ * ALSA driver for the Aureal Vortex family of soundprocessors.
+ * Author: Manuel Jander (mjander@embedded.cl)
+ *
+ * This driver is the result of the OpenVortex Project from Savannah
+ * (savannah.nongnu.org/projects/openvortex). I would like to thank
+ * the developers of OpenVortex, Jeff Muizelaar and Kester Maddock, from
+ * whom i got plenty of help, and their codebase was invaluable.
+ * Thanks to the ALSA developers, they helped a lot working out
+ * the ALSA part.
+ * Thanks also to Sourceforge for maintaining the old binary drivers,
+ * and the forum, where developers could comunicate.
+ *
+ * Now at least i can play Legacy DOOM with MIDI music :-)
+ */
+
+#include "au88x0.h"
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/moduleparam.h>
+#include <sound/initval.h>
+
+// module parameters (see "Module Parameters")
+static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
+static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
+static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
+static int pcifix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 255 };
+
+module_param_array(index, int, NULL, 0444);
+MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
+module_param_array(id, charp, NULL, 0444);
+MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
+module_param_array(enable, bool, NULL, 0444);
+MODULE_PARM_DESC(enable, "Enable " CARD_NAME " soundcard.");
+module_param_array(pcifix, int, NULL, 0444);
+MODULE_PARM_DESC(pcifix, "Enable VIA-workaround for " CARD_NAME " soundcard.");
+
+MODULE_DESCRIPTION("Aureal vortex");
+MODULE_LICENSE("GPL");
+MODULE_SUPPORTED_DEVICE("{{Aureal Semiconductor Inc., Aureal Vortex Sound Processor}}");
+
+MODULE_DEVICE_TABLE(pci, snd_vortex_ids);
+
+static void vortex_fix_latency(struct pci_dev *vortex)
+{
+ int rc;
+ if (!(rc = pci_write_config_byte(vortex, 0x40, 0xff))) {
+ printk(KERN_INFO CARD_NAME
+ ": vortex latency is 0xff\n");
+ } else {
+ printk(KERN_WARNING CARD_NAME
+ ": could not set vortex latency: pci error 0x%x\n", rc);
+ }
+}
+
+static void vortex_fix_agp_bridge(struct pci_dev *via)
+{
+ int rc;
+ u8 value;
+
+ /*
+ * only set the bit (Extend PCI#2 Internal Master for
+ * Efficient Handling of Dummy Requests) if the can
+ * read the config and it is not already set
+ */
+
+ if (!(rc = pci_read_config_byte(via, 0x42, &value))
+ && ((value & 0x10)
+ || !(rc = pci_write_config_byte(via, 0x42, value | 0x10)))) {
+ printk(KERN_INFO CARD_NAME
+ ": bridge config is 0x%x\n", value | 0x10);
+ } else {
+ printk(KERN_WARNING CARD_NAME
+ ": could not set vortex latency: pci error 0x%x\n", rc);
+ }
+}
+
+static void __devinit snd_vortex_workaround(struct pci_dev *vortex, int fix)
+{
+ struct pci_dev *via;
+
+ /* autodetect if workarounds are required */
+ if (fix == 255) {
+ /* VIA KT133 */
+ via = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8365_1, NULL);
+ /* VIA Apollo */
+ if (via == NULL) {
+ via = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C598_1, NULL);
+ }
+ /* AMD Irongate */
+ if (via == NULL) {
+ via = pci_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_7007, NULL);
+ }
+ if (via) {
+ printk(KERN_INFO CARD_NAME ": Activating latency workaround...\n");
+ vortex_fix_latency(vortex);
+ vortex_fix_agp_bridge(via);
+ }
+ } else {
+ if (fix & 0x1)
+ vortex_fix_latency(vortex);
+ if ((fix & 0x2) && (via = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8365_1, NULL)))
+ vortex_fix_agp_bridge(via);
+ if ((fix & 0x4) && (via = pci_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C598_1, NULL)))
+ vortex_fix_agp_bridge(via);
+ if ((fix & 0x8) && (via = pci_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_7007, NULL)))
+ vortex_fix_agp_bridge(via);
+ }
+}
+
+// component-destructor
+// (see "Management of Cards and Components")
+static int snd_vortex_dev_free(snd_device_t * device)
+{
+ vortex_t *vortex = device->device_data;
+
+ vortex_gameport_unregister(vortex);
+ vortex_core_shutdown(vortex);
+ // Take down PCI interface.
+ synchronize_irq(vortex->irq);
+ free_irq(vortex->irq, vortex);
+ pci_release_regions(vortex->pci_dev);
+ pci_disable_device(vortex->pci_dev);
+ kfree(vortex);
+
+ return 0;
+}
+
+// chip-specific constructor
+// (see "Management of Cards and Components")
+static int __devinit
+snd_vortex_create(snd_card_t * card, struct pci_dev *pci, vortex_t ** rchip)
+{
+ vortex_t *chip;
+ int err;
+ static snd_device_ops_t ops = {
+ .dev_free = snd_vortex_dev_free,
+ };
+
+ *rchip = NULL;
+
+ // check PCI availability (DMA).
+ if ((err = pci_enable_device(pci)) < 0)
+ return err;
+ if (!pci_dma_supported(pci, VORTEX_DMA_MASK)) {
+ printk(KERN_ERR "error to set DMA mask\n");
+ return -ENXIO;
+ }
+ pci_set_dma_mask(pci, VORTEX_DMA_MASK);
+
+ chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
+ if (chip == NULL)
+ return -ENOMEM;
+
+ chip->card = card;
+
+ // initialize the stuff
+ chip->pci_dev = pci;
+ chip->io = pci_resource_start(pci, 0);
+ chip->vendor = pci->vendor;
+ chip->device = pci->device;
+ chip->card = card;
+ chip->irq = -1;
+
+ // (1) PCI resource allocation
+ // Get MMIO area
+ //
+ if ((err = pci_request_regions(pci, CARD_NAME_SHORT)) != 0)
+ goto regions_out;
+
+ chip->mmio = ioremap_nocache(pci_resource_start(pci, 0),
+ pci_resource_len(pci, 0));
+ if (!chip->mmio) {
+ printk(KERN_ERR "MMIO area remap failed.\n");
+ err = -ENOMEM;
+ goto ioremap_out;
+ }
+
+ /* Init audio core.
+ * This must be done before we do request_irq otherwise we can get spurious
+ * interupts that we do not handle properly and make a mess of things */
+ if ((err = vortex_core_init(chip)) != 0) {
+ printk(KERN_ERR "hw core init failed\n");
+ goto core_out;
+ }
+
+ if ((err = request_irq(pci->irq, vortex_interrupt,
+ SA_INTERRUPT | SA_SHIRQ, CARD_NAME_SHORT,
+ chip)) != 0) {
+ printk(KERN_ERR "cannot grab irq\n");
+ goto irq_out;
+ }
+ chip->irq = pci->irq;
+
+ pci_set_master(pci);
+ // End of PCI setup.
+
+ // Register alsa root device.
+ if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
+ goto alloc_out;
+ }
+
+ *rchip = chip;
+
+ return 0;
+
+ alloc_out:
+ synchronize_irq(chip->irq);
+ free_irq(chip->irq, chip);
+ irq_out:
+ vortex_core_shutdown(chip);
+ core_out:
+ iounmap(chip->mmio);
+ ioremap_out:
+ pci_release_regions(chip->pci_dev);
+ regions_out:
+ pci_disable_device(chip->pci_dev);
+ //FIXME: this not the right place to unregister the gameport
+ vortex_gameport_unregister(chip);
+ return err;
+}
+
+// constructor -- see "Constructor" sub-section
+static int __devinit
+snd_vortex_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
+{
+ static int dev;
+ snd_card_t *card;
+ vortex_t *chip;
+ int err;
+
+ // (1)
+ if (dev >= SNDRV_CARDS)
+ return -ENODEV;
+ if (!enable[dev]) {
+ dev++;
+ return -ENOENT;
+ }
+ // (2)
+ card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
+ if (card == NULL)
+ return -ENOMEM;
+
+ // (3)
+ if ((err = snd_vortex_create(card, pci, &chip)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+ snd_vortex_workaround(pci, pcifix[dev]);
+ // (4) Alloc components.
+ // ADB pcm.
+ if ((err = snd_vortex_new_pcm(chip, VORTEX_PCM_ADB, NR_ADB)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+#ifndef CHIP_AU8820
+ // ADB SPDIF
+ if ((err = snd_vortex_new_pcm(chip, VORTEX_PCM_SPDIF, 1)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+ // A3D
+ if ((err = snd_vortex_new_pcm(chip, VORTEX_PCM_A3D, NR_A3D)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+#endif
+ /*
+ // ADB I2S
+ if ((err = snd_vortex_new_pcm(chip, VORTEX_PCM_I2S, 1)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+ */
+#ifndef CHIP_AU8810
+ // WT pcm.
+ if ((err = snd_vortex_new_pcm(chip, VORTEX_PCM_WT, NR_WT)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+#endif
+ // snd_ac97_mixer and Vortex mixer.
+ if ((err = snd_vortex_mixer(chip)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+ if ((err = snd_vortex_midi(chip)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+
+ vortex_gameport_register(chip);
+
+#if 0
+ if (snd_seq_device_new(card, 1, SNDRV_SEQ_DEV_ID_VORTEX_SYNTH,
+ sizeof(snd_vortex_synth_arg_t), &wave) < 0
+ || wave == NULL) {
+ snd_printk("Can't initialize Aureal wavetable synth\n");
+ } else {
+ snd_vortex_synth_arg_t *arg;
+
+ arg = SNDRV_SEQ_DEVICE_ARGPTR(wave);
+ strcpy(wave->name, "Aureal Synth");
+ arg->hwptr = vortex;
+ arg->index = 1;
+ arg->seq_ports = seq_ports[dev];
+ arg->max_voices = max_synth_voices[dev];
+ }
+#endif
+
+ // (5)
+ strcpy(card->driver, CARD_NAME_SHORT);
+ strcpy(card->shortname, CARD_NAME_SHORT);
+ sprintf(card->longname, "%s at 0x%lx irq %i",
+ card->shortname, chip->io, chip->irq);
+
+ if ((err = pci_read_config_word(pci, PCI_DEVICE_ID,
+ &(chip->device))) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+ if ((err = pci_read_config_word(pci, PCI_VENDOR_ID,
+ &(chip->vendor))) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+ if ((err = pci_read_config_byte(pci, PCI_REVISION_ID,
+ &(chip->rev))) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+#ifdef CHIP_AU8830
+ if ((chip->rev) != 0xfe && (chip->rev) != 0xfa) {
+ printk(KERN_ALERT
+ "vortex: The revision (%x) of your card has not been seen before.\n",
+ chip->rev);
+ printk(KERN_ALERT
+ "vortex: Please email the results of 'lspci -vv' to openvortex-dev@nongnu.org.\n");
+ snd_card_free(card);
+ err = -ENODEV;
+ return err;
+ }
+#endif
+
+ // (6)
+ if ((err = snd_card_register(card)) < 0) {
+ snd_card_free(card);
+ return err;
+ }
+ // (7)
+ pci_set_drvdata(pci, card);
+ dev++;
+ vortex_connect_default(chip, 1);
+ vortex_enable_int(chip);
+ return 0;
+}
+
+// destructor -- see "Destructor" sub-section
+static void __devexit snd_vortex_remove(struct pci_dev *pci)
+{
+ snd_card_free(pci_get_drvdata(pci));
+ pci_set_drvdata(pci, NULL);
+}
+
+// pci_driver definition
+static struct pci_driver driver = {
+ .name = CARD_NAME_SHORT,
+ .id_table = snd_vortex_ids,
+ .probe = snd_vortex_probe,
+ .remove = __devexit_p(snd_vortex_remove),
+};
+
+// initialization of the module
+static int __init alsa_card_vortex_init(void)
+{
+ return pci_module_init(&driver);
+}
+
+// clean up the module
+static void __exit alsa_card_vortex_exit(void)
+{
+ pci_unregister_driver(&driver);
+}
+
+module_init(alsa_card_vortex_init)
+module_exit(alsa_card_vortex_exit)
diff --git a/sound/pci/au88x0/au88x0.h b/sound/pci/au88x0/au88x0.h
new file mode 100644
index 000000000000..ee1ede1979f6
--- /dev/null
+++ b/sound/pci/au88x0/au88x0.h
@@ -0,0 +1,284 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef __SOUND_AU88X0_H
+#define __SOUND_AU88X0_H
+
+#ifdef __KERNEL__
+#include <sound/driver.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <asm/io.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/rawmidi.h>
+#include <sound/mpu401.h>
+#include <sound/hwdep.h>
+#include <sound/ac97_codec.h>
+
+#endif
+
+#ifndef CHIP_AU8820
+#include "au88x0_eq.h"
+#include "au88x0_a3d.h"
+#endif
+#ifndef CHIP_AU8810
+#include "au88x0_wt.h"
+#endif
+
+#define VORTEX_DMA_MASK 0xffffffff
+
+#define hwread(x,y) readl((x)+((y)>>2))
+#define hwwrite(x,y,z) writel((z),(x)+((y)>>2))
+
+/* Vortex MPU401 defines. */
+#define MIDI_CLOCK_DIV 0x61
+/* Standart MPU401 defines. */
+#define MPU401_RESET 0xff
+#define MPU401_ENTER_UART 0x3f
+#define MPU401_ACK 0xfe
+
+// Get src register value to convert from x to y.
+#define SRC_RATIO(x,y) ((((x<<15)/y) + 1)/2)
+
+/* FIFO software state constants. */
+#define FIFO_STOP 0
+#define FIFO_START 1
+#define FIFO_PAUSE 2
+
+/* IRQ flags */
+#define IRQ_ERR_MASK 0x00ff
+#define IRQ_FATAL 0x0001
+#define IRQ_PARITY 0x0002
+#define IRQ_REG 0x0004
+#define IRQ_FIFO 0x0008
+#define IRQ_DMA 0x0010
+#define IRQ_PCMOUT 0x0020 /* PCM OUT page crossing */
+#define IRQ_TIMER 0x1000
+#define IRQ_MIDI 0x2000
+#define IRQ_MODEM 0x4000
+
+/* ADB Resource */
+#define VORTEX_RESOURCE_DMA 0x00000000
+#define VORTEX_RESOURCE_SRC 0x00000001
+#define VORTEX_RESOURCE_MIXIN 0x00000002
+#define VORTEX_RESOURCE_MIXOUT 0x00000003
+#define VORTEX_RESOURCE_A3D 0x00000004
+#define VORTEX_RESOURCE_LAST 0x00000005
+
+/* Check for SDAC bit in "Extended audio ID" AC97 register */
+//#define VORTEX_IS_QUAD(x) (((x)->codec == NULL) ? 0 : ((x)->codec->ext_id&0x80))
+#define VORTEX_IS_QUAD(x) ((x)->isquad)
+/* Check if chip has bug. */
+#define IS_BAD_CHIP(x) (\
+ (x->rev == 0xfe && x->device == PCI_DEVICE_ID_AUREAL_VORTEX_2) || \
+ (x->rev == 0xfe && x->device == PCI_DEVICE_ID_AUREAL_ADVANTAGE))
+
+
+/* PCM devices */
+#define VORTEX_PCM_ADB 0
+#define VORTEX_PCM_SPDIF 1
+#define VORTEX_PCM_A3D 2
+#define VORTEX_PCM_WT 3
+#define VORTEX_PCM_I2S 4
+#define VORTEX_PCM_LAST 5
+
+#define MIX_CAPT(x) (vortex->mixcapt[x])
+#define MIX_PLAYB(x) (vortex->mixplayb[x])
+#define MIX_SPDIF(x) (vortex->mixspdif[x])
+
+#define NR_WTPB 0x20 /* WT channels per eahc bank. */
+
+/* Structs */
+typedef struct {
+ //int this_08; /* Still unknown */
+ int fifo_enabled; /* this_24 */
+ int fifo_status; /* this_1c */
+ int dma_ctrl; /* this_78 (ADB), this_7c (WT) */
+ int dma_unknown; /* this_74 (ADB), this_78 (WT). WDM: +8 */
+ int cfg0;
+ int cfg1;
+
+ int nr_ch; /* Nr of PCM channels in use */
+ int type; /* Output type (ac97, a3d, spdif, i2s, dsp) */
+ int dma; /* Hardware DMA index. */
+ int dir; /* Stream Direction. */
+ u32 resources[5];
+
+ /* Virtual page extender stuff */
+ int nr_periods;
+ int period_bytes;
+ snd_pcm_sgbuf_t *sgbuf; /* DMA Scatter Gather struct */
+ int period_real;
+ int period_virt;
+
+ snd_pcm_substream_t *substream;
+} stream_t;
+
+typedef struct snd_vortex vortex_t;
+struct snd_vortex {
+ /* ALSA structs. */
+ snd_card_t *card;
+ snd_pcm_t *pcm[VORTEX_PCM_LAST];
+
+ snd_rawmidi_t *rmidi; /* Legacy Midi interface. */
+ ac97_t *codec;
+
+ /* Stream structs. */
+ stream_t dma_adb[NR_ADB];
+ int spdif_sr;
+#ifndef CHIP_AU8810
+ stream_t dma_wt[NR_WT];
+ wt_voice_t wt_voice[NR_WT]; /* WT register cache. */
+ char mixwt[(NR_WT / NR_WTPB) * 6]; /* WT mixin objects */
+#endif
+
+ /* Global resources */
+ s8 mixcapt[2];
+ s8 mixplayb[4];
+#ifndef CHIP_AU8820
+ s8 mixspdif[2];
+ s8 mixa3d[2]; /* mixers which collect all a3d streams. */
+ s8 mixxtlk[2]; /* crosstalk canceler mixer inputs. */
+#endif
+ u32 fixed_res[5];
+
+#ifndef CHIP_AU8820
+ /* Hardware equalizer structs */
+ eqlzr_t eq;
+ /* A3D structs */
+ a3dsrc_t a3d[NR_A3D];
+ /* Xtalk canceler */
+ int xt_mode; /* 1: speakers, 0:headphones. */
+#endif
+
+ int isquad; /* cache of extended ID codec flag. */
+
+ /* Gameport stuff. */
+ struct gameport *gameport;
+
+ /* PCI hardware resources */
+ unsigned long io;
+ unsigned long __iomem *mmio;
+ unsigned int irq;
+ spinlock_t lock;
+
+ /* PCI device */
+ struct pci_dev *pci_dev;
+ u16 vendor;
+ u16 device;
+ u8 rev;
+};
+
+/* Functions. */
+
+/* SRC */
+static void vortex_adb_setsrc(vortex_t * vortex, int adbdma,
+ unsigned int cvrt, int dir);
+
+/* DMA Engines. */
+static void vortex_adbdma_setbuffers(vortex_t * vortex, int adbdma,
+ snd_pcm_sgbuf_t * sgbuf, int size,
+ int count);
+static void vortex_adbdma_setmode(vortex_t * vortex, int adbdma, int ie,
+ int dir, int fmt, int d,
+ unsigned long offset);
+static void vortex_adbdma_setstartbuffer(vortex_t * vortex, int adbdma, int sb);
+#ifndef CHIP_AU8810
+static void vortex_wtdma_setbuffers(vortex_t * vortex, int wtdma,
+ snd_pcm_sgbuf_t * sgbuf, int size,
+ int count);
+static void vortex_wtdma_setmode(vortex_t * vortex, int wtdma, int ie, int fmt, int d, /*int e, */
+ unsigned long offset);
+static void vortex_wtdma_setstartbuffer(vortex_t * vortex, int wtdma, int sb);
+#endif
+
+static void vortex_adbdma_startfifo(vortex_t * vortex, int adbdma);
+//static void vortex_adbdma_stopfifo(vortex_t *vortex, int adbdma);
+static void vortex_adbdma_pausefifo(vortex_t * vortex, int adbdma);
+static void vortex_adbdma_resumefifo(vortex_t * vortex, int adbdma);
+static int inline vortex_adbdma_getlinearpos(vortex_t * vortex, int adbdma);
+static void vortex_adbdma_resetup(vortex_t *vortex, int adbdma);
+
+#ifndef CHIP_AU8810
+static void vortex_wtdma_startfifo(vortex_t * vortex, int wtdma);
+static void vortex_wtdma_stopfifo(vortex_t * vortex, int wtdma);
+static void vortex_wtdma_pausefifo(vortex_t * vortex, int wtdma);
+static void vortex_wtdma_resumefifo(vortex_t * vortex, int wtdma);
+static int inline vortex_wtdma_getlinearpos(vortex_t * vortex, int wtdma);
+#endif
+
+/* global stuff. */
+static void vortex_codec_init(vortex_t * vortex);
+static void vortex_codec_write(ac97_t * codec, unsigned short addr,
+ unsigned short data);
+static unsigned short vortex_codec_read(ac97_t * codec, unsigned short addr);
+static void vortex_spdif_init(vortex_t * vortex, int spdif_sr, int spdif_mode);
+
+static int vortex_core_init(vortex_t * card);
+static int vortex_core_shutdown(vortex_t * card);
+static void vortex_enable_int(vortex_t * card);
+static irqreturn_t vortex_interrupt(int irq, void *dev_id,
+ struct pt_regs *regs);
+static int vortex_alsafmt_aspfmt(int alsafmt);
+
+/* Connection stuff. */
+static void vortex_connect_default(vortex_t * vortex, int en);
+static int vortex_adb_allocroute(vortex_t * vortex, int dma, int nr_ch,
+ int dir, int type);
+static char vortex_adb_checkinout(vortex_t * vortex, int resmap[], int out,
+ int restype);
+#ifndef CHIP_AU8810
+static int vortex_wt_allocroute(vortex_t * vortex, int dma, int nr_ch);
+static void vortex_wt_connect(vortex_t * vortex, int en);
+static void vortex_wt_init(vortex_t * vortex);
+#endif
+
+static void vortex_route(vortex_t * vortex, int en, unsigned char channel,
+ unsigned char source, unsigned char dest);
+#if 0
+static void vortex_routes(vortex_t * vortex, int en, unsigned char channel,
+ unsigned char source, unsigned char dest0,
+ unsigned char dest1);
+#endif
+static void vortex_connection_mixin_mix(vortex_t * vortex, int en,
+ unsigned char mixin,
+ unsigned char mix, int a);
+static void vortex_mix_setinputvolumebyte(vortex_t * vortex,
+ unsigned char mix, int mixin,
+ unsigned char vol);
+static void vortex_mix_setvolumebyte(vortex_t * vortex, unsigned char mix,
+ unsigned char vol);
+
+/* A3D functions. */
+#ifndef CHIP_AU8820
+static void vortex_Vort3D(vortex_t * v, int en);
+static void vortex_Vort3D_connect(vortex_t * vortex, int en);
+static void vortex_Vort3D_InitializeSource(a3dsrc_t * a, int en);
+#endif
+
+/* Driver stuff. */
+static int __devinit vortex_gameport_register(vortex_t * card);
+static void vortex_gameport_unregister(vortex_t * card);
+#ifndef CHIP_AU8820
+static int __devinit vortex_eq_init(vortex_t * vortex);
+static int __devexit vortex_eq_free(vortex_t * vortex);
+#endif
+/* ALSA stuff. */
+static int __devinit snd_vortex_new_pcm(vortex_t * vortex, int idx, int nr);
+static int __devinit snd_vortex_mixer(vortex_t * vortex);
+static int __devinit snd_vortex_midi(vortex_t * vortex);
+#endif
diff --git a/sound/pci/au88x0/au88x0_a3d.c b/sound/pci/au88x0/au88x0_a3d.c
new file mode 100644
index 000000000000..9ea2ba7bc3c8
--- /dev/null
+++ b/sound/pci/au88x0/au88x0_a3d.c
@@ -0,0 +1,914 @@
+/***************************************************************************
+ * au88x0_a3d.c
+ *
+ * Fri Jul 18 14:16:22 2003
+ * Copyright 2003 mjander
+ * mjander@users.sourceforge.net
+ *
+ * A3D. You may think i'm crazy, but this may work someday. Who knows...
+ ****************************************************************************/
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#include "au88x0_a3d.h"
+#include "au88x0_a3ddata.c"
+#include "au88x0_xtalk.h"
+#include "au88x0.h"
+
+static void
+a3dsrc_SetTimeConsts(a3dsrc_t * a, short HrtfTrack, short ItdTrack,
+ short GTrack, short CTrack)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ hwwrite(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_HrtfTrackTC), HrtfTrack);
+ hwwrite(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_ITDTrackTC), ItdTrack);
+ hwwrite(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_GainTrackTC), GTrack);
+ hwwrite(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_CoeffTrackTC), CTrack);
+}
+
+#if 0
+static void
+a3dsrc_GetTimeConsts(a3dsrc_t * a, short *HrtfTrack, short *ItdTrack,
+ short *GTrack, short *CTrack)
+{
+ // stub!
+}
+
+#endif
+/* Atmospheric absorbtion. */
+
+static void
+a3dsrc_SetAtmosTarget(a3dsrc_t * a, short aa, short b, short c, short d,
+ short e)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_A21Target),
+ (e << 0x10) | d);
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_B10Target),
+ (b << 0x10) | aa);
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_B2Target), c);
+}
+
+static void
+a3dsrc_SetAtmosCurrent(a3dsrc_t * a, short aa, short b, short c, short d,
+ short e)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_A12Current),
+ (e << 0x10) | d);
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_B01Current),
+ (b << 0x10) | aa);
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_B2Current), c);
+}
+
+static void
+a3dsrc_SetAtmosState(a3dsrc_t * a, short x1, short x2, short y1, short y2)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ hwwrite(vortex->mmio, a3d_addrA(a->slice, a->source, A3D_A_x1), x1);
+ hwwrite(vortex->mmio, a3d_addrA(a->slice, a->source, A3D_A_x2), x2);
+ hwwrite(vortex->mmio, a3d_addrA(a->slice, a->source, A3D_A_y1), y1);
+ hwwrite(vortex->mmio, a3d_addrA(a->slice, a->source, A3D_A_y2), y2);
+}
+
+#if 0
+static void
+a3dsrc_GetAtmosTarget(a3dsrc_t * a, short *aa, short *b, short *c,
+ short *d, short *e)
+{
+}
+static void
+a3dsrc_GetAtmosCurrent(a3dsrc_t * a, short *bb01, short *ab01, short *b2,
+ short *aa12, short *ba12)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ *aa12 =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_A12Current));
+ *ba12 =
+ hwread(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_A12Current));
+ *ab01 =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_B01Current));
+ *bb01 =
+ hwread(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_B01Current));
+ *b2 =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_B2Current));
+}
+
+static void
+a3dsrc_GetAtmosState(a3dsrc_t * a, short *x1, short *x2, short *y1, short *y2)
+{
+
+}
+
+#endif
+/* HRTF */
+
+static void
+a3dsrc_SetHrtfTarget(a3dsrc_t * a, a3d_Hrtf_t const aa, a3d_Hrtf_t const b)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ int i;
+
+ for (i = 0; i < HRTF_SZ; i++)
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source,
+ A3D_B_HrtfTarget) + (i << 2),
+ (b[i] << 0x10) | aa[i]);
+}
+
+static void
+a3dsrc_SetHrtfCurrent(a3dsrc_t * a, a3d_Hrtf_t const aa, a3d_Hrtf_t const b)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ int i;
+
+ for (i = 0; i < HRTF_SZ; i++)
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source,
+ A3D_B_HrtfCurrent) + (i << 2),
+ (b[i] << 0x10) | aa[i]);
+}
+
+static void
+a3dsrc_SetHrtfState(a3dsrc_t * a, a3d_Hrtf_t const aa, a3d_Hrtf_t const b)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ int i;
+
+ for (i = 0; i < HRTF_SZ; i++)
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source,
+ A3D_B_HrtfDelayLine) + (i << 2),
+ (b[i] << 0x10) | aa[i]);
+}
+
+static void a3dsrc_SetHrtfOutput(a3dsrc_t * a, short left, short right)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ hwwrite(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_HrtfOutL), left);
+ hwwrite(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_HrtfOutR), right);
+}
+
+#if 0
+static void a3dsrc_GetHrtfTarget(a3dsrc_t * a, a3d_Hrtf_t aa, a3d_Hrtf_t b)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ int i;
+
+ for (i = 0; i < HRTF_SZ; i++)
+ aa[i] =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source,
+ A3D_A_HrtfTarget + (i << 2)));
+ for (i = 0; i < HRTF_SZ; i++)
+ b[i] =
+ hwread(vortex->mmio,
+ a3d_addrB(a->slice, a->source,
+ A3D_B_HrtfTarget + (i << 2)));
+}
+
+static void a3dsrc_GetHrtfCurrent(a3dsrc_t * a, a3d_Hrtf_t aa, a3d_Hrtf_t b)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ int i;
+
+ for (i = 0; i < HRTF_SZ; i++)
+ aa[i] =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source,
+ A3D_A_HrtfCurrent + (i << 2)));
+ for (i = 0; i < HRTF_SZ; i++)
+ b[i] =
+ hwread(vortex->mmio,
+ a3d_addrB(a->slice, a->source,
+ A3D_B_HrtfCurrent + (i << 2)));
+}
+
+static void a3dsrc_GetHrtfState(a3dsrc_t * a, a3d_Hrtf_t aa, a3d_Hrtf_t b)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ int i;
+ // FIXME: verify this!
+ for (i = 0; i < HRTF_SZ; i++)
+ aa[i] =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source,
+ A3D_A_HrtfDelayLine + (i << 2)));
+ for (i = 0; i < HRTF_SZ; i++)
+ b[i] =
+ hwread(vortex->mmio,
+ a3d_addrB(a->slice, a->source,
+ A3D_B_HrtfDelayLine + (i << 2)));
+}
+
+static void a3dsrc_GetHrtfOutput(a3dsrc_t * a, short *left, short *right)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ *left =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_HrtfOutL));
+ *right =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_HrtfOutR));
+}
+
+#endif
+
+/* Interaural Time Difference.
+ * "The other main clue that humans use to locate sounds, is called
+ * Interaural Time Difference (ITD). The differences in distance from
+ * the sound source to a listeners ears means that the sound will
+ * reach one ear slightly before the other....", found somewhere with google.*/
+static void a3dsrc_SetItdTarget(a3dsrc_t * a, short litd, short ritd)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+
+ if (litd < 0)
+ litd = 0;
+ if (litd > 0x57FF)
+ litd = 0x57FF;
+ if (ritd < 0)
+ ritd = 0;
+ if (ritd > 0x57FF)
+ ritd = 0x57FF;
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_ITDTarget),
+ (ritd << 0x10) | litd);
+ //hwwrite(vortex->mmio, addr(0x191DF+5, this04, this08), (ritd<<0x10)|litd);
+}
+
+static void a3dsrc_SetItdCurrent(a3dsrc_t * a, short litd, short ritd)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+
+ if (litd < 0)
+ litd = 0;
+ if (litd > 0x57FF)
+ litd = 0x57FF;
+ if (ritd < 0)
+ ritd = 0;
+ if (ritd > 0x57FF)
+ ritd = 0x57FF;
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_ITDCurrent),
+ (ritd << 0x10) | litd);
+ //hwwrite(vortex->mmio, addr(0x191DF+1, this04, this08), (ritd<<0x10)|litd);
+}
+
+static void a3dsrc_SetItdDline(a3dsrc_t * a, a3d_ItdDline_t const dline)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ int i;
+ /* 45 != 40 -> Check this ! */
+ for (i = 0; i < DLINE_SZ; i++)
+ hwwrite(vortex->mmio,
+ a3d_addrA(a->slice, a->source,
+ A3D_A_ITDDelayLine) + (i << 2), dline[i]);
+}
+
+#if 0
+static void a3dsrc_GetItdTarget(a3dsrc_t * a, short *litd, short *ritd)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ *ritd =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_ITDTarget));
+ *litd =
+ hwread(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_ITDTarget));
+}
+
+static void a3dsrc_GetItdCurrent(a3dsrc_t * a, short *litd, short *ritd)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+
+ *ritd =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_ITDCurrent));
+ *litd =
+ hwread(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_ITDCurrent));
+}
+
+static void a3dsrc_GetItdDline(a3dsrc_t * a, a3d_ItdDline_t dline)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ int i;
+
+ for (i = 0; i < DLINE_SZ; i++)
+ dline[i] =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source,
+ A3D_A_ITDDelayLine + (i << 2)));
+}
+
+#endif
+/* This is may be used for ILD Interaural Level Difference. */
+
+static void a3dsrc_SetGainTarget(a3dsrc_t * a, short left, short right)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_GainTarget),
+ (right << 0x10) | left);
+}
+
+static void a3dsrc_SetGainCurrent(a3dsrc_t * a, short left, short right)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ hwwrite(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_GainCurrent),
+ (right << 0x10) | left);
+}
+
+#if 0
+static void a3dsrc_GetGainTarget(a3dsrc_t * a, short *left, short *right)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ *right =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_GainTarget));
+ *left =
+ hwread(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_GainTarget));
+}
+
+static void a3dsrc_GetGainCurrent(a3dsrc_t * a, short *left, short *right)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ *right =
+ hwread(vortex->mmio,
+ a3d_addrA(a->slice, a->source, A3D_A_GainCurrent));
+ *left =
+ hwread(vortex->mmio,
+ a3d_addrB(a->slice, a->source, A3D_B_GainCurrent));
+}
+
+/* CA3dIO this func seems to be inlined all over this place. */
+static void CA3dIO_WriteReg(a3dsrc_t * a, unsigned long addr, short aa, short b)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ hwwrite(vortex->mmio, addr, (aa << 0x10) | b);
+}
+
+#endif
+/* Generic A3D stuff */
+
+static void a3dsrc_SetA3DSampleRate(a3dsrc_t * a, int sr)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ int esp0 = 0;
+
+ esp0 = (((esp0 & 0x7fffffff) | 0xB8000000) & 0x7) | ((sr & 0x1f) << 3);
+ hwwrite(vortex->mmio, A3D_SLICE_Control + ((a->slice) << 0xd), esp0);
+ //hwwrite(vortex->mmio, 0x19C38 + (this08<<0xd), esp0);
+}
+
+static void a3dsrc_EnableA3D(a3dsrc_t * a)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ hwwrite(vortex->mmio, A3D_SLICE_Control + ((a->slice) << 0xd),
+ 0xF0000001);
+ //hwwrite(vortex->mmio, 0x19C38 + (this08<<0xd), 0xF0000001);
+}
+
+static void a3dsrc_DisableA3D(a3dsrc_t * a)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ hwwrite(vortex->mmio, A3D_SLICE_Control + ((a->slice) << 0xd),
+ 0xF0000000);
+}
+
+static void a3dsrc_SetA3DControlReg(a3dsrc_t * a, unsigned long ctrl)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ hwwrite(vortex->mmio, A3D_SLICE_Control + ((a->slice) << 0xd), ctrl);
+}
+
+static void a3dsrc_SetA3DPointerReg(a3dsrc_t * a, unsigned long ptr)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ hwwrite(vortex->mmio, A3D_SLICE_Pointers + ((a->slice) << 0xd), ptr);
+}
+
+#if 0
+static void a3dsrc_GetA3DSampleRate(a3dsrc_t * a, int *sr)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ *sr = ((hwread(vortex->mmio, A3D_SLICE_Control + (a->slice << 0xd))
+ >> 3) & 0x1f);
+ //*sr = ((hwread(vortex->mmio, 0x19C38 + (this08<<0xd))>>3)&0x1f);
+}
+
+static void a3dsrc_GetA3DControlReg(a3dsrc_t * a, unsigned long *ctrl)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ *ctrl = hwread(vortex->mmio, A3D_SLICE_Control + ((a->slice) << 0xd));
+}
+
+static void a3dsrc_GetA3DPointerReg(a3dsrc_t * a, unsigned long *ptr)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ *ptr = hwread(vortex->mmio, A3D_SLICE_Pointers + ((a->slice) << 0xd));
+}
+
+#endif
+static void a3dsrc_ZeroSliceIO(a3dsrc_t * a)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+ int i;
+
+ for (i = 0; i < 8; i++)
+ hwwrite(vortex->mmio,
+ A3D_SLICE_VDBDest +
+ ((((a->slice) << 0xb) + i) << 2), 0);
+ for (i = 0; i < 4; i++)
+ hwwrite(vortex->mmio,
+ A3D_SLICE_VDBSource +
+ ((((a->slice) << 0xb) + i) << 2), 0);
+}
+
+/* Reset Single A3D source. */
+static void a3dsrc_ZeroState(a3dsrc_t * a)
+{
+
+ //printk("vortex: ZeroState slice: %d, source %d\n", a->slice, a->source);
+
+ a3dsrc_SetAtmosState(a, 0, 0, 0, 0);
+ a3dsrc_SetHrtfState(a, A3dHrirZeros, A3dHrirZeros);
+ a3dsrc_SetItdDline(a, A3dItdDlineZeros);
+ a3dsrc_SetHrtfOutput(a, 0, 0);
+ a3dsrc_SetTimeConsts(a, 0, 0, 0, 0);
+
+ a3dsrc_SetAtmosCurrent(a, 0, 0, 0, 0, 0);
+ a3dsrc_SetAtmosTarget(a, 0, 0, 0, 0, 0);
+ a3dsrc_SetItdCurrent(a, 0, 0);
+ a3dsrc_SetItdTarget(a, 0, 0);
+ a3dsrc_SetGainCurrent(a, 0, 0);
+ a3dsrc_SetGainTarget(a, 0, 0);
+
+ a3dsrc_SetHrtfCurrent(a, A3dHrirZeros, A3dHrirZeros);
+ a3dsrc_SetHrtfTarget(a, A3dHrirZeros, A3dHrirZeros);
+}
+
+/* Reset entire A3D engine */
+static void a3dsrc_ZeroStateA3D(a3dsrc_t * a)
+{
+ int i, var, var2;
+
+ if ((a->vortex) == NULL) {
+ printk("vortex: ZeroStateA3D: ERROR: a->vortex is NULL\n");
+ return;
+ }
+
+ a3dsrc_SetA3DControlReg(a, 0);
+ a3dsrc_SetA3DPointerReg(a, 0);
+
+ var = a->slice;
+ var2 = a->source;
+ for (i = 0; i < 4; i++) {
+ a->slice = i;
+ a3dsrc_ZeroSliceIO(a);
+ //a3dsrc_ZeroState(a);
+ }
+ a->source = var2;
+ a->slice = var;
+}
+
+/* Program A3D block as pass through */
+static void a3dsrc_ProgramPipe(a3dsrc_t * a)
+{
+ a3dsrc_SetTimeConsts(a, 0, 0, 0, 0);
+ a3dsrc_SetAtmosCurrent(a, 0, 0x4000, 0, 0, 0);
+ a3dsrc_SetAtmosTarget(a, 0x4000, 0, 0, 0, 0);
+ a3dsrc_SetItdCurrent(a, 0, 0);
+ a3dsrc_SetItdTarget(a, 0, 0);
+ a3dsrc_SetGainCurrent(a, 0x7fff, 0x7fff);
+ a3dsrc_SetGainTarget(a, 0x7fff, 0x7fff);
+
+ /* SET HRTF HERE */
+
+ /* Single spike leads to identity transfer function. */
+ a3dsrc_SetHrtfCurrent(a, A3dHrirImpulse, A3dHrirImpulse);
+ a3dsrc_SetHrtfTarget(a, A3dHrirImpulse, A3dHrirImpulse);
+
+ /* Test: Sounds saturated. */
+ //a3dsrc_SetHrtfCurrent(a, A3dHrirSatTest, A3dHrirSatTest);
+ //a3dsrc_SetHrtfTarget(a, A3dHrirSatTest, A3dHrirSatTest);
+}
+
+/* VDB = Vortex audio Dataflow Bus */
+#if 0
+static void a3dsrc_ClearVDBData(a3dsrc_t * a, unsigned long aa)
+{
+ vortex_t *vortex = (vortex_t *) (a->vortex);
+
+ // ((aa >> 2) << 8) - (aa >> 2)
+ hwwrite(vortex->mmio,
+ a3d_addrS(a->slice, A3D_SLICE_VDBDest) + (a->source << 2), 0);
+ hwwrite(vortex->mmio,
+ a3d_addrS(a->slice,
+ A3D_SLICE_VDBDest + 4) + (a->source << 2), 0);
+ /*
+ hwwrite(vortex->mmio, 0x19c00 + (((aa>>2)*255*4)+aa)*8, 0);
+ hwwrite(vortex->mmio, 0x19c04 + (((aa>>2)*255*4)+aa)*8, 0);
+ */
+}
+#endif
+
+/* A3D HwSource stuff. */
+
+static void vortex_A3dSourceHw_Initialize(vortex_t * v, int source, int slice)
+{
+ a3dsrc_t *a3dsrc = &(v->a3d[source + (slice * 4)]);
+ //a3dsrc_t *a3dsrc = &(v->a3d[source + (slice*4)]);
+
+ a3dsrc->vortex = (void *)v;
+ a3dsrc->source = source; /* source */
+ a3dsrc->slice = slice; /* slice */
+ a3dsrc_ZeroState(a3dsrc);
+ /* Added by me. */
+ a3dsrc_SetA3DSampleRate(a3dsrc, 0x11);
+}
+
+static int Vort3DRend_Initialize(vortex_t * v, unsigned short mode)
+{
+ v->xt_mode = mode; /* this_14 */
+
+ vortex_XtalkHw_init(v);
+ vortex_XtalkHw_SetGainsAllChan(v);
+ switch (v->xt_mode) {
+ case XT_SPEAKER0:
+ vortex_XtalkHw_ProgramXtalkNarrow(v);
+ break;
+ case XT_SPEAKER1:
+ vortex_XtalkHw_ProgramXtalkWide(v);
+ break;
+ default:
+ case XT_HEADPHONE:
+ vortex_XtalkHw_ProgramPipe(v);
+ break;
+ case XT_DIAMOND:
+ vortex_XtalkHw_ProgramDiamondXtalk(v);
+ break;
+ }
+ vortex_XtalkHw_SetSampleRate(v, 0x11);
+ vortex_XtalkHw_Enable(v);
+ return 0;
+}
+
+/* 3D Sound entry points. */
+
+static int vortex_a3d_register_controls(vortex_t * vortex);
+static void vortex_a3d_unregister_controls(vortex_t * vortex);
+/* A3D base support init/shudown */
+static void vortex_Vort3D(vortex_t * v, int en)
+{
+ int i;
+ if (en) {
+ Vort3DRend_Initialize(v, XT_HEADPHONE);
+ for (i = 0; i < NR_A3D; i++) {
+ vortex_A3dSourceHw_Initialize(v, i % 4, i >> 2);
+ a3dsrc_ZeroStateA3D(&(v->a3d[0]));
+ }
+ } else {
+ vortex_XtalkHw_Disable(v);
+ }
+ /* Register ALSA controls */
+ if (en) {
+ vortex_a3d_register_controls(v);
+ } else {
+ vortex_a3d_unregister_controls(v);
+ }
+}
+
+/* Make A3D subsystem connections. */
+static void vortex_Vort3D_connect(vortex_t * v, int en)
+{
+ int i;
+
+// Disable AU8810 routes, since they seem to be wrong (in au8810.h).
+#ifdef CHIP_AU8810
+ return;
+#endif
+
+#if 1
+ /* Alloc Xtalk mixin resources */
+ v->mixxtlk[0] =
+ vortex_adb_checkinout(v, v->fixed_res, en, VORTEX_RESOURCE_MIXIN);
+ if (v->mixxtlk[0] < 0) {
+ printk
+ ("vortex: vortex_Vort3D: ERROR: not enough free mixer resources.\n");
+ return;
+ }
+ v->mixxtlk[1] =
+ vortex_adb_checkinout(v, v->fixed_res, en, VORTEX_RESOURCE_MIXIN);
+ if (v->mixxtlk[1] < 0) {
+ printk
+ ("vortex: vortex_Vort3D: ERROR: not enough free mixer resources.\n");
+ return;
+ }
+#endif
+
+ /* Connect A3D -> XTALK */
+ for (i = 0; i < 4; i++) {
+ // 2 outputs per each A3D slice.
+ vortex_route(v, en, 0x11, ADB_A3DOUT(i * 2), ADB_XTALKIN(i));
+ vortex_route(v, en, 0x11, ADB_A3DOUT(i * 2) + 1, ADB_XTALKIN(5 + i));
+ }
+#if 0
+ vortex_route(v, en, 0x11, ADB_XTALKOUT(0), ADB_EQIN(2));
+ vortex_route(v, en, 0x11, ADB_XTALKOUT(1), ADB_EQIN(3));
+#else
+ /* Connect XTalk -> mixer */
+ vortex_route(v, en, 0x11, ADB_XTALKOUT(0), ADB_MIXIN(v->mixxtlk[0]));
+ vortex_route(v, en, 0x11, ADB_XTALKOUT(1), ADB_MIXIN(v->mixxtlk[1]));
+ vortex_connection_mixin_mix(v, en, v->mixxtlk[0], v->mixplayb[0], 0);
+ vortex_connection_mixin_mix(v, en, v->mixxtlk[1], v->mixplayb[1], 0);
+ vortex_mix_setinputvolumebyte(v, v->mixplayb[0], v->mixxtlk[0],
+ en ? MIX_DEFIGAIN : VOL_MIN);
+ vortex_mix_setinputvolumebyte(v, v->mixplayb[1], v->mixxtlk[1],
+ en ? MIX_DEFIGAIN : VOL_MIN);
+ if (VORTEX_IS_QUAD(v)) {
+ vortex_connection_mixin_mix(v, en, v->mixxtlk[0],
+ v->mixplayb[2], 0);
+ vortex_connection_mixin_mix(v, en, v->mixxtlk[1],
+ v->mixplayb[3], 0);
+ vortex_mix_setinputvolumebyte(v, v->mixplayb[2],
+ v->mixxtlk[0],
+ en ? MIX_DEFIGAIN : VOL_MIN);
+ vortex_mix_setinputvolumebyte(v, v->mixplayb[3],
+ v->mixxtlk[1],
+ en ? MIX_DEFIGAIN : VOL_MIN);
+ }
+#endif
+}
+
+/* Initialize one single A3D source. */
+static void vortex_Vort3D_InitializeSource(a3dsrc_t * a, int en)
+{
+ if (a->vortex == NULL) {
+ printk
+ ("vortex: Vort3D_InitializeSource: A3D source not initialized\n");
+ return;
+ }
+ if (en) {
+ a3dsrc_ProgramPipe(a);
+ a3dsrc_SetA3DSampleRate(a, 0x11);
+ a3dsrc_SetTimeConsts(a, HrtfTCDefault,
+ ItdTCDefault, GainTCDefault,
+ CoefTCDefault);
+ /* Remark: zero gain is muted. */
+ //a3dsrc_SetGainTarget(a,0,0);
+ //a3dsrc_SetGainCurrent(a,0,0);
+ a3dsrc_EnableA3D(a);
+ } else {
+ a3dsrc_DisableA3D(a);
+ a3dsrc_ZeroState(a);
+ }
+}
+
+/* Conversion of coordinates into 3D parameters. */
+
+static void vortex_a3d_coord2hrtf(a3d_Hrtf_t hrtf, int *coord)
+{
+ /* FIXME: implement this. */
+
+}
+static void vortex_a3d_coord2itd(a3d_Itd_t itd, int *coord)
+{
+ /* FIXME: implement this. */
+
+}
+static void vortex_a3d_coord2ild(a3d_LRGains_t ild, int left, int right)
+{
+ /* FIXME: implement this. */
+
+}
+static void vortex_a3d_translate_filter(a3d_atmos_t filter, int *params)
+{
+ /* FIXME: implement this. */
+
+}
+
+/* ALSA control interface. */
+
+static int
+snd_vortex_a3d_hrtf_info(snd_kcontrol_t * kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 6;
+ uinfo->value.integer.min = 0x00000000;
+ uinfo->value.integer.max = 0xffffffff;
+ return 0;
+}
+static int
+snd_vortex_a3d_itd_info(snd_kcontrol_t * kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 2;
+ uinfo->value.integer.min = 0x00000000;
+ uinfo->value.integer.max = 0xffffffff;
+ return 0;
+}
+static int
+snd_vortex_a3d_ild_info(snd_kcontrol_t * kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 2;
+ uinfo->value.integer.min = 0x00000000;
+ uinfo->value.integer.max = 0xffffffff;
+ return 0;
+}
+static int
+snd_vortex_a3d_filter_info(snd_kcontrol_t *
+ kcontrol, snd_ctl_elem_info_t * uinfo)
+{
+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
+ uinfo->count = 4;
+ uinfo->value.integer.min = 0x00000000;
+ uinfo->value.integer.max = 0xffffffff;
+ return 0;
+}
+
+static int
+snd_vortex_a3d_get(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ //a3dsrc_t *a = kcontrol->private_data;
+ /* No read yet. Would this be really useable/needed ? */
+
+ return 0;
+}
+
+static int
+snd_vortex_a3d_hrtf_put(snd_kcontrol_t *
+ kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ a3dsrc_t *a = kcontrol->private_data;
+ int changed = 1, i;
+ int coord[6];
+ for (i = 0; i < 6; i++)
+ coord[i] = ucontrol->value.integer.value[i];
+ /* Translate orientation coordinates to a3d params. */
+ vortex_a3d_coord2hrtf(a->hrtf[0], coord);
+ vortex_a3d_coord2hrtf(a->hrtf[1], coord);
+ a3dsrc_SetHrtfTarget(a, a->hrtf[0], a->hrtf[1]);
+ a3dsrc_SetHrtfCurrent(a, a->hrtf[0], a->hrtf[1]);
+ return changed;
+}
+
+static int
+snd_vortex_a3d_itd_put(snd_kcontrol_t *
+ kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ a3dsrc_t *a = kcontrol->private_data;
+ int coord[6];
+ int i, changed = 1;
+ for (i = 0; i < 6; i++)
+ coord[i] = ucontrol->value.integer.value[i];
+ /* Translate orientation coordinates to a3d params. */
+ vortex_a3d_coord2itd(a->hrtf[0], coord);
+ vortex_a3d_coord2itd(a->hrtf[1], coord);
+ /* Inter aural time difference. */
+ a3dsrc_SetItdTarget(a, a->itd[0], a->itd[1]);
+ a3dsrc_SetItdCurrent(a, a->itd[0], a->itd[1]);
+ a3dsrc_SetItdDline(a, a->dline);
+ return changed;
+}
+
+static int
+snd_vortex_a3d_ild_put(snd_kcontrol_t *
+ kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ a3dsrc_t *a = kcontrol->private_data;
+ int changed = 1;
+ int l, r;
+ /* There may be some scale tranlation needed here. */
+ l = ucontrol->value.integer.value[0];
+ r = ucontrol->value.integer.value[1];
+ vortex_a3d_coord2ild(a->ild, l, r);
+ /* Left Right panning. */
+ a3dsrc_SetGainTarget(a, l, r);
+ a3dsrc_SetGainCurrent(a, l, r);
+ return changed;
+}
+
+static int
+snd_vortex_a3d_filter_put(snd_kcontrol_t
+ * kcontrol, snd_ctl_elem_value_t * ucontrol)
+{
+ a3dsrc_t *a = kcontrol->private_data;
+ int i, changed = 1;
+ int params[6];
+ for (i = 0; i < 6; i++)
+ params[i] = ucontrol->value.integer.value[i];
+ /* Translate generic filter params to a3d filter params. */
+ vortex_a3d_translate_filter(a->filter, params);
+ /* Atmospheric absorbtion and filtering. */
+ a3dsrc_SetAtmosTarget(a, a->filter[0],
+ a->filter[1], a->filter[2],
+ a->filter[3], a->filter[4]);
+ a3dsrc_SetAtmosCurrent(a, a->filter[0],
+ a->filter[1], a->filter[2],
+ a->filter[3], a->filter[4]);
+ return changed;
+}
+
+static snd_kcontrol_new_t vortex_a3d_kcontrol __devinitdata = {
+ .iface = SNDRV_CTL_ELEM_IFACE_PCM,
+ .name = "Playback PCM advanced processing",
+ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
+ .info = snd_vortex_a3d_hrtf_info,
+ .get = snd_vortex_a3d_get,
+ .put = snd_vortex_a3d_hrtf_put,
+};
+
+/* Control (un)registration. */
+static int vortex_a3d_register_controls(vortex_t * vortex)
+{
+ snd_kcontrol_t *kcontrol;
+ int err, i;
+ /* HRTF controls. */
+ for (i = 0; i < NR_A3D; i++) {
+ if ((kcontrol =
+ snd_ctl_new1(&vortex_a3d_kcontrol, &vortex->a3d[i])) == NULL)
+ return -ENOMEM;
+ kcontrol->id.numid = CTRLID_HRTF;
+ kcontrol->info = snd_vortex_a3d_hrtf_info;
+ kcontrol->put = snd_vortex_a3d_hrtf_put;
+ if ((err = snd_ctl_add(vortex->card, kcontrol)) < 0)
+ return err;
+ }
+ /* ITD controls. */
+ for (i = 0; i < NR_A3D; i++) {
+ if ((kcontrol =
+ snd_ctl_new1(&vortex_a3d_kcontrol, &vortex->a3d[i])) == NULL)
+ return -ENOMEM;
+ kcontrol->id.numid = CTRLID_ITD;
+ kcontrol->info = snd_vortex_a3d_itd_info;
+ kcontrol->put = snd_vortex_a3d_itd_put;
+ if ((err = snd_ctl_add(vortex->card, kcontrol)) < 0)
+ return err;
+ }
+ /* ILD (gains) controls. */
+ for (i = 0; i < NR_A3D; i++) {
+ if ((kcontrol =
+ snd_ctl_new1(&vortex_a3d_kcontrol, &vortex->a3d[i])) == NULL)
+ return -ENOMEM;
+ kcontrol->id.numid = CTRLID_GAINS;
+ kcontrol->info = snd_vortex_a3d_ild_info;
+ kcontrol->put = snd_vortex_a3d_ild_put;
+ if ((err = snd_ctl_add(vortex->card, kcontrol)) < 0)
+ return err;
+ }
+ /* Filter controls. */
+ for (i = 0; i < NR_A3D; i++) {
+ if ((kcontrol =
+ snd_ctl_new1(&vortex_a3d_kcontrol, &vortex->a3d[i])) == NULL)
+ return -ENOMEM;
+ kcontrol->id.numid = CTRLID_FILTER;
+ kcontrol->info = snd_vortex_a3d_filter_info;
+ kcontrol->put = snd_vortex_a3d_filter_put;
+ if ((err = snd_ctl_add(vortex->card, kcontrol)) < 0)
+ return err;
+ }
+ return 0;
+}
+
+static void vortex_a3d_unregister_controls(vortex_t * vortex)
+{
+
+}
+
+/* End of File*/
diff --git a/sound/pci/au88x0/au88x0_a3d.h b/sound/pci/au88x0/au88x0_a3d.h
new file mode 100644
index 000000000000..0584c65bcab0
--- /dev/null
+++ b/sound/pci/au88x0/au88x0_a3d.h
@@ -0,0 +1,123 @@
+/***************************************************************************
+ * au88x0_a3d.h
+ *
+ * Fri Jul 18 14:16:03 2003
+ * Copyright 2003 mjander
+ * mjander@users.sourceforge.net
+ ****************************************************************************/
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+#ifndef _AU88X0_A3D_H
+#define _AU88X0_A3D_H
+
+//#include <openal.h>
+
+#define HRTF_SZ 0x38
+#define DLINE_SZ 0x28
+
+#define CTRLID_HRTF 1
+#define CTRLID_ITD 2
+#define CTRLID_ILD 4
+#define CTRLID_FILTER 8
+#define CTRLID_GAINS 16
+
+/* 3D parameter structs */
+typedef unsigned short int a3d_Hrtf_t[HRTF_SZ];
+typedef unsigned short int a3d_ItdDline_t[DLINE_SZ];
+typedef unsigned short int a3d_atmos_t[5];
+typedef unsigned short int a3d_LRGains_t[2];
+typedef unsigned short int a3d_Itd_t[2];
+typedef unsigned short int a3d_Ild_t[2];
+
+typedef struct {
+ void *vortex; // Formerly CAsp4HwIO*, now vortex_t*.
+ unsigned int source; /* this_04 */
+ unsigned int slice; /* this_08 */
+ a3d_Hrtf_t hrtf[2];
+ a3d_Itd_t itd;
+ a3d_Ild_t ild;
+ a3d_ItdDline_t dline;
+ a3d_atmos_t filter;
+} a3dsrc_t;
+
+/* First Register bank */
+
+#define A3D_A_HrtfCurrent 0x18000 /* 56 ULONG */
+#define A3D_A_GainCurrent 0x180E0
+#define A3D_A_GainTarget 0x180E4
+#define A3D_A_A12Current 0x180E8 /* Atmospheric current. */
+#define A3D_A_A21Target 0x180EC /* Atmospheric target */
+#define A3D_A_B01Current 0x180F0 /* Atmospheric current */
+#define A3D_A_B10Target 0x180F4 /* Atmospheric target */
+#define A3D_A_B2Current 0x180F8 /* Atmospheric current */
+#define A3D_A_B2Target 0x180FC /* Atmospheric target */
+#define A3D_A_HrtfTarget 0x18100 /* 56 ULONG */
+#define A3D_A_ITDCurrent 0x181E0
+#define A3D_A_ITDTarget 0x181E4
+#define A3D_A_HrtfDelayLine 0x181E8 /* 56 ULONG */
+#define A3D_A_ITDDelayLine 0x182C8 /* 40/45 ULONG */
+#define A3D_A_HrtfTrackTC 0x1837C /* Time Constants */
+#define A3D_A_GainTrackTC 0x18380
+#define A3D_A_CoeffTrackTC 0x18384
+#define A3D_A_ITDTrackTC 0x18388
+#define A3D_A_x1 0x1838C
+#define A3D_A_x2 0x18390
+#define A3D_A_y1 0x18394
+#define A3D_A_y2 0x18398
+#define A3D_A_HrtfOutL 0x1839C
+#define A3D_A_HrtfOutR 0x183A0
+#define A3D_A_TAIL 0x183A4
+
+/* Second register bank */
+#define A3D_B_HrtfCurrent 0x19000 /* 56 ULONG */
+#define A3D_B_GainCurrent 0x190E0
+#define A3D_B_GainTarget 0x190E4
+#define A3D_B_A12Current 0x190E8
+#define A3D_B_A21Target 0x190EC
+#define A3D_B_B01Current 0x190F0
+#define A3D_B_B10Target 0x190F4
+#define A3D_B_B2Current 0x190F8
+#define A3D_B_B2Target 0x190FC
+#define A3D_B_HrtfTarget 0x19100 /* 56 ULONG */
+#define A3D_B_ITDCurrent 0x191E0
+#define A3D_B_ITDTarget 0x191E4
+#define A3D_B_HrtfDelayLine 0x191E8 /* 56 ULONG */
+#define A3D_B_TAIL 0x192C8
+
+/* There are 4 slices, 4 a3d each = 16 a3d sources. */
+#define A3D_SLICE_BANK_A 0x18000 /* 4 sources */
+#define A3D_SLICE_BANK_B 0x19000 /* 4 sources */
+#define A3D_SLICE_VDBDest 0x19C00 /* 8 ULONG */
+#define A3D_SLICE_VDBSource 0x19C20 /* 4 ULONG */
+#define A3D_SLICE_ABReg 0x19C30
+#define A3D_SLICE_CReg 0x19C34
+#define A3D_SLICE_Control 0x19C38
+#define A3D_SLICE_DebugReserved 0x19C3c /* Dangerous! */
+#define A3D_SLICE_Pointers 0x19C40
+#define A3D_SLICE_TAIL 0x1A000
+
+// Slice size: 0x2000
+// Source size: 0x3A4, 0x2C8
+
+/* Address generator macro. */
+#define a3d_addrA(slice,source,reg) (((slice)<<0xd)+((source)*0x3A4)+(reg))
+#define a3d_addrB(slice,source,reg) (((slice)<<0xd)+((source)*0x2C8)+(reg))
+#define a3d_addrS(slice,reg) (((slice)<<0xd)+(reg))
+//#define a3d_addr(slice,source,reg) (((reg)>=0x19000) ? a3d_addr2((slice),(source),(reg)) : a3d_addr1((slice),(source),(reg)))
+
+#endif /* _AU88X0_A3D_H */
diff --git a/sound/pci/au88x0/au88x0_a3ddata.c b/sound/pci/au88x0/au88x0_a3ddata.c
new file mode 100644
index 000000000000..6fab4bba5a05
--- /dev/null
+++ b/sound/pci/au88x0/au88x0_a3ddata.c
@@ -0,0 +1,91 @@
+/***************************************************************************
+ * au88x0_a3ddata.c
+ *
+ * Wed Nov 19 21:11:32 2003
+ * Copyright 2003 mjander
+ * mjander@users.sourceforge.org
+ ****************************************************************************/
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+/* Constant initializer values. */
+
+static const a3d_Hrtf_t A3dHrirZeros = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0,
+ 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0,
+ 0, 0, 0
+};
+
+static const a3d_Hrtf_t A3dHrirImpulse = {
+ 0x7fff, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0,
+ 0, 0, 0
+};
+
+static const a3d_Hrtf_t A3dHrirOnes = {
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff,
+ 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff,
+ 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff,
+ 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff,
+ 0x7fff,
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff
+};
+
+static const a3d_Hrtf_t A3dHrirSatTest = {
+ 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
+ 0x7fff,
+ 0x7fff,
+ 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001, 0x8001,
+ 0x8001,
+ 0x8001,
+ 0x7fff, 0x0000, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+static const a3d_Hrtf_t A3dHrirDImpulse = {
+ 0, 0x7fff, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0,
+ 0, 0, 0
+};
+
+static const a3d_ItdDline_t A3dItdDlineZeros = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+static short const GainTCDefault = 0x300;
+static short const ItdTCDefault = 0x0C8;
+static short const HrtfTCDefault = 0x147;
+static short const CoefTCDefault = 0x300;
diff --git a/sound/pci/au88x0/au88x0_core.c b/sound/pci/au88x0/au88x0_core.c
new file mode 100644
index 000000000000..f0eda4bbbb39
--- /dev/null
+++ b/sound/pci/au88x0/au88x0_core.c
@@ -0,0 +1,2837 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ */
+
+/*
+ Vortex core low level functions.
+
+ Author: Manuel Jander (mjander@users.sourceforge.cl)
+ These functions are mainly the result of translations made
+ from the original disassembly of the au88x0 binary drivers,
+ written by Aureal before they went down.
+ Many thanks to the Jeff Muizelaar, Kester Maddock, and whoever
+ contributed to the OpenVortex project.
+ The author of this file, put the few available pieces together
+ and translated the rest of the riddle (Mix, Src and connection stuff).
+ Some things are still to be discovered, and their meanings are unclear.
+
+ Some of these functions aren't intended to be really used, rather
+ to help to understand how does the AU88X0 chips work. Keep them in, because
+ they could be used somewhere in the future.
+
+ This code hasn't been tested or proof read thoroughly. If you wanna help,
+ take a look at the AU88X0 assembly and check if this matches.
+ Functions tested ok so far are (they show the desired effect
+ at least):
+ vortex_routes(); (1 bug fixed).
+ vortex_adb_addroute();
+ vortex_adb_addroutes();
+ vortex_connect_codecplay();
+ vortex_src_flushbuffers();
+ vortex_adbdma_setmode(); note: still some unknown arguments!
+ vortex_adbdma_startfifo();
+ vortex_adbdma_stopfifo();
+ vortex_fifo_setadbctrl(); note: still some unknown arguments!
+ vortex_mix_setinputvolumebyte();
+ vortex_mix_enableinput();
+ vortex_mixer_addWTD(); (fixed)
+ vortex_connection_adbdma_src_src();
+ vortex_connection_adbdma_src();
+ vortex_src_change_convratio();
+ vortex_src_addWTD(); (fixed)
+
+ History:
+
+ 01-03-2003 First revision.
+ 01-21-2003 Some bug fixes.
+ 17-02-2003 many bugfixes after a big versioning mess.
+ 18-02-2003 JAAAAAHHHUUUUUU!!!! The mixer works !! I'm just so happy !
+ (2 hours later...) I cant believe it! Im really lucky today.
+ Now the SRC is working too! Yeah! XMMS works !
+ 20-02-2003 First steps into the ALSA world.
+ 28-02-2003 As my birthday present, i discovered how the DMA buffer pages really
+ work :-). It was all wrong.
+ 12-03-2003 ALSA driver starts working (2 channels).
+ 16-03-2003 More srcblock_setupchannel discoveries.
+ 12-04-2003 AU8830 playback support. Recording in the works.
+ 17-04-2003 vortex_route() and vortex_routes() bug fixes. AU8830 recording
+ works now, but chipn' dale effect is still there.
+ 16-05-2003 SrcSetupChannel cleanup. Moved the Src setup stuff entirely
+ into au88x0_pcm.c .
+ 06-06-2003 Buffer shifter bugfix. Mixer volume fix.
+ 07-12-2003 A3D routing finally fixed. Believed to be OK.
+ 25-03-2004 Many thanks to Claudia, for such valuable bug reports.
+
+*/
+
+#include "au88x0.h"
+#include "au88x0_a3d.h"
+#include <linux/delay.h>
+
+/* MIXER (CAsp4Mix.s and CAsp4Mixer.s) */
+
+// FIXME: get rid of this.
+static int mchannels[NR_MIXIN];
+static int rampchs[NR_MIXIN];
+
+static void vortex_mixer_en_sr(vortex_t * vortex, int channel)
+{
+ hwwrite(vortex->mmio, VORTEX_MIXER_SR,
+ hwread(vortex->mmio, VORTEX_MIXER_SR) | (0x1 << channel));
+}
+static void vortex_mixer_dis_sr(vortex_t * vortex, int channel)
+{
+ hwwrite(vortex->mmio, VORTEX_MIXER_SR,
+ hwread(vortex->mmio, VORTEX_MIXER_SR) & ~(0x1 << channel));
+}
+
+#if 0
+static void
+vortex_mix_muteinputgain(vortex_t * vortex, unsigned char mix,
+ unsigned char channel)
+{
+ hwwrite(vortex->mmio, VORTEX_MIX_INVOL_A + ((mix << 5) + channel),
+ 0x80);
+ hwwrite(vortex->mmio, VORTEX_MIX_INVOL_B + ((mix << 5) + channel),
+ 0x80);
+}
+
+static int vortex_mix_getvolume(vortex_t * vortex, unsigned char mix)
+{
+ int a;
+ a = hwread(vortex->mmio, VORTEX_MIX_VOL_A + (mix << 2)) & 0xff;
+ //FP2LinearFrac(a);
+ return (a);
+}
+
+static int
+vortex_mix_getinputvolume(vortex_t * vortex, unsigned char mix,
+ int channel, int *vol)
+{
+ int a;
+ if (!(mchannels[mix] & (1 << channel)))
+ return 0;
+ a = hwread(vortex->mmio,
+ VORTEX_MIX_INVOL_A + (((mix << 5) + channel) << 2));
+ /*
+ if (rampchs[mix] == 0)
+ a = FP2LinearFrac(a);
+ else
+ a = FP2LinearFracWT(a);
+ */
+ *vol = a;
+ return (0);
+}
+
+static unsigned int vortex_mix_boost6db(unsigned char vol)
+{
+ return (vol + 8); /* WOW! what a complex function! */
+}
+
+static void vortex_mix_rampvolume(vortex_t * vortex, int mix)
+{
+ int ch;
+ char a;
+ // This function is intended for ramping down only (see vortex_disableinput()).
+ for (ch = 0; ch < 0x20; ch++) {
+ if (((1 << ch) & rampchs[mix]) == 0)
+ continue;
+ a = hwread(vortex->mmio,
+ VORTEX_MIX_INVOL_B + (((mix << 5) + ch) << 2));
+ if (a > -126) {
+ a -= 2;
+ hwwrite(vortex->mmio,
+ VORTEX_MIX_INVOL_A +
+ (((mix << 5) + ch) << 2), a);
+ hwwrite(vortex->mmio,
+ VORTEX_MIX_INVOL_B +
+ (((mix << 5) + ch) << 2), a);
+ } else
+ vortex_mix_killinput(vortex, mix, ch);
+ }
+}
+
+static int
+vortex_mix_getenablebit(vortex_t * vortex, unsigned char mix, int mixin)
+{
+ int addr, temp;
+ if (mixin >= 0)
+ addr = mixin;
+ else
+ addr = mixin + 3;
+ addr = ((mix << 3) + (addr >> 2)) << 2;
+ temp = hwread(vortex->mmio, VORTEX_MIX_ENIN + addr);
+ return ((temp >> (mixin & 3)) & 1);
+}
+#endif
+static void
+vortex_mix_setvolumebyte(vortex_t * vortex, unsigned char mix,
+ unsigned char vol)
+{
+ int temp;
+ hwwrite(vortex->mmio, VORTEX_MIX_VOL_A + (mix << 2), vol);
+ if (1) { /*if (this_10) */
+ temp = hwread(vortex->mmio, VORTEX_MIX_VOL_B + (mix << 2));
+ if ((temp != 0x80) || (vol == 0x80))
+ return;
+ }
+ hwwrite(vortex->mmio, VORTEX_MIX_VOL_B + (mix << 2), vol);
+}
+
+static void
+vortex_mix_setinputvolumebyte(vortex_t * vortex, unsigned char mix,
+ int mixin, unsigned char vol)
+{
+ int temp;
+
+ hwwrite(vortex->mmio,
+ VORTEX_MIX_INVOL_A + (((mix << 5) + mixin) << 2), vol);
+ if (1) { /* this_10, initialized to 1. */
+ temp =
+ hwread(vortex->mmio,
+ VORTEX_MIX_INVOL_B + (((mix << 5) + mixin) << 2));
+ if ((temp != 0x80) || (vol == 0x80))
+ return;
+ }
+ hwwrite(vortex->mmio,
+ VORTEX_MIX_INVOL_B + (((mix << 5) + mixin) << 2), vol);
+}
+
+static void
+vortex_mix_setenablebit(vortex_t * vortex, unsigned char mix, int mixin, int en)
+{
+ int temp, addr;
+
+ if (mixin < 0)
+ addr = (mixin + 3);
+ else
+ addr = mixin;
+ addr = ((mix << 3) + (addr >> 2)) << 2;
+ temp = hwread(vortex->mmio, VORTEX_MIX_ENIN + addr);
+ if (en)
+ temp |= (1 << (mixin & 3));
+ else
+ temp &= ~(1 << (mixin & 3));
+ /* Mute input. Astatic void crackling? */
+ hwwrite(vortex->mmio,
+ VORTEX_MIX_INVOL_B + (((mix << 5) + mixin) << 2), 0x80);
+ /* Looks like clear buffer. */
+ hwwrite(vortex->mmio, VORTEX_MIX_SMP + (mixin << 2), 0x0);
+ hwwrite(vortex->mmio, VORTEX_MIX_SMP + 4 + (mixin << 2), 0x0);
+ /* Write enable bit. */
+ hwwrite(vortex->mmio, VORTEX_MIX_ENIN + addr, temp);
+}
+
+static void
+vortex_mix_killinput(vortex_t * vortex, unsigned char mix, int mixin)
+{
+ rampchs[mix] &= ~(1 << mixin);
+ vortex_mix_setinputvolumebyte(vortex, mix, mixin, 0x80);
+ mchannels[mix] &= ~(1 << mixin);
+ vortex_mix_setenablebit(vortex, mix, mixin, 0);
+}
+
+static void
+vortex_mix_enableinput(vortex_t * vortex, unsigned char mix, int mixin)
+{
+ vortex_mix_killinput(vortex, mix, mixin);
+ if ((mchannels[mix] & (1 << mixin)) == 0) {
+ vortex_mix_setinputvolumebyte(vortex, mix, mixin, 0x80); /*0x80 : mute */
+ mchannels[mix] |= (1 << mixin);
+ }
+ vortex_mix_setenablebit(vortex, mix, mixin, 1);
+}
+
+static void
+vortex_mix_disableinput(vortex_t * vortex, unsigned char mix, int channel,
+ int ramp)
+{
+ if (ramp) {
+ rampchs[mix] |= (1 << channel);
+ // Register callback.
+ //vortex_mix_startrampvolume(vortex);
+ vortex_mix_killinput(vortex, mix, channel);
+ } else
+ vortex_mix_killinput(vortex, mix, channel);
+}
+
+static int
+vortex_mixer_addWTD(vortex_t * vortex, unsigned char mix, unsigned char ch)
+{
+ int temp, lifeboat = 0, prev;
+
+ temp = hwread(vortex->mmio, VORTEX_MIXER_SR);
+ if ((temp & (1 << ch)) == 0) {
+ hwwrite(vortex->mmio, VORTEX_MIXER_CHNBASE + (ch << 2), mix);
+ vortex_mixer_en_sr(vortex, ch);
+ return 1;
+ }
+ prev = VORTEX_MIXER_CHNBASE + (ch << 2);
+ temp = hwread(vortex->mmio, prev);
+ while (temp & 0x10) {
+ prev = VORTEX_MIXER_RTBASE + ((temp & 0xf) << 2);
+ temp = hwread(vortex->mmio, prev);
+ //printk(KERN_INFO "vortex: mixAddWTD: while addr=%x, val=%x\n", prev, temp);
+ if ((++lifeboat) > 0xf) {
+ printk(KERN_ERR
+ "vortex_mixer_addWTD: lifeboat overflow\n");
+ return 0;
+ }
+ }
+ hwwrite(vortex->mmio, VORTEX_MIXER_RTBASE + ((temp & 0xf) << 2), mix);
+ hwwrite(vortex->mmio, prev, (temp & 0xf) | 0x10);
+ return 1;
+}
+
+static int
+vortex_mixer_delWTD(vortex_t * vortex, unsigned char mix, unsigned char ch)
+{
+ int esp14 = -1, esp18, eax, ebx, edx, ebp, esi = 0;
+ //int esp1f=edi(while)=src, esp10=ch;
+
+ eax = hwread(vortex->mmio, VORTEX_MIXER_SR);
+ if (((1 << ch) & eax) == 0) {
+ printk(KERN_ERR "mix ALARM %x\n", eax);
+ return 0;
+ }
+ ebp = VORTEX_MIXER_CHNBASE + (ch << 2);
+ esp18 = hwread(vortex->mmio, ebp);
+ if (esp18 & 0x10) {
+ ebx = (esp18 & 0xf);
+ if (mix == ebx) {
+ ebx = VORTEX_MIXER_RTBASE + (mix << 2);
+ edx = hwread(vortex->mmio, ebx);
+ //7b60
+ hwwrite(vortex->mmio, ebp, edx);
+ hwwrite(vortex->mmio, ebx, 0);
+ } else {
+ //7ad3
+ edx =
+ hwread(vortex->mmio,
+ VORTEX_MIXER_RTBASE + (ebx << 2));
+ //printk(KERN_INFO "vortex: mixdelWTD: 1 addr=%x, val=%x, src=%x\n", ebx, edx, src);
+ while ((edx & 0xf) != mix) {
+ if ((esi) > 0xf) {
+ printk(KERN_ERR
+ "vortex: mixdelWTD: error lifeboat overflow\n");
+ return 0;
+ }
+ esp14 = ebx;
+ ebx = edx & 0xf;
+ ebp = ebx << 2;
+ edx =
+ hwread(vortex->mmio,
+ VORTEX_MIXER_RTBASE + ebp);
+ //printk(KERN_INFO "vortex: mixdelWTD: while addr=%x, val=%x\n", ebp, edx);
+ esi++;
+ }
+ //7b30
+ ebp = ebx << 2;
+ if (edx & 0x10) { /* Delete entry in between others */
+ ebx = VORTEX_MIXER_RTBASE + ((edx & 0xf) << 2);
+ edx = hwread(vortex->mmio, ebx);
+ //7b60
+ hwwrite(vortex->mmio,
+ VORTEX_MIXER_RTBASE + ebp, edx);
+ hwwrite(vortex->mmio, ebx, 0);
+ //printk(KERN_INFO "vortex mixdelWTD between addr= 0x%x, val= 0x%x\n", ebp, edx);
+ } else { /* Delete last entry */
+ //7b83
+ if (esp14 == -1)
+ hwwrite(vortex->mmio,
+ VORTEX_MIXER_CHNBASE +
+ (ch << 2), esp18 & 0xef);
+ else {
+ ebx = (0xffffffe0 & edx) | (0xf & ebx);
+ hwwrite(vortex->mmio,
+ VORTEX_MIXER_RTBASE +
+ (esp14 << 2), ebx);
+ //printk(KERN_INFO "vortex mixdelWTD last addr= 0x%x, val= 0x%x\n", esp14, ebx);
+ }
+ hwwrite(vortex->mmio,
+ VORTEX_MIXER_RTBASE + ebp, 0);
+ return 1;
+ }
+ }
+ } else {
+ //printk(KERN_INFO "removed last mix\n");
+ //7be0
+ vortex_mixer_dis_sr(vortex, ch);
+ hwwrite(vortex->mmio, ebp, 0);
+ }
+ return 1;
+}
+
+static void vortex_mixer_init(vortex_t * vortex)
+{
+ unsigned long addr;
+ int x;
+
+ // FIXME: get rid of this crap.
+ memset(mchannels, 0, NR_MIXOUT * sizeof(int));
+ memset(rampchs, 0, NR_MIXOUT * sizeof(int));
+
+ addr = VORTEX_MIX_SMP + 0x17c;
+ for (x = 0x5f; x >= 0; x--) {
+ hwwrite(vortex->mmio, addr, 0);
+ addr -= 4;
+ }
+ addr = VORTEX_MIX_ENIN + 0x1fc;
+ for (x = 0x7f; x >= 0; x--) {
+ hwwrite(vortex->mmio, addr, 0);
+ addr -= 4;
+ }
+ addr = VORTEX_MIX_SMP + 0x17c;
+ for (x = 0x5f; x >= 0; x--) {
+ hwwrite(vortex->mmio, addr, 0);
+ addr -= 4;
+ }
+ addr = VORTEX_MIX_INVOL_A + 0x7fc;
+ for (x = 0x1ff; x >= 0; x--) {
+ hwwrite(vortex->mmio, addr, 0x80);
+ addr -= 4;
+ }
+ addr = VORTEX_MIX_VOL_A + 0x3c;
+ for (x = 0xf; x >= 0; x--) {
+ hwwrite(vortex->mmio, addr, 0x80);
+ addr -= 4;
+ }
+ addr = VORTEX_MIX_INVOL_B + 0x7fc;
+ for (x = 0x1ff; x >= 0; x--) {
+ hwwrite(vortex->mmio, addr, 0x80);
+ addr -= 4;
+ }
+ addr = VORTEX_MIX_VOL_B + 0x3c;
+ for (x = 0xf; x >= 0; x--) {
+ hwwrite(vortex->mmio, addr, 0x80);
+ addr -= 4;
+ }
+ addr = VORTEX_MIXER_RTBASE + (MIXER_RTBASE_SIZE - 1) * 4;
+ for (x = (MIXER_RTBASE_SIZE - 1); x >= 0; x--) {
+ hwwrite(vortex->mmio, addr, 0x0);
+ addr -= 4;
+ }
+ hwwrite(vortex->mmio, VORTEX_MIXER_SR, 0);
+
+ /* Set clipping ceiling (this may be all wrong). */
+ /*
+ for (x = 0; x > 0x80; x++) {
+ hwwrite(vortex->mmio, VORTEX_MIXER_CLIP + (x << 2), 0x3ffff);
+ }
+ */
+ /*
+ call CAsp4Mix__Initialize_CAsp4HwIO____CAsp4Mixer____
+ Register ISR callback for volume smooth fade out.
+ Maybe this avoids clicks when press "stop" ?
+ */
+}
+
+/* SRC (CAsp4Src.s and CAsp4SrcBlock) */
+
+static void vortex_src_en_sr(vortex_t * vortex, int channel)
+{
+ hwwrite(vortex->mmio, VORTEX_SRCBLOCK_SR,
+ hwread(vortex->mmio, VORTEX_SRCBLOCK_SR) | (0x1 << channel));
+}
+
+static void vortex_src_dis_sr(vortex_t * vortex, int channel)
+{
+ hwwrite(vortex->mmio, VORTEX_SRCBLOCK_SR,
+ hwread(vortex->mmio, VORTEX_SRCBLOCK_SR) & ~(0x1 << channel));
+}
+
+static void vortex_src_flushbuffers(vortex_t * vortex, unsigned char src)
+{
+ int i;
+
+ for (i = 0x1f; i >= 0; i--)
+ hwwrite(vortex->mmio,
+ VORTEX_SRC_DATA0 + (src << 7) + (i << 2), 0);
+ hwwrite(vortex->mmio, VORTEX_SRC_DATA + (src << 3), 0);
+ hwwrite(vortex->mmio, VORTEX_SRC_DATA + (src << 3) + 4, 0);
+}
+
+static void vortex_src_cleardrift(vortex_t * vortex, unsigned char src)
+{
+ hwwrite(vortex->mmio, VORTEX_SRC_DRIFT0 + (src << 2), 0);
+ hwwrite(vortex->mmio, VORTEX_SRC_DRIFT1 + (src << 2), 0);
+ hwwrite(vortex->mmio, VORTEX_SRC_DRIFT2 + (src << 2), 1);
+}
+
+static void
+vortex_src_set_throttlesource(vortex_t * vortex, unsigned char src, int en)
+{
+ int temp;
+
+ temp = hwread(vortex->mmio, VORTEX_SRC_SOURCE);
+ if (en)
+ temp |= 1 << src;
+ else
+ temp &= ~(1 << src);
+ hwwrite(vortex->mmio, VORTEX_SRC_SOURCE, temp);
+}
+
+static int
+vortex_src_persist_convratio(vortex_t * vortex, unsigned char src, int ratio)
+{
+ int temp, lifeboat = 0;
+
+ do {
+ hwwrite(vortex->mmio, VORTEX_SRC_CONVRATIO + (src << 2), ratio);
+ temp = hwread(vortex->mmio, VORTEX_SRC_CONVRATIO + (src << 2));
+ if ((++lifeboat) > 0x9) {
+ printk(KERN_ERR "Vortex: Src cvr fail\n");
+ break;
+ }
+ }
+ while (temp != ratio);
+ return temp;
+}
+
+#if 0
+static void vortex_src_slowlock(vortex_t * vortex, unsigned char src)
+{
+ int temp;
+
+ hwwrite(vortex->mmio, VORTEX_SRC_DRIFT2 + (src << 2), 1);
+ hwwrite(vortex->mmio, VORTEX_SRC_DRIFT0 + (src << 2), 0);
+ temp = hwread(vortex->mmio, VORTEX_SRC_U0 + (src << 2));
+ if (temp & 0x200)
+ hwwrite(vortex->mmio, VORTEX_SRC_U0 + (src << 2),
+ temp & ~0x200L);
+}
+
+static void
+vortex_src_change_convratio(vortex_t * vortex, unsigned char src, int ratio)
+{
+ int temp, a;
+
+ if ((ratio & 0x10000) && (ratio != 0x10000)) {
+ if (ratio & 0x3fff)
+ a = (0x11 - ((ratio >> 0xe) & 0x3)) - 1;
+ else
+ a = (0x11 - ((ratio >> 0xe) & 0x3)) - 2;
+ } else
+ a = 0xc;
+ temp = hwread(vortex->mmio, VORTEX_SRC_U0 + (src << 2));
+ if (((temp >> 4) & 0xf) != a)
+ hwwrite(vortex->mmio, VORTEX_SRC_U0 + (src << 2),
+ (temp & 0xf) | ((a & 0xf) << 4));
+
+ vortex_src_persist_convratio(vortex, src, ratio);
+}
+
+static int
+vortex_src_checkratio(vortex_t * vortex, unsigned char src,
+ unsigned int desired_ratio)
+{
+ int hw_ratio, lifeboat = 0;
+
+ hw_ratio = hwread(vortex->mmio, VORTEX_SRC_CONVRATIO + (src << 2));
+
+ while (hw_ratio != desired_ratio) {
+ hwwrite(vortex->mmio, VORTEX_SRC_CONVRATIO + (src << 2), desired_ratio);
+
+ if ((lifeboat++) > 15) {
+ printk(KERN_ERR "Vortex: could not set src-%d from %d to %d\n",
+ src, hw_ratio, desired_ratio);
+ break;
+ }
+ }
+
+ return hw_ratio;
+}
+
+#endif
+/*
+ Objective: Set samplerate for given SRC module.
+ Arguments:
+ card: pointer to vortex_t strcut.
+ src: Integer index of the SRC module.
+ cr: Current sample rate conversion factor.
+ b: unknown 16 bit value.
+ sweep: Enable Samplerate fade from cr toward tr flag.
+ dirplay: 1: playback, 0: recording.
+ sl: Slow Lock flag.
+ tr: Target samplerate conversion.
+ thsource: Throttle source flag (no idea what that means).
+*/
+static void vortex_src_setupchannel(vortex_t * card, unsigned char src,
+ unsigned int cr, unsigned int b, int sweep, int d,
+ int dirplay, int sl, unsigned int tr, int thsource)
+{
+ // noplayback: d=2,4,7,0xa,0xb when using first 2 src's.
+ // c: enables pitch sweep.
+ // looks like g is c related. Maybe g is a sweep parameter ?
+ // g = cvr
+ // dirplay: 0 = recording, 1 = playback
+ // d = src hw index.
+
+ int esi, ebp = 0, esp10;
+
+ vortex_src_flushbuffers(card, src);
+
+ if (sweep) {
+ if ((tr & 0x10000) && (tr != 0x10000)) {
+ tr = 0;
+ esi = 0x7;
+ } else {
+ if ((((short)tr) < 0) && (tr != 0x8000)) {
+ tr = 0;
+ esi = 0x8;
+ } else {
+ tr = 1;
+ esi = 0xc;
+ }
+ }
+ } else {
+ if ((cr & 0x10000) && (cr != 0x10000)) {
+ tr = 0; /*ebx = 0 */
+ esi = 0x11 - ((cr >> 0xe) & 7);
+ if (cr & 0x3fff)
+ esi -= 1;
+ else
+ esi -= 2;
+ } else {
+ tr = 1;
+ esi = 0xc;
+ }
+ }
+ vortex_src_cleardrift(card, src);
+ vortex_src_set_throttlesource(card, src, thsource);
+
+ if ((dirplay == 0) && (sweep == 0)) {
+ if (tr)
+ esp10 = 0xf;
+ else
+ esp10 = 0xc;
+ ebp = 0;
+ } else {
+ if (tr)
+ ebp = 0xf;
+ else
+ ebp = 0xc;
+ esp10 = 0;
+ }
+ hwwrite(card->mmio, VORTEX_SRC_U0 + (src << 2),
+ (sl << 0x9) | (sweep << 0x8) | ((esi & 0xf) << 4) | d);
+ /* 0xc0 esi=0xc c=f=0 d=0 */
+ vortex_src_persist_convratio(card, src, cr);
+ hwwrite(card->mmio, VORTEX_SRC_U1 + (src << 2), b & 0xffff);
+ /* 0 b=0 */
+ hwwrite(card->mmio, VORTEX_SRC_U2 + (src << 2),
+ (tr << 0x11) | (dirplay << 0x10) | (ebp << 0x8) | esp10);
+ /* 0x30f00 e=g=1 esp10=0 ebp=f */
+ //printk(KERN_INFO "vortex: SRC %d, d=0x%x, esi=0x%x, esp10=0x%x, ebp=0x%x\n", src, d, esi, esp10, ebp);
+}
+
+static void vortex_srcblock_init(vortex_t * vortex)
+{
+ unsigned long addr;
+ int x;
+ hwwrite(vortex->mmio, VORTEX_SRC_SOURCESIZE, 0x1ff);
+ /*
+ for (x=0; x<0x10; x++) {
+ vortex_src_init(&vortex_src[x], x);
+ }
+ */
+ //addr = 0xcc3c;
+ //addr = 0x26c3c;
+ addr = VORTEX_SRC_RTBASE + 0x3c;
+ for (x = 0xf; x >= 0; x--) {
+ hwwrite(vortex->mmio, addr, 0);
+ addr -= 4;
+ }
+ //addr = 0xcc94;
+ //addr = 0x26c94;
+ addr = VORTEX_SRC_CHNBASE + 0x54;
+ for (x = 0x15; x >= 0; x--) {
+ hwwrite(vortex->mmio, addr, 0);
+ addr -= 4;
+ }
+}
+
+static int
+vortex_src_addWTD(vortex_t * vortex, unsigned char src, unsigned char ch)
+{
+ int temp, lifeboat = 0, prev;
+ // esp13 = src
+
+ temp = hwread(vortex->mmio, VORTEX_SRCBLOCK_SR);
+ if ((temp & (1 << ch)) == 0) {
+ hwwrite(vortex->mmio, VORTEX_SRC_CHNBASE + (ch << 2), src);
+ vortex_src_en_sr(vortex, ch);
+ return 1;
+ }
+ prev = VORTEX_SRC_CHNBASE + (ch << 2); /*ebp */
+ temp = hwread(vortex->mmio, prev);
+ //while (temp & NR_SRC) {
+ while (temp & 0x10) {
+ prev = VORTEX_SRC_RTBASE + ((temp & 0xf) << 2); /*esp12 */
+ //prev = VORTEX_SRC_RTBASE + ((temp & (NR_SRC-1)) << 2); /*esp12*/
+ temp = hwread(vortex->mmio, prev);
+ //printk(KERN_INFO "vortex: srcAddWTD: while addr=%x, val=%x\n", prev, temp);
+ if ((++lifeboat) > 0xf) {
+ printk(KERN_ERR
+ "vortex_src_addWTD: lifeboat overflow\n");
+ return 0;
+ }
+ }
+ hwwrite(vortex->mmio, VORTEX_SRC_RTBASE + ((temp & 0xf) << 2), src);
+ //hwwrite(vortex->mmio, prev, (temp & (NR_SRC-1)) | NR_SRC);
+ hwwrite(vortex->mmio, prev, (temp & 0xf) | 0x10);
+ return 1;
+}
+
+static int
+vortex_src_delWTD(vortex_t * vortex, unsigned char src, unsigned char ch)
+{
+ int esp14 = -1, esp18, eax, ebx, edx, ebp, esi = 0;
+ //int esp1f=edi(while)=src, esp10=ch;
+
+ eax = hwread(vortex->mmio, VORTEX_SRCBLOCK_SR);
+ if (((1 << ch) & eax) == 0) {
+ printk(KERN_ERR "src alarm\n");
+ return 0;
+ }
+ ebp = VORTEX_SRC_CHNBASE + (ch << 2);
+ esp18 = hwread(vortex->mmio, ebp);
+ if (esp18 & 0x10) {
+ ebx = (esp18 & 0xf);
+ if (src == ebx) {
+ ebx = VORTEX_SRC_RTBASE + (src << 2);
+ edx = hwread(vortex->mmio, ebx);
+ //7b60
+ hwwrite(vortex->mmio, ebp, edx);
+ hwwrite(vortex->mmio, ebx, 0);
+ } else {
+ //7ad3
+ edx =
+ hwread(vortex->mmio,
+ VORTEX_SRC_RTBASE + (ebx << 2));
+ //printk(KERN_INFO "vortex: srcdelWTD: 1 addr=%x, val=%x, src=%x\n", ebx, edx, src);
+ while ((edx & 0xf) != src) {
+ if ((esi) > 0xf) {
+ printk
+ ("vortex: srcdelWTD: error, lifeboat overflow\n");
+ return 0;
+ }
+ esp14 = ebx;
+ ebx = edx & 0xf;
+ ebp = ebx << 2;
+ edx =
+ hwread(vortex->mmio,
+ VORTEX_SRC_RTBASE + ebp);
+ //printk(KERN_INFO "vortex: srcdelWTD: while addr=%x, val=%x\n", ebp, edx);
+ esi++;
+ }
+ //7b30
+ ebp = ebx << 2;
+ if (edx & 0x10) { /* Delete entry in between others */
+ ebx = VORTEX_SRC_RTBASE + ((edx & 0xf) << 2);
+ edx = hwread(vortex->mmio, ebx);
+ //7b60
+ hwwrite(vortex->mmio,
+ VORTEX_SRC_RTBASE + ebp, edx);
+ hwwrite(vortex->mmio, ebx, 0);
+ //printk(KERN_INFO "vortex srcdelWTD between addr= 0x%x, val= 0x%x\n", ebp, edx);
+ } else { /* Delete last entry */
+ //7b83
+ if (esp14 == -1)
+ hwwrite(vortex->mmio,
+ VORTEX_SRC_CHNBASE +
+ (ch << 2), esp18 & 0xef);
+ else {
+ ebx = (0xffffffe0 & edx) | (0xf & ebx);
+ hwwrite(vortex->mmio,
+ VORTEX_SRC_RTBASE +
+ (esp14 << 2), ebx);
+ //printk(KERN_INFO"vortex srcdelWTD last addr= 0x%x, val= 0x%x\n", esp14, ebx);
+ }
+ hwwrite(vortex->mmio,
+ VORTEX_SRC_RTBASE + ebp, 0);
+ return 1;
+ }
+ }
+ } else {
+ //7be0
+ vortex_src_dis_sr(vortex, ch);
+ hwwrite(vortex->mmio, ebp, 0);
+ }
+ return 1;
+}
+
+ /*FIFO*/
+
+static void
+vortex_fifo_clearadbdata(vortex_t * vortex, int fifo, int x)
+{
+ for (x--; x >= 0; x--)
+ hwwrite(vortex->mmio,
+ VORTEX_FIFO_ADBDATA +
+ (((fifo << FIFO_SIZE_BITS) + x) << 2), 0);
+}
+
+#if 0
+static void vortex_fifo_adbinitialize(vortex_t * vortex, int fifo, int j)
+{
+ vortex_fifo_clearadbdata(vortex, fifo, FIFO_SIZE);
+#ifdef CHIP_AU8820
+ hwwrite(vortex->mmio, VORTEX_FIFO_ADBCTRL + (fifo << 2),
+ (FIFO_U1 | ((j & FIFO_MASK) << 0xb)));
+#else
+ hwwrite(vortex->mmio, VORTEX_FIFO_ADBCTRL + (fifo << 2),
+ (FIFO_U1 | ((j & FIFO_MASK) << 0xc)));
+#endif
+}
+#endif
+static void vortex_fifo_setadbvalid(vortex_t * vortex, int fifo, int en)
+{
+ hwwrite(vortex->mmio, VORTEX_FIFO_ADBCTRL + (fifo << 2),
+ (hwread(vortex->mmio, VORTEX_FIFO_ADBCTRL + (fifo << 2)) &
+ 0xffffffef) | ((1 & en) << 4) | FIFO_U1);
+}
+
+static void
+vortex_fifo_setadbctrl(vortex_t * vortex, int fifo, int b, int priority,
+ int empty, int valid, int f)
+{
+ int temp, lifeboat = 0;
+ //int this_8[NR_ADB] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; /* position */
+ int this_4 = 0x2;
+ /* f seems priority related.
+ * CAsp4AdbDma::SetPriority is the only place that calls SetAdbCtrl with f set to 1
+ * every where else it is set to 0. It seems, however, that CAsp4AdbDma::SetPriority
+ * is never called, thus the f related bits remain a mystery for now.
+ */
+ do {
+ temp = hwread(vortex->mmio, VORTEX_FIFO_ADBCTRL + (fifo << 2));
+ if (lifeboat++ > 0xbb8) {
+ printk(KERN_ERR
+ "Vortex: vortex_fifo_setadbctrl fail\n");
+ break;
+ }
+ }
+ while (temp & FIFO_RDONLY);
+
+ // AU8830 semes to take some special care about fifo content (data).
+ // But i'm just to lazy to translate that :)
+ if (valid) {
+ if ((temp & FIFO_VALID) == 0) {
+ //this_8[fifo] = 0;
+ vortex_fifo_clearadbdata(vortex, fifo, FIFO_SIZE); // this_4
+#ifdef CHIP_AU8820
+ temp = (this_4 & 0x1f) << 0xb;
+#else
+ temp = (this_4 & 0x3f) << 0xc;
+#endif
+ temp = (temp & 0xfffffffd) | ((b & 1) << 1);
+ temp = (temp & 0xfffffff3) | ((priority & 3) << 2);
+ temp = (temp & 0xffffffef) | ((valid & 1) << 4);
+ temp |= FIFO_U1;
+ temp = (temp & 0xffffffdf) | ((empty & 1) << 5);
+#ifdef CHIP_AU8820
+ temp = (temp & 0xfffbffff) | ((f & 1) << 0x12);
+#endif
+#ifdef CHIP_AU8830
+ temp = (temp & 0xf7ffffff) | ((f & 1) << 0x1b);
+ temp = (temp & 0xefffffff) | ((f & 1) << 0x1c);
+#endif
+#ifdef CHIP_AU8810
+ temp = (temp & 0xfeffffff) | ((f & 1) << 0x18);
+ temp = (temp & 0xfdffffff) | ((f & 1) << 0x19);
+#endif
+ }
+ } else {
+ if (temp & FIFO_VALID) {
+#ifdef CHIP_AU8820
+ temp = ((f & 1) << 0x12) | (temp & 0xfffbffef);
+#endif
+#ifdef CHIP_AU8830
+ temp =
+ ((f & 1) << 0x1b) | (temp & 0xe7ffffef) | FIFO_BITS;
+#endif
+#ifdef CHIP_AU8810
+ temp =
+ ((f & 1) << 0x18) | (temp & 0xfcffffef) | FIFO_BITS;
+#endif
+ } else
+ /*if (this_8[fifo]) */
+ vortex_fifo_clearadbdata(vortex, fifo, FIFO_SIZE);
+ }
+ hwwrite(vortex->mmio, VORTEX_FIFO_ADBCTRL + (fifo << 2), temp);
+ hwread(vortex->mmio, VORTEX_FIFO_ADBCTRL + (fifo << 2));
+}
+
+#ifndef CHIP_AU8810
+static void vortex_fifo_clearwtdata(vortex_t * vortex, int fifo, int x)
+{
+ if (x < 1)
+ return;
+ for (x--; x >= 0; x--)
+ hwwrite(vortex->mmio,
+ VORTEX_FIFO_WTDATA +
+ (((fifo << FIFO_SIZE_BITS) + x) << 2), 0);
+}
+
+static void vortex_fifo_wtinitialize(vortex_t * vortex, int fifo, int j)
+{
+ vortex_fifo_clearwtdata(vortex, fifo, FIFO_SIZE);
+#ifdef CHIP_AU8820
+ hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2),
+ (FIFO_U1 | ((j & FIFO_MASK) << 0xb)));
+#else
+ hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2),
+ (FIFO_U1 | ((j & FIFO_MASK) << 0xc)));
+#endif
+}
+
+static void vortex_fifo_setwtvalid(vortex_t * vortex, int fifo, int en)
+{
+ hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2),
+ (hwread(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2)) &
+ 0xffffffef) | ((en & 1) << 4) | FIFO_U1);
+}
+
+static void
+vortex_fifo_setwtctrl(vortex_t * vortex, int fifo, int ctrl, int priority,
+ int empty, int valid, int f)
+{
+ int temp = 0, lifeboat = 0;
+ int this_4 = 2;
+
+ do {
+ temp = hwread(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2));
+ if (lifeboat++ > 0xbb8) {
+ printk(KERN_ERR "Vortex: vortex_fifo_setwtctrl fail\n");
+ break;
+ }
+ }
+ while (temp & FIFO_RDONLY);
+
+ if (valid) {
+ if ((temp & FIFO_VALID) == 0) {
+ vortex_fifo_clearwtdata(vortex, fifo, FIFO_SIZE); // this_4
+#ifdef CHIP_AU8820
+ temp = (this_4 & 0x1f) << 0xb;
+#else
+ temp = (this_4 & 0x3f) << 0xc;
+#endif
+ temp = (temp & 0xfffffffd) | ((ctrl & 1) << 1);
+ temp = (temp & 0xfffffff3) | ((priority & 3) << 2);
+ temp = (temp & 0xffffffef) | ((valid & 1) << 4);
+ temp |= FIFO_U1;
+ temp = (temp & 0xffffffdf) | ((empty & 1) << 5);
+#ifdef CHIP_AU8820
+ temp = (temp & 0xfffbffff) | ((f & 1) << 0x12);
+#endif
+#ifdef CHIP_AU8830
+ temp = (temp & 0xf7ffffff) | ((f & 1) << 0x1b);
+ temp = (temp & 0xefffffff) | ((f & 1) << 0x1c);
+#endif
+#ifdef CHIP_AU8810
+ temp = (temp & 0xfeffffff) | ((f & 1) << 0x18);
+ temp = (temp & 0xfdffffff) | ((f & 1) << 0x19);
+#endif
+ }
+ } else {
+ if (temp & FIFO_VALID) {
+#ifdef CHIP_AU8820
+ temp = ((f & 1) << 0x12) | (temp & 0xfffbffef);
+#endif
+#ifdef CHIP_AU8830
+ temp =
+ ((f & 1) << 0x1b) | (temp & 0xe7ffffef) | FIFO_BITS;
+#endif
+#ifdef CHIP_AU8810
+ temp =
+ ((f & 1) << 0x18) | (temp & 0xfcffffef) | FIFO_BITS;
+#endif
+ } else
+ /*if (this_8[fifo]) */
+ vortex_fifo_clearwtdata(vortex, fifo, FIFO_SIZE);
+ }
+ hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2), temp);
+ hwread(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2));
+
+/*
+ do {
+ temp = hwread(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2));
+ if (lifeboat++ > 0xbb8) {
+ printk(KERN_ERR "Vortex: vortex_fifo_setwtctrl fail (hanging)\n");
+ break;
+ }
+ } while ((temp & FIFO_RDONLY)&&(temp & FIFO_VALID)&&(temp != 0xFFFFFFFF));
+
+
+ if (valid) {
+ if (temp & FIFO_VALID) {
+ temp = 0x40000;
+ //temp |= 0x08000000;
+ //temp |= 0x10000000;
+ //temp |= 0x04000000;
+ //temp |= 0x00400000;
+ temp |= 0x1c400000;
+ temp &= 0xFFFFFFF3;
+ temp &= 0xFFFFFFEF;
+ temp |= (valid & 1) << 4;
+ hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2), temp);
+ return;
+ } else {
+ vortex_fifo_clearwtdata(vortex, fifo, FIFO_SIZE);
+ return;
+ }
+ } else {
+ temp &= 0xffffffef;
+ temp |= 0x08000000;
+ temp |= 0x10000000;
+ temp |= 0x04000000;
+ temp |= 0x00400000;
+ hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2), temp);
+ temp = hwread(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2));
+ //((temp >> 6) & 0x3f)
+
+ priority = 0;
+ if (((temp & 0x0fc0) ^ ((temp >> 6) & 0x0fc0)) & 0FFFFFFC0)
+ vortex_fifo_clearwtdata(vortex, fifo, FIFO_SIZE);
+ valid = 0xfb;
+ temp = (temp & 0xfffffffd) | ((ctrl & 1) << 1);
+ temp = (temp & 0xfffdffff) | ((f & 1) << 0x11);
+ temp = (temp & 0xfffffff3) | ((priority & 3) << 2);
+ temp = (temp & 0xffffffef) | ((valid & 1) << 4);
+ temp = (temp & 0xffffffdf) | ((empty & 1) << 5);
+ hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2), temp);
+ }
+
+ */
+
+ /*
+ temp = (temp & 0xfffffffd) | ((ctrl & 1) << 1);
+ temp = (temp & 0xfffdffff) | ((f & 1) << 0x11);
+ temp = (temp & 0xfffffff3) | ((priority & 3) << 2);
+ temp = (temp & 0xffffffef) | ((valid & 1) << 4);
+ temp = (temp & 0xffffffdf) | ((empty & 1) << 5);
+ #ifdef FIFO_BITS
+ temp = temp | FIFO_BITS | 40000;
+ #endif
+ // 0x1c440010, 0x1c400000
+ hwwrite(vortex->mmio, VORTEX_FIFO_WTCTRL + (fifo << 2), temp);
+ */
+}
+
+#endif
+static void vortex_fifo_init(vortex_t * vortex)
+{
+ int x;
+ unsigned long addr;
+
+ /* ADB DMA channels fifos. */
+ addr = VORTEX_FIFO_ADBCTRL + ((NR_ADB - 1) * 4);
+ for (x = NR_ADB - 1; x >= 0; x--) {
+ hwwrite(vortex->mmio, addr, (FIFO_U0 | FIFO_U1));
+ if (hwread(vortex->mmio, addr) != (FIFO_U0 | FIFO_U1))
+ printk(KERN_ERR "bad adb fifo reset!");
+ vortex_fifo_clearadbdata(vortex, x, FIFO_SIZE);
+ addr -= 4;
+ }
+
+#ifndef CHIP_AU8810
+ /* WT DMA channels fifos. */
+ addr = VORTEX_FIFO_WTCTRL + ((NR_WT - 1) * 4);
+ for (x = NR_WT - 1; x >= 0; x--) {
+ hwwrite(vortex->mmio, addr, FIFO_U0);
+ if (hwread(vortex->mmio, addr) != FIFO_U0)
+ printk(KERN_ERR
+ "bad wt fifo reset (0x%08lx, 0x%08x)!\n",
+ addr, hwread(vortex->mmio, addr));
+ vortex_fifo_clearwtdata(vortex, x, FIFO_SIZE);
+ addr -= 4;
+ }
+#endif
+ /* trigger... */
+#ifdef CHIP_AU8820
+ hwwrite(vortex->mmio, 0xf8c0, 0xd03); //0x0843 0xd6b
+#else
+#ifdef CHIP_AU8830
+ hwwrite(vortex->mmio, 0x17000, 0x61); /* wt a */
+ hwwrite(vortex->mmio, 0x17004, 0x61); /* wt b */
+#endif
+ hwwrite(vortex->mmio, 0x17008, 0x61); /* adb */
+#endif
+}
+
+/* ADBDMA */
+
+static void vortex_adbdma_init(vortex_t * vortex)
+{
+}
+
+static void vortex_adbdma_setfirstbuffer(vortex_t * vortex, int adbdma)
+{
+ stream_t *dma = &vortex->dma_adb[adbdma];
+
+ hwwrite(vortex->mmio, VORTEX_ADBDMA_CTRL + (adbdma << 2),
+ dma->dma_ctrl);
+}
+
+static void vortex_adbdma_setstartbuffer(vortex_t * vortex, int adbdma, int sb)
+{
+ stream_t *dma = &vortex->dma_adb[adbdma];
+ //hwwrite(vortex->mmio, VORTEX_ADBDMA_START + (adbdma << 2), sb << (((NR_ADB-1)-((adbdma&0xf)*2))));
+ hwwrite(vortex->mmio, VORTEX_ADBDMA_START + (adbdma << 2),
+ sb << ((0xf - (adbdma & 0xf)) * 2));
+ dma->period_real = dma->period_virt = sb;
+}
+
+static void
+vortex_adbdma_setbuffers(vortex_t * vortex, int adbdma,
+ snd_pcm_sgbuf_t * sgbuf, int psize, int count)
+{
+ stream_t *dma = &vortex->dma_adb[adbdma];
+
+ if (sgbuf == NULL) {
+ printk(KERN_INFO "vortex: FATAL: sgbuf is NULL!\n");
+ return;
+ }
+ //printk(KERN_INFO "vortex: page count = %d, tblcount = %d\n", count, sgbuf->tblsize);
+
+ dma->period_bytes = psize;
+ dma->nr_periods = count;
+ dma->sgbuf = sgbuf;
+
+ dma->cfg0 = 0;
+ dma->cfg1 = 0;
+ switch (count) {
+ /* Four or more pages */
+ default:
+ case 4:
+ dma->cfg1 |= 0x88000000 | 0x44000000 | 0x30000000 | (psize - 1);
+ hwwrite(vortex->mmio,
+ VORTEX_ADBDMA_BUFBASE + (adbdma << 4) + 0xc,
+ snd_sgbuf_get_addr(sgbuf, psize * 3));
+ /* 3 pages */
+ case 3:
+ dma->cfg0 |= 0x12000000;
+ dma->cfg1 |= 0x80000000 | 0x40000000 | ((psize - 1) << 0xc);
+ hwwrite(vortex->mmio,
+ VORTEX_ADBDMA_BUFBASE + (adbdma << 4) + 0x8,
+ snd_sgbuf_get_addr(sgbuf, psize * 2));
+ /* 2 pages */
+ case 2:
+ dma->cfg0 |= 0x88000000 | 0x44000000 | 0x10000000 | (psize - 1);
+ hwwrite(vortex->mmio,
+ VORTEX_ADBDMA_BUFBASE + (adbdma << 4) + 0x4,
+ snd_sgbuf_get_addr(sgbuf, psize));
+ /* 1 page */
+ case 1:
+ dma->cfg0 |= 0x80000000 | 0x40000000 | ((psize - 1) << 0xc);
+ hwwrite(vortex->mmio,
+ VORTEX_ADBDMA_BUFBASE + (adbdma << 4),
+ snd_sgbuf_get_addr(sgbuf, 0));
+ break;
+ }
+ //printk("vortex: cfg0 = 0x%x\nvortex: cfg1=0x%x\n", dma->cfg0, dma->cfg1);
+ hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFCFG0 + (adbdma << 3), dma->cfg0);
+ hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFCFG1 + (adbdma << 3), dma->cfg1);
+
+ vortex_adbdma_setfirstbuffer(vortex, adbdma);
+ vortex_adbdma_setstartbuffer(vortex, adbdma, 0);
+}
+
+static void
+vortex_adbdma_setmode(vortex_t * vortex, int adbdma, int ie, int dir,
+ int fmt, int d, unsigned long offset)
+{
+ stream_t *dma = &vortex->dma_adb[adbdma];
+
+ dma->dma_unknown = d;
+ dma->dma_ctrl =
+ ((offset & OFFSET_MASK) | (dma->dma_ctrl & ~OFFSET_MASK));
+ /* Enable PCMOUT interrupts. */
+ dma->dma_ctrl =
+ (dma->dma_ctrl & ~IE_MASK) | ((ie << IE_SHIFT) & IE_MASK);
+
+ dma->dma_ctrl =
+ (dma->dma_ctrl & ~DIR_MASK) | ((dir << DIR_SHIFT) & DIR_MASK);
+ dma->dma_ctrl =
+ (dma->dma_ctrl & ~FMT_MASK) | ((fmt << FMT_SHIFT) & FMT_MASK);
+
+ hwwrite(vortex->mmio, VORTEX_ADBDMA_CTRL + (adbdma << 2),
+ dma->dma_ctrl);
+ hwread(vortex->mmio, VORTEX_ADBDMA_CTRL + (adbdma << 2));
+}
+
+static int vortex_adbdma_bufshift(vortex_t * vortex, int adbdma)
+{
+ stream_t *dma = &vortex->dma_adb[adbdma];
+ int page, p, pp, delta, i;
+
+ page =
+ (hwread(vortex->mmio, VORTEX_ADBDMA_STAT + (adbdma << 2)) &
+ ADB_SUBBUF_MASK) >> ADB_SUBBUF_SHIFT;
+ if (dma->nr_periods >= 4)
+ delta = (page - dma->period_real) & 3;
+ else {
+ delta = (page - dma->period_real);
+ if (delta < 0)
+ delta += dma->nr_periods;
+ }
+ if (delta == 0)
+ return 0;
+
+ /* refresh hw page table */
+ if (dma->nr_periods > 4) {
+ for (i = 0; i < delta; i++) {
+ /* p: audio buffer page index */
+ p = dma->period_virt + i + 4;
+ if (p >= dma->nr_periods)
+ p -= dma->nr_periods;
+ /* pp: hardware DMA page index. */
+ pp = dma->period_real + i;
+ if (pp >= 4)
+ pp -= 4;
+ //hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFBASE+(((adbdma << 2)+pp) << 2), dma->table[p].addr);
+ hwwrite(vortex->mmio,
+ VORTEX_ADBDMA_BUFBASE + (((adbdma << 2) + pp) << 2),
+ snd_sgbuf_get_addr(dma->sgbuf,
+ dma->period_bytes * p));
+ /* Force write thru cache. */
+ hwread(vortex->mmio, VORTEX_ADBDMA_BUFBASE +
+ (((adbdma << 2) + pp) << 2));
+ }
+ }
+ dma->period_virt += delta;
+ dma->period_real = page;
+ if (dma->period_virt >= dma->nr_periods)
+ dma->period_virt -= dma->nr_periods;
+ if (delta != 1)
+ printk(KERN_INFO "vortex: %d virt=%d, real=%d, delta=%d\n",
+ adbdma, dma->period_virt, dma->period_real, delta);
+
+ return delta;
+}
+
+
+static void vortex_adbdma_resetup(vortex_t *vortex, int adbdma) {
+ stream_t *dma = &vortex->dma_adb[adbdma];
+ int p, pp, i;
+
+ /* refresh hw page table */
+ for (i=0 ; i < 4 && i < dma->nr_periods; i++) {
+ /* p: audio buffer page index */
+ p = dma->period_virt + i;
+ if (p >= dma->nr_periods)
+ p -= dma->nr_periods;
+ /* pp: hardware DMA page index. */
+ pp = dma->period_real + i;
+ if (dma->nr_periods < 4) {
+ if (pp >= dma->nr_periods)
+ pp -= dma->nr_periods;
+ }
+ else {
+ if (pp >= 4)
+ pp -= 4;
+ }
+ hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFBASE+(((adbdma << 2)+pp) << 2), snd_sgbuf_get_addr(dma->sgbuf, dma->period_bytes * p));
+ /* Force write thru cache. */
+ hwread(vortex->mmio, VORTEX_ADBDMA_BUFBASE + (((adbdma << 2)+pp) << 2));
+ }
+}
+
+static int inline vortex_adbdma_getlinearpos(vortex_t * vortex, int adbdma)
+{
+ stream_t *dma = &vortex->dma_adb[adbdma];
+ int temp;
+
+ temp = hwread(vortex->mmio, VORTEX_ADBDMA_STAT + (adbdma << 2));
+ temp = (dma->period_virt * dma->period_bytes) + (temp & POS_MASK);
+ return (temp);
+}
+
+static void vortex_adbdma_startfifo(vortex_t * vortex, int adbdma)
+{
+ int this_8 = 0 /*empty */ , this_4 = 0 /*priority */ ;
+ stream_t *dma = &vortex->dma_adb[adbdma];
+
+ switch (dma->fifo_status) {
+ case FIFO_START:
+ vortex_fifo_setadbvalid(vortex, adbdma,
+ dma->fifo_enabled ? 1 : 0);
+ break;
+ case FIFO_STOP:
+ this_8 = 1;
+ hwwrite(vortex->mmio, VORTEX_ADBDMA_CTRL + (adbdma << 2),
+ dma->dma_ctrl);
+ vortex_fifo_setadbctrl(vortex, adbdma, dma->dma_unknown,
+ this_4, this_8,
+ dma->fifo_enabled ? 1 : 0, 0);
+ break;
+ case FIFO_PAUSE:
+ vortex_fifo_setadbctrl(vortex, adbdma, dma->dma_unknown,
+ this_4, this_8,
+ dma->fifo_enabled ? 1 : 0, 0);
+ break;
+ }
+ dma->fifo_status = FIFO_START;
+}
+
+static void vortex_adbdma_resumefifo(vortex_t * vortex, int adbdma)
+{
+ stream_t *dma = &vortex->dma_adb[adbdma];
+
+ int this_8 = 1, this_4 = 0;
+ switch (dma->fifo_status) {
+ case FIFO_STOP:
+ hwwrite(vortex->mmio, VORTEX_ADBDMA_CTRL + (adbdma << 2),
+ dma->dma_ctrl);
+ vortex_fifo_setadbctrl(vortex, adbdma, dma->dma_unknown,
+ this_4, this_8,
+ dma->fifo_enabled ? 1 : 0, 0);
+ break;
+ case FIFO_PAUSE:
+ vortex_fifo_setadbctrl(vortex, adbdma, dma->dma_unknown,
+ this_4, this_8,
+ dma->fifo_enabled ? 1 : 0, 0);
+ break;
+ }
+ dma->fifo_status = FIFO_START;
+}
+
+static void vortex_adbdma_pausefifo(vortex_t * vortex, int adbdma)
+{
+ stream_t *dma = &vortex->dma_adb[adbdma];
+
+ int this_8 = 0, this_4 = 0;
+ switch (dma->fifo_status) {
+ case FIFO_START:
+ vortex_fifo_setadbctrl(vortex, adbdma, dma->dma_unknown,
+ this_4, this_8, 0, 0);
+ break;
+ case FIFO_STOP:
+ hwwrite(vortex->mmio, VORTEX_ADBDMA_CTRL + (adbdma << 2),
+ dma->dma_ctrl);
+ vortex_fifo_setadbctrl(vortex, adbdma, dma->dma_unknown,
+ this_4, this_8, 0, 0);
+ break;
+ }
+ dma->fifo_status = FIFO_PAUSE;
+}
+
+#if 0 // Using pause instead
+static void vortex_adbdma_stopfifo(vortex_t * vortex, int adbdma)
+{
+ stream_t *dma = &vortex->dma_adb[adbdma];
+
+ int this_4 = 0, this_8 = 0;
+ if (dma->fifo_status == FIFO_START)
+ vortex_fifo_setadbctrl(vortex, adbdma, dma->dma_unknown,
+ this_4, this_8, 0, 0);
+ else if (dma->fifo_status == FIFO_STOP)
+ return;
+ dma->fifo_status = FIFO_STOP;
+ dma->fifo_enabled = 0;
+}
+
+#endif
+/* WTDMA */
+
+#ifndef CHIP_AU8810
+static void vortex_wtdma_setfirstbuffer(vortex_t * vortex, int wtdma)
+{
+ //int this_7c=dma_ctrl;
+ stream_t *dma = &vortex->dma_wt[wtdma];
+
+ hwwrite(vortex->mmio, VORTEX_WTDMA_CTRL + (wtdma << 2), dma->dma_ctrl);
+}
+
+static void vortex_wtdma_setstartbuffer(vortex_t * vortex, int wtdma, int sb)
+{
+ stream_t *dma = &vortex->dma_wt[wtdma];
+ //hwwrite(vortex->mmio, VORTEX_WTDMA_START + (wtdma << 2), sb << ((0x1f-(wtdma&0xf)*2)));
+ hwwrite(vortex->mmio, VORTEX_WTDMA_START + (wtdma << 2),
+ sb << ((0xf - (wtdma & 0xf)) * 2));
+ dma->period_real = dma->period_virt = sb;
+}
+
+static void
+vortex_wtdma_setbuffers(vortex_t * vortex, int wtdma,
+ snd_pcm_sgbuf_t * sgbuf, int psize, int count)
+{
+ stream_t *dma = &vortex->dma_wt[wtdma];
+
+ dma->period_bytes = psize;
+ dma->nr_periods = count;
+ dma->sgbuf = sgbuf;
+
+ dma->cfg0 = 0;
+ dma->cfg1 = 0;
+ switch (count) {
+ /* Four or more pages */
+ default:
+ case 4:
+ dma->cfg1 |= 0x88000000 | 0x44000000 | 0x30000000 | (psize-1);
+ hwwrite(vortex->mmio, VORTEX_WTDMA_BUFBASE + (wtdma << 4) + 0xc,
+ snd_sgbuf_get_addr(sgbuf, psize * 3));
+ /* 3 pages */
+ case 3:
+ dma->cfg0 |= 0x12000000;
+ dma->cfg1 |= 0x80000000 | 0x40000000 | ((psize-1) << 0xc);
+ hwwrite(vortex->mmio, VORTEX_WTDMA_BUFBASE + (wtdma << 4) + 0x8,
+ snd_sgbuf_get_addr(sgbuf, psize * 2));
+ /* 2 pages */
+ case 2:
+ dma->cfg0 |= 0x88000000 | 0x44000000 | 0x10000000 | (psize-1);
+ hwwrite(vortex->mmio, VORTEX_WTDMA_BUFBASE + (wtdma << 4) + 0x4,
+ snd_sgbuf_get_addr(sgbuf, psize));
+ /* 1 page */
+ case 1:
+ dma->cfg0 |= 0x80000000 | 0x40000000 | ((psize-1) << 0xc);
+ hwwrite(vortex->mmio, VORTEX_WTDMA_BUFBASE + (wtdma << 4),
+ snd_sgbuf_get_addr(sgbuf, 0));
+ break;
+ }
+ hwwrite(vortex->mmio, VORTEX_WTDMA_BUFCFG0 + (wtdma << 3), dma->cfg0);
+ hwwrite(vortex->mmio, VORTEX_WTDMA_BUFCFG1 + (wtdma << 3), dma->cfg1);
+
+ vortex_wtdma_setfirstbuffer(vortex, wtdma);
+ vortex_wtdma_setstartbuffer(vortex, wtdma, 0);
+}
+
+static void
+vortex_wtdma_setmode(vortex_t * vortex, int wtdma, int ie, int fmt, int d,
+ /*int e, */ unsigned long offset)
+{
+ stream_t *dma = &vortex->dma_wt[wtdma];
+
+ //dma->this_08 = e;
+ dma->dma_unknown = d;
+ dma->dma_ctrl = 0;
+ dma->dma_ctrl =
+ ((offset & OFFSET_MASK) | (dma->dma_ctrl & ~OFFSET_MASK));
+ /* PCMOUT interrupt */
+ dma->dma_ctrl =
+ (dma->dma_ctrl & ~IE_MASK) | ((ie << IE_SHIFT) & IE_MASK);
+ /* Always playback. */
+ dma->dma_ctrl |= (1 << DIR_SHIFT);
+ /* Audio Format */
+ dma->dma_ctrl =
+ (dma->dma_ctrl & FMT_MASK) | ((fmt << FMT_SHIFT) & FMT_MASK);
+ /* Write into hardware */
+ hwwrite(vortex->mmio, VORTEX_WTDMA_CTRL + (wtdma << 2), dma->dma_ctrl);
+}
+
+static int vortex_wtdma_bufshift(vortex_t * vortex, int wtdma)
+{
+ stream_t *dma = &vortex->dma_wt[wtdma];
+ int page, p, pp, delta, i;
+
+ page =
+ (hwread(vortex->mmio, VORTEX_WTDMA_STAT + (wtdma << 2)) &
+ WT_SUBBUF_MASK)
+ >> WT_SUBBUF_SHIFT;
+ if (dma->nr_periods >= 4)
+ delta = (page - dma->period_real) & 3;
+ else {
+ delta = (page - dma->period_real);
+ if (delta < 0)
+ delta += dma->nr_periods;
+ }
+ if (delta == 0)
+ return 0;
+
+ /* refresh hw page table */
+ if (dma->nr_periods > 4) {
+ for (i = 0; i < delta; i++) {
+ /* p: audio buffer page index */
+ p = dma->period_virt + i + 4;
+ if (p >= dma->nr_periods)
+ p -= dma->nr_periods;
+ /* pp: hardware DMA page index. */
+ pp = dma->period_real + i;
+ if (pp >= 4)
+ pp -= 4;
+ hwwrite(vortex->mmio,
+ VORTEX_WTDMA_BUFBASE +
+ (((wtdma << 2) + pp) << 2),
+ snd_sgbuf_get_addr(dma->sgbuf, dma->period_bytes * p));
+ /* Force write thru cache. */
+ hwread(vortex->mmio, VORTEX_WTDMA_BUFBASE +
+ (((wtdma << 2) + pp) << 2));
+ }
+ }
+ dma->period_virt += delta;
+ if (dma->period_virt >= dma->nr_periods)
+ dma->period_virt -= dma->nr_periods;
+ dma->period_real = page;
+
+ if (delta != 1)
+ printk(KERN_WARNING "vortex: wt virt = %d, delta = %d\n",
+ dma->period_virt, delta);
+
+ return delta;
+}
+
+#if 0
+static void
+vortex_wtdma_getposition(vortex_t * vortex, int wtdma, int *subbuf, int *pos)
+{
+ int temp;
+ temp = hwread(vortex->mmio, VORTEX_WTDMA_STAT + (wtdma << 2));
+ *subbuf = (temp >> WT_SUBBUF_SHIFT) & WT_SUBBUF_MASK;
+ *pos = temp & POS_MASK;
+}
+
+static int vortex_wtdma_getcursubuffer(vortex_t * vortex, int wtdma)
+{
+ return ((hwread(vortex->mmio, VORTEX_WTDMA_STAT + (wtdma << 2)) >>
+ POS_SHIFT) & POS_MASK);
+}
+#endif
+static int inline vortex_wtdma_getlinearpos(vortex_t * vortex, int wtdma)
+{
+ stream_t *dma = &vortex->dma_wt[wtdma];
+ int temp;
+
+ temp = hwread(vortex->mmio, VORTEX_WTDMA_STAT + (wtdma << 2));
+ //temp = (temp & POS_MASK) + (((temp>>WT_SUBBUF_SHIFT) & WT_SUBBUF_MASK)*(dma->cfg0&POS_MASK));
+ temp = (temp & POS_MASK) + ((dma->period_virt) * (dma->period_bytes));
+ return temp;
+}
+
+static void vortex_wtdma_startfifo(vortex_t * vortex, int wtdma)
+{
+ stream_t *dma = &vortex->dma_wt[wtdma];
+ int this_8 = 0, this_4 = 0;
+
+ switch (dma->fifo_status) {
+ case FIFO_START:
+ vortex_fifo_setwtvalid(vortex, wtdma,
+ dma->fifo_enabled ? 1 : 0);
+ break;
+ case FIFO_STOP:
+ this_8 = 1;
+ hwwrite(vortex->mmio, VORTEX_WTDMA_CTRL + (wtdma << 2),
+ dma->dma_ctrl);
+ vortex_fifo_setwtctrl(vortex, wtdma, dma->dma_unknown,
+ this_4, this_8,
+ dma->fifo_enabled ? 1 : 0, 0);
+ break;
+ case FIFO_PAUSE:
+ vortex_fifo_setwtctrl(vortex, wtdma, dma->dma_unknown,
+ this_4, this_8,
+ dma->fifo_enabled ? 1 : 0, 0);
+ break;
+ }
+ dma->fifo_status = FIFO_START;
+}
+
+static void vortex_wtdma_resumefifo(vortex_t * vortex, int wtdma)
+{
+ stream_t *dma = &vortex->dma_wt[wtdma];
+
+ int this_8 = 0, this_4 = 0;
+ switch (dma->fifo_status) {
+ case FIFO_STOP:
+ hwwrite(vortex->mmio, VORTEX_WTDMA_CTRL + (wtdma << 2),
+ dma->dma_ctrl);
+ vortex_fifo_setwtctrl(vortex, wtdma, dma->dma_unknown,
+ this_4, this_8,
+ dma->fifo_enabled ? 1 : 0, 0);
+ break;
+ case FIFO_PAUSE:
+ vortex_fifo_setwtctrl(vortex, wtdma, dma->dma_unknown,
+ this_4, this_8,
+ dma->fifo_enabled ? 1 : 0, 0);
+ break;
+ }
+ dma->fifo_status = FIFO_START;
+}
+
+static void vortex_wtdma_pausefifo(vortex_t * vortex, int wtdma)
+{
+ stream_t *dma = &vortex->dma_wt[wtdma];
+
+ int this_8 = 0, this_4 = 0;
+ switch (dma->fifo_status) {
+ case FIFO_START:
+ vortex_fifo_setwtctrl(vortex, wtdma, dma->dma_unknown,
+ this_4, this_8, 0, 0);
+ break;
+ case FIFO_STOP:
+ hwwrite(vortex->mmio, VORTEX_WTDMA_CTRL + (wtdma << 2),
+ dma->dma_ctrl);
+ vortex_fifo_setwtctrl(vortex, wtdma, dma->dma_unknown,
+ this_4, this_8, 0, 0);
+ break;
+ }
+ dma->fifo_status = FIFO_PAUSE;
+}
+
+static void vortex_wtdma_stopfifo(vortex_t * vortex, int wtdma)
+{
+ stream_t *dma = &vortex->dma_wt[wtdma];
+
+ int this_4 = 0, this_8 = 0;
+ if (dma->fifo_status == FIFO_START)
+ vortex_fifo_setwtctrl(vortex, wtdma, dma->dma_unknown,
+ this_4, this_8, 0, 0);
+ else if (dma->fifo_status == FIFO_STOP)
+ return;
+ dma->fifo_status = FIFO_STOP;
+ dma->fifo_enabled = 0;
+}
+
+#endif
+/* ADB Routes */
+
+typedef int ADBRamLink;
+static void vortex_adb_init(vortex_t * vortex)
+{
+ int i;
+ /* it looks like we are writing more than we need to...
+ * if we write what we are supposed to it breaks things... */
+ hwwrite(vortex->mmio, VORTEX_ADB_SR, 0);
+ for (i = 0; i < VORTEX_ADB_RTBASE_COUNT; i++)
+ hwwrite(vortex->mmio, VORTEX_ADB_RTBASE + (i << 2),
+ hwread(vortex->mmio,
+ VORTEX_ADB_RTBASE + (i << 2)) | ROUTE_MASK);
+ for (i = 0; i < VORTEX_ADB_CHNBASE_COUNT; i++) {
+ hwwrite(vortex->mmio, VORTEX_ADB_CHNBASE + (i << 2),
+ hwread(vortex->mmio,
+ VORTEX_ADB_CHNBASE + (i << 2)) | ROUTE_MASK);
+ }
+}
+
+static void vortex_adb_en_sr(vortex_t * vortex, int channel)
+{
+ hwwrite(vortex->mmio, VORTEX_ADB_SR,
+ hwread(vortex->mmio, VORTEX_ADB_SR) | (0x1 << channel));
+}
+
+static void vortex_adb_dis_sr(vortex_t * vortex, int channel)
+{
+ hwwrite(vortex->mmio, VORTEX_ADB_SR,
+ hwread(vortex->mmio, VORTEX_ADB_SR) & ~(0x1 << channel));
+}
+
+static void
+vortex_adb_addroutes(vortex_t * vortex, unsigned char channel,
+ ADBRamLink * route, int rnum)
+{
+ int temp, prev, lifeboat = 0;
+
+ if ((rnum <= 0) || (route == NULL))
+ return;
+ /* Write last routes. */
+ rnum--;
+ hwwrite(vortex->mmio,
+ VORTEX_ADB_RTBASE + ((route[rnum] & ADB_MASK) << 2),
+ ROUTE_MASK);
+ while (rnum > 0) {
+ hwwrite(vortex->mmio,
+ VORTEX_ADB_RTBASE +
+ ((route[rnum - 1] & ADB_MASK) << 2), route[rnum]);
+ rnum--;
+ }
+ /* Write first route. */
+ temp =
+ hwread(vortex->mmio,
+ VORTEX_ADB_CHNBASE + (channel << 2)) & ADB_MASK;
+ if (temp == ADB_MASK) {
+ /* First entry on this channel. */
+ hwwrite(vortex->mmio, VORTEX_ADB_CHNBASE + (channel << 2),
+ route[0]);
+ vortex_adb_en_sr(vortex, channel);
+ return;
+ }
+ /* Not first entry on this channel. Need to link. */
+ do {
+ prev = temp;
+ temp =
+ hwread(vortex->mmio,
+ VORTEX_ADB_RTBASE + (temp << 2)) & ADB_MASK;
+ if ((lifeboat++) > ADB_MASK) {
+ printk(KERN_ERR
+ "vortex_adb_addroutes: unending route! 0x%x\n",
+ *route);
+ return;
+ }
+ }
+ while (temp != ADB_MASK);
+ hwwrite(vortex->mmio, VORTEX_ADB_RTBASE + (prev << 2), route[0]);
+}
+
+static void
+vortex_adb_delroutes(vortex_t * vortex, unsigned char channel,
+ ADBRamLink route0, ADBRamLink route1)
+{
+ int temp, lifeboat = 0, prev;
+
+ /* Find route. */
+ temp =
+ hwread(vortex->mmio,
+ VORTEX_ADB_CHNBASE + (channel << 2)) & ADB_MASK;
+ if (temp == (route0 & ADB_MASK)) {
+ temp =
+ hwread(vortex->mmio,
+ VORTEX_ADB_RTBASE + ((route1 & ADB_MASK) << 2));
+ if ((temp & ADB_MASK) == ADB_MASK)
+ vortex_adb_dis_sr(vortex, channel);
+ hwwrite(vortex->mmio, VORTEX_ADB_CHNBASE + (channel << 2),
+ temp);
+ return;
+ }
+ do {
+ prev = temp;
+ temp =
+ hwread(vortex->mmio,
+ VORTEX_ADB_RTBASE + (prev << 2)) & ADB_MASK;
+ if (((lifeboat++) > ADB_MASK) || (temp == ADB_MASK)) {
+ printk(KERN_ERR
+ "vortex_adb_delroutes: route not found! 0x%x\n",
+ route0);
+ return;
+ }
+ }
+ while (temp != (route0 & ADB_MASK));
+ temp = hwread(vortex->mmio, VORTEX_ADB_RTBASE + (temp << 2));
+ if ((temp & ADB_MASK) == route1)
+ temp = hwread(vortex->mmio, VORTEX_ADB_RTBASE + (temp << 2));
+ /* Make bridge over deleted route. */
+ hwwrite(vortex->mmio, VORTEX_ADB_RTBASE + (prev << 2), temp);
+}
+
+static void
+vortex_route(vortex_t * vortex, int en, unsigned char channel,
+ unsigned char source, unsigned char dest)
+{
+ ADBRamLink route;
+
+ route = ((source & ADB_MASK) << ADB_SHIFT) | (dest & ADB_MASK);
+ if (en) {
+ vortex_adb_addroutes(vortex, channel, &route, 1);
+ if ((source < (OFFSET_SRCOUT + NR_SRC))
+ && (source >= OFFSET_SRCOUT))
+ vortex_src_addWTD(vortex, (source - OFFSET_SRCOUT),
+ channel);
+ else if ((source < (OFFSET_MIXOUT + NR_MIXOUT))
+ && (source >= OFFSET_MIXOUT))
+ vortex_mixer_addWTD(vortex,
+ (source - OFFSET_MIXOUT), channel);
+ } else {
+ vortex_adb_delroutes(vortex, channel, route, route);
+ if ((source < (OFFSET_SRCOUT + NR_SRC))
+ && (source >= OFFSET_SRCOUT))
+ vortex_src_delWTD(vortex, (source - OFFSET_SRCOUT),
+ channel);
+ else if ((source < (OFFSET_MIXOUT + NR_MIXOUT))
+ && (source >= OFFSET_MIXOUT))
+ vortex_mixer_delWTD(vortex,
+ (source - OFFSET_MIXOUT), channel);
+ }
+}
+
+#if 0
+static void
+vortex_routes(vortex_t * vortex, int en, unsigned char channel,
+ unsigned char source, unsigned char dest0, unsigned char dest1)
+{
+ ADBRamLink route[2];
+
+ route[0] = ((source & ADB_MASK) << ADB_SHIFT) | (dest0 & ADB_MASK);
+ route[1] = ((source & ADB_MASK) << ADB_SHIFT) | (dest1 & ADB_MASK);
+
+ if (en) {
+ vortex_adb_addroutes(vortex, channel, route, 2);
+ if ((source < (OFFSET_SRCOUT + NR_SRC))
+ && (source >= (OFFSET_SRCOUT)))
+ vortex_src_addWTD(vortex, (source - OFFSET_SRCOUT),
+ channel);
+ else if ((source < (OFFSET_MIXOUT + NR_MIXOUT))
+ && (source >= (OFFSET_MIXOUT)))
+ vortex_mixer_addWTD(vortex,
+ (source - OFFSET_MIXOUT), channel);
+ } else {
+ vortex_adb_delroutes(vortex, channel, route[0], route[1]);
+ if ((source < (OFFSET_SRCOUT + NR_SRC))
+ && (source >= (OFFSET_SRCOUT)))
+ vortex_src_delWTD(vortex, (source