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authorChander Kashyap <chander.kashyap@linaro.org>2013-03-14 18:48:03 +0530
committerChander Kashyap <chander.kashyap@linaro.org>2013-03-14 18:48:03 +0530
commit6d55aa2d07b32aaf869d7f881d238fac7acb847f (patch)
tree0f02ff696438132f83fbe06a186ce9ae515bf0ef
parent9ebc7d164e1a3dc319aa9d761ed07fbe8d9b13c4 (diff)
downloadkernel-6d55aa2d07b32aaf869d7f881d238fac7acb847f.tar.gz
ARM: sched: clear SD_SHARE_POWERDOMAINworkload/linux-linaro-sml-task
The ARM platforms take advantage of packing small tasks on few cores. This is true even when the cores of a cluster can't be power gated independantly. So we clear SD_SHARE_POWERDOMAIN at MC and CPU level. Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
-rw-r--r--arch/arm/kernel/topology.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/kernel/topology.c b/arch/arm/kernel/topology.c
index 8df74d630ca..ca8b48400d5 100644
--- a/arch/arm/kernel/topology.c
+++ b/arch/arm/kernel/topology.c
@@ -204,6 +204,15 @@ static inline void update_cpu_power(unsigned int cpuid, unsigned int mpidr) {}
struct cputopo_arm cpu_topology[NR_CPUS];
EXPORT_SYMBOL_GPL(cpu_topology);
+int arch_sd_local_flags(int level)
+{
+ /* Powergate at threading level doesn't make sense */
+ if (level & SD_SHARE_CPUPOWER)
+ return 1*SD_SHARE_POWERDOMAIN;
+
+ return 0*SD_SHARE_POWERDOMAIN;
+}
+
const struct cpumask *cpu_coregroup_mask(int cpu)
{
return &cpu_topology[cpu].core_sibling;