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authorKen Wang <Qingqing.Wang@amd.com>2015-06-03 17:36:54 +0800
committerAlex Deucher <alexander.deucher@amd.com>2015-06-03 21:04:01 -0400
commit32bf7106e072b59cade754062ed86023309f50d9 (patch)
tree31ef93eb35ed310e9a9970a4d16a9f62597fd195 /drivers
parent35074d2d404049c386e7e70a9e48cf77f1379364 (diff)
downloadkernel-32bf7106e072b59cade754062ed86023309f50d9.tar.gz
drm/amdgpu add max_memory_clock for interface query (v2)
Add a query for the max memory clock. v2: handle the dpm enabled case properly Signed-off-by: Ken Wang <Qingqing.Wang@amd.com> Reviewd-by: Jammy Zhou <Jammy.Zhou@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
index b6dd3751d9a5..3c182b6c5a27 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
@@ -414,11 +414,15 @@ static int amdgpu_info_ioctl(struct drm_device *dev, void *data, struct drm_file
dev_info.num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se;
/* return all clocks in KHz */
dev_info.gpu_counter_freq = amdgpu_asic_get_xclk(adev) * 10;
- if (adev->pm.dpm_enabled)
+ if (adev->pm.dpm_enabled) {
dev_info.max_engine_clock =
adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk * 10;
- else
+ dev_info.max_memory_clock =
+ adev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk * 10;
+ } else {
dev_info.max_engine_clock = adev->pm.default_sclk * 10;
+ dev_info.max_memory_clock = adev->pm.default_mclk * 10;
+ }
dev_info.enabled_rb_pipes_mask = adev->gfx.config.backend_enable_mask;
dev_info.num_rb_pipes = adev->gfx.config.max_backends_per_se *
adev->gfx.config.max_shader_engines;