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authorDan Handley <dan.handley@arm.com>2014-04-23 13:47:06 +0100
committerDan Handley <dan.handley@arm.com>2014-05-06 17:55:38 +0100
commit625de1d4f04b30383354bee944d0a7ca3dba1e67 (patch)
tree3a9c8494e30f1d7475dbc69edef172a37f036594 /bl31
parent408c37682a0233c8c4fa88700b603f0b09d6361f (diff)
downloadarm-trusted-firmware-625de1d4f04b30383354bee944d0a7ca3dba1e67.tar.gz
Remove variables from .data section
Update code base to remove variables from the .data section, mainly by using const static data where possible and adding the const specifier as required. Most changes are to the IO subsystem, including the framework APIs. The FVP power management code is also affected. Delay initialization of the global static variable, next_image_type in bl31_main.c, until it is realy needed. Doing this moves the variable from the .data to the .bss section. Also review the IO interface for inconsistencies, using uintptr_t where possible instead of void *. Remove the io_handle and io_dev_handle typedefs, which were unnecessary, replacing instances with uintptr_t. Fixes ARM-software/tf-issues#107. Change-Id: I085a62197c82410b566e4698e5590063563ed304
Diffstat (limited to 'bl31')
-rw-r--r--bl31/bl31_main.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/bl31/bl31_main.c b/bl31/bl31_main.c
index cf826d0..01f00f2 100644
--- a/bl31/bl31_main.c
+++ b/bl31/bl31_main.c
@@ -50,7 +50,7 @@ static int32_t (*bl32_init)(meminfo_t *);
* Variable to indicate whether next image to execute after BL31 is BL33
* (non-secure & default) or BL32 (secure).
******************************************************************************/
-static uint32_t next_image_type = NON_SECURE;
+static uint32_t next_image_type;
/*******************************************************************************
* Simple function to initialise all BL31 helper libraries.
@@ -100,6 +100,7 @@ void bl31_main(void)
assert(cm_get_context(mpidr, NON_SECURE));
cm_set_next_eret_context(NON_SECURE);
write_vbar_el3((uint64_t) runtime_exceptions);
+ next_image_type = NON_SECURE;
/*
* All the cold boot actions on the primary cpu are done. We now need to