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authorAchin Gupta <achin.gupta@arm.com>2014-02-19 17:58:33 +0000
committerDan Handley <dan.handley@arm.com>2014-02-20 19:06:34 +0000
commit35ca35119d9dc51f1665184ab6db5e2861c213b4 (patch)
treead063c1d5bb7b529603570e53a17340d53d19c8b /bl31/aarch64/bl31_entrypoint.S
parenta3050ed521ec1fd6d34d7d8ba5105ac8bc024992 (diff)
downloadarm-trusted-firmware-35ca35119d9dc51f1665184ab6db5e2861c213b4.tar.gz
Add support for BL3-2 in BL3-1
This patch adds the following support to the BL3-1 stage: 1. BL3-1 allows runtime services to specify and determine the security state of the next image after BL3-1. This has been done by adding the `bl31_set_next_image_type()` & `bl31_get_next_image_type()` apis. The default security state is non-secure. The platform api `bl31_get_next_image_info()` has been modified to let the platform decide which is the next image in the desired security state. 2. BL3-1 exports the `bl31_prepare_next_image_entry()` function to program entry into the target security state. It uses the apis introduced in 1. to do so. 3. BL3-1 reads the information populated by BL2 about the BL3-2 image into its internal data structures. 4. BL3-1 introduces a weakly defined reference `bl32_init()` to allow initialisation of a BL3-2 image. A runtime service like the Secure payload dispatcher will define this function if present. Change-Id: Icc46dcdb9e475ce6575dd3f9a5dc7a48a83d21d1
Diffstat (limited to 'bl31/aarch64/bl31_entrypoint.S')
-rw-r--r--bl31/aarch64/bl31_entrypoint.S12
1 files changed, 0 insertions, 12 deletions
diff --git a/bl31/aarch64/bl31_entrypoint.S b/bl31/aarch64/bl31_entrypoint.S
index c72b363..97f59f3 100644
--- a/bl31/aarch64/bl31_entrypoint.S
+++ b/bl31/aarch64/bl31_entrypoint.S
@@ -166,18 +166,6 @@ bl31_entrypoint: ; .type bl31_entrypoint, %function
*/
bl bl31_main
- /* ---------------------------------------------
- * Use the more complex exception vectors now
- * that context management is setup. SP_EL3 is
- * pointing to a 'cpu_context' structure which
- * has an exception stack allocated. Since
- * we're just about to leave this EL with ERET,
- * we don't need an ISB here
- * ---------------------------------------------
- */
- adr x1, runtime_exceptions
- msr vbar_el3, x1
-
zero_callee_saved_regs
b el3_exit