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authorAchin Gupta <achin.gupta@arm.com>2014-01-17 16:52:29 +0000
committerDan Handley <dan.handley@arm.com>2014-01-23 12:13:34 +0000
commitb2187ab940239b2df1b3571d4a7f7f4201f7fc63 (patch)
tree962bcfb518bbb82d6626576ceea57bca75be142e
parent75f7367b4c5419634004bfae9c1e47ca45937396 (diff)
downloadarm-trusted-firmware-b2187ab940239b2df1b3571d4a7f7f4201f7fc63.tar.gz
fvp: clear a pending cluster power off request
The last CPU in a cluster is responsible for issuing the cluster power down request to the FVP power controller. If another CPU in this cluster wakes up before the last CPU enters WFI then the cluster power down request remains pending. If this request is not cancelled and the newly woken up CPU enters a simple WFI later, the power controller powers the cluster down. This leads to unpredictable behaviour. This patch fixes this issue by ensuring that the first CPU to wake up in a cluster writes its MPIDR to the power controller's PPONR. This cancels any pending cluster power down request. Change-Id: I7e787adfd6c9a0bd7308390e3309d46f35c01086
-rw-r--r--plat/fvp/plat_pm.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/plat/fvp/plat_pm.c b/plat/fvp/plat_pm.c
index b9948ee..dd7a4b3 100644
--- a/plat/fvp/plat_pm.c
+++ b/plat/fvp/plat_pm.c
@@ -273,6 +273,20 @@ int fvp_affinst_on_finish(unsigned long mpidr,
case MPIDR_AFFLVL1:
/* Enable coherency if this cluster was off */
if (state == PSCI_STATE_OFF) {
+
+ /*
+ * This CPU might have woken up whilst the
+ * cluster was attempting to power down. In
+ * this case the FVP power controller will
+ * have a pending cluster power off request
+ * which needs to be cleared by writing to the
+ * PPONR register. This prevents the power
+ * controller from interpreting a subsequent
+ * entry of this cpu into a simple wfi as a
+ * power down request.
+ */
+ fvp_pwrc_write_pponr(mpidr);
+
cci_setup = platform_get_cfgvar(CONFIG_HAS_CCI);
if (cci_setup) {
cci_enable_coherency(mpidr);