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-rw-r--r--big-little/common/hyp_setup.c94
1 files changed, 47 insertions, 47 deletions
diff --git a/big-little/common/hyp_setup.c b/big-little/common/hyp_setup.c
index 9c90e26..b0cda90 100644
--- a/big-little/common/hyp_setup.c
+++ b/big-little/common/hyp_setup.c
@@ -18,7 +18,7 @@
* contributors may be used to endorse or promote products
* derived from this software without specific prior written
* permission.
- */
+ */
#include "context.h"
#include "misc.h"
@@ -55,53 +55,53 @@ unsigned event[NUM_CPUS][MAX_EVENTS] __attribute__ ((section("BL_DV_PAGE")));
*/
void bl_rest_init(void)
{
- unsigned first_cpu = find_first_cpu();
- unsigned cpu_id = read_cpuid();
- unsigned cluster_id = read_clusterid();
- unsigned warm_reset = 0;
+ unsigned first_cpu = find_first_cpu();
+ unsigned cpu_id = read_cpuid();
+ unsigned cluster_id = read_clusterid();
+ unsigned warm_reset = 0;
+
+ /* HYP mode initialisation performed after every reset */
+ write_hvbar((unsigned)&vectors);
+ Enable2ndStagePageTables();
+
+ /* Initialise a per cpu UART */
+ config_uart();
+
+ if (switcher) {
+ /*
+ * Ask the secure world to initialise its context.
+ * Not required when "always on"
+ */
+ smc(SMC_SEC_INIT, 0);
+
+ /*
+ * Since we are using the shared vgic, we need to map
+ * the cpuids to the cpu interfaces as there is no
+ * longer a 1:1 mapping
+ */
+ map_cpuif(cluster_id, cpu_id);
+
+ if (async_switchover && first_cpu == cpu_id)
+ enable_trigger(read_cntfrq());
+ } else {
+
+ /*
+ * Only one cpu should enable the CCI while the other
+ * cpus wait.
+ */
+ if (first_cpu == cpu_id && cluster_id == host_cluster) {
+ write32(A7_SL_IFACE_BASE + SNOOP_CTLR_REG, 0x3);
+ write32(A15_SL_IFACE_BASE + SNOOP_CTLR_REG, 0x3);
+ dsb();
+ }
- /* HYP mode initialisation performed after every reset */
- write_hvbar((unsigned)&vectors);
- Enable2ndStagePageTables();
+ /* Wait for the dust to settle down */
+ while (read32(CCI_BASE + STATUS_REG) & 0x1) ;
+ }
- /* Initialise a per cpu UART */
- config_uart();
-
- if (switcher) {
- /*
- * Ask the secure world to initialise its context.
- * Not required when "always on"
- */
- smc(SMC_SEC_INIT, 0);
-
- /*
- * Since we are using the shared vgic, we need to map
- * the cpuids to the cpu interfaces as there is no
- * longer a 1:1 mapping
- */
- map_cpuif(cluster_id, cpu_id);
-
- if (async_switchover && first_cpu == cpu_id)
- enable_trigger(read_cntfrq());
- } else {
-
- /*
- * Only one cpu should enable the CCI while the other
- * cpus wait.
- */
- if (first_cpu == cpu_id && cluster_id == host_cluster) {
- write32(A7_SL_IFACE_BASE + SNOOP_CTLR_REG, 0x3);
- write32(A15_SL_IFACE_BASE + SNOOP_CTLR_REG, 0x3);
- dsb();
- }
-
- /* Wait for the dust to settle down */
- while (read32(CCI_BASE + STATUS_REG) & 0x1) ;
- }
-
- /* Initialise the Virtual GIC and the Virtualizer */
- SetupVGIC(warm_reset);
- SetupVirtualisor(first_cpu);
+ /* Initialise the Virtual GIC and the Virtualizer */
+ SetupVGIC(warm_reset);
+ SetupVirtualisor(first_cpu);
- return;
+ return;
}